/Zephyr-latest/dts/bindings/spi/ |
D | snps,designware-spi.yaml | 3 # SPDX-License-Identifier: Apache-2.0 7 compatible: "snps,designware-spi" 9 include: [spi-controller.yaml, pinctrl-device.yaml] 18 aux-reg: 24 fifo-depth: 29 Serial Interface. Depth ranges from 2-256. 31 serial-target: 34 True if it is a Serial Target. False if it is a Serial 36 Synchronous Serial Interface. 38 max-xfer-size: [all …]
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/Zephyr-latest/cmake/emu/ |
D | qemu.cmake | 1 # SPDX-License-Identifier: Apache-2.0 23 NAMES qemu-system-${QEMU_binary_suffix} 28 qemu-system-${QEMU_binary_suffix} 32 # We need to set up uefi-run and OVMF environment 35 find_program(UEFI NAMES uefi-run REQUIRED) 41 list(APPEND UEFI -b ${OVMF_FD_PATH} -q ${QEMU}) 50 set(QEMU_FLAGS -pidfile) 61 # Redirect console to a pseudo-tty, used for running automated tests. 62 list(APPEND QEMU_FLAGS -chardev pty,id=con,mux=on) 65 list(APPEND QEMU_FLAGS -chardev pipe,id=con,mux=on,path=${QEMU_PIPE}) [all …]
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/Zephyr-latest/tests/bluetooth/tester/ |
D | README | 6 automated testing. It requires two serial ports to operate. 7 The first serial is used by Bluetooth Testing Protocol (BTP) to drive Bluetooth 9 over the same serial. 11 BTP specification can be found in auto-pts project repository: 12 https://github.com/intel/auto-pts 13 The auto-pts is an automation framework for PTS Bluetooth testing tool provided 19 -------------------------------------------------------------------------------- 24 -------------------------------------------------------------------------------- 32 $ sudo tools/btproxy -u 33 Listening on /tmp/bt-server-bredr [all …]
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/Zephyr-latest/samples/boards/st/power_mgmt/serial_wakeup/ |
D | README.rst | 1 .. zephyr:code-sample:: stm32_pm_serial_wakeup 2 :name: Serial wakeup 3 :relevant-api: subsys_pm_device 5 Wake up on serial activity on STM32. 10 This sample is a minimum application to demonstrate serial wakeup functionality 13 .. _stm32-pm-serial-wakeup-sample-requirements: 18 1. The board should support enabling PM. For a STM32 based target, it means that 20 in core sleep states, as LPTIM (:dtcompatible:`st,stm32-lptim`). 22 2. The serial port used by the shell should be configured, using device tree, to 25 - Clocked by an oscillator available in Stop mode (LSE, LSI) or an oscillator capable [all …]
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/Zephyr-latest/doc/develop/flash_debug/ |
D | nordic_segger.rst | 5 Nordic nRF5x Segger J-Link 14 * Segger J-Link firmware and desktop tools 16 * Mass Storage device for drag-and-drop image flashing 17 * USB CDC ACM Serial Port bridged to the nRF5x UART peripheral 21 Segger J-Link Software Installation 24 To install the J-Link Software and documentation pack, follow the steps below: 26 #. Download the appropriate package from the `J-Link Software and documentation pack`_ website 28 #. When connecting a J-Link-enabled board such as an nRF5x DK, PDK or dongle, a 29 drive corresponding to a USB Mass Storage device as well as a serial port should come up 31 nRF5x Command-Line Tools Installation [all …]
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/Zephyr-latest/subsys/debug/gdbstub/ |
D | Kconfig | 2 # SPDX-License-Identifier: Apache-2.0 5 bool "GDB remote serial protocol support [EXPERIMENTAL]" 10 This option enable support the target using GDB, or any other 19 bool "Use serial backend" 20 depends on SERIAL 22 Use serial as backend for GDB
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/Zephyr-latest/scripts/west_commands/tests/ |
D | test_blackmagicprobe.py | 4 # SPDX-License-Identifier: Apache-2.0 15 import serial.tools.list_ports 17 TEST_GDB_SERIAL = 'test-gdb-serial' 20 # runner_config fixture (and always specifying gdb-serial) means we 25 '-ex', "set confirm off", 26 '-ex', "target extended-remote {}".format(TEST_GDB_SERIAL), 27 '-ex', "monitor swdp_scan", 28 '-ex', "attach 1", 29 '-ex', "file {}".format(RC_KERNEL_ELF)],), 32 '-ex', "set confirm off", [all …]
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/Zephyr-latest/doc/services/debugging/ |
D | gdbstub.rst | 14 Serial Protocol (RSP) that allows you to remotely debug Zephyr 17 The protocol supports different connection types: serial, UDP/IP and 18 TCP/IP. Zephyr currently supports only serial device communication. 25 possible to asynchronously send commands to the target. 33 * Continue and step the target 43 Using Serial Backend 46 The serial backend for GDB stub can be enabled with 49 Since serial backend utilizes UART devices to send and receive GDB commands, 51 * If there are spare UART devices on the board, set ``zephyr,gdbstub-uart`` 64 Using Serial Backend [all …]
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D | coredump.rst | 48 are enabled. This core dump data can be fed into a custom-made GDB server as 49 a remote target for GDB (and other GDB compatible debuggers). CPU registers, 61 to convert the serial console log into a binary file. 68 4. Start the debugger corresponding to the target architecture. 71 Developers for Intel ADSP CAVS 15-25 platforms using 73 ``xtensa-intel_apl_adsp`` toolchain of the SDK. 79 .. code-block:: devicetree 84 label = "coredump-partition"; 90 ------- 92 This example uses the log module backend tied to serial console. [all …]
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/Zephyr-latest/scripts/west_commands/runners/ |
D | intel_cyclonev.py | 3 # SPDX-License-Identifier: Apache-2.0 21 '''Runner front-end for openocd.''' 26 tui=None, config=None, serial=None, use_elf=True, argument 57 search_args.append('-s') 63 search_args.append('-s') 68 search_args.extend(['-s', p]) 85 self.tui_arg = ['-tui'] if tui else [] 86 self.halt_arg = [] if no_halt else ['-c halt'] 87 self.init_arg = [] if no_init else ['-c init'] 88 self.targets_arg = [] if no_targets else ['-c targets'] [all …]
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D | blackmagicprobe.py | 4 # SPDX-License-Identifier: Apache-2.0 17 import serial.tools.list_ports 44 for port in serial.tools.list_ports.comports(): 58 for port in serial.tools.list_ports.comports(): 75 for port in serial.tools.list_ports.comports(): 87 - the port specified manually 88 - the port in the BMP_GDB_SERIAL environment variable 89 - a guessed one depending on the host 109 '''Runner front-end for Black Magic probe.''' 117 # https://github.com/zephyrproject-rtos/zephyr/issues/50789 [all …]
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/Zephyr-latest/doc/hardware/peripherals/ |
D | espi.rst | 3 Enhanced Serial Peripheral Interface (eSPI) Bus 9 The eSPI (enhanced serial peripheral interface) is a serial bus that is 10 based on SPI. It also features a four-wire interface (receive, transmit, clock 11 and target select) and three configurations: single IO, dual IO and quad IO. 27 https://downloadmirror.intel.com/27055/327432%20espi_base_specification%20R1-5.pdf
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D | i2c.rst | 3 Inter-Integrated Circuit (I2C) Bus 12 `NXP I2C Bus Specification Rev 7.0 <i2c-specification_>`_. These changed 15 `I2C`_ (Inter-Integrated Circuit, pronounced "eye 16 squared see") is a commonly-used two-signal shared peripheral interface 17 bus. Many system-on-chip solutions provide controllers that communicate 20 "target" that responds to transaction commands. A I2C controller on a 22 support the target mode. Zephyr has API for both roles. 24 .. _i2c-controller-api: 32 serial memory. 34 This API is supported in all in-tree I2C peripheral drivers and is [all …]
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/Zephyr-latest/boards/starfive/visionfive2/doc/ |
D | index.rst | 7 multi-core 64bit RISC-V SoC. 18 .. zephyr-app-commands:: 22 `spl_tool <https://github.com/starfive-tech/Tools/tree/master/spl_tool/>`_ 26 .. code-block:: console 28 ./spl_tool -c -f build/zephyr/zephyr.bin 32 to run it in M-Mode (Machine Mode) since S-Mode (Supervisor Mode) is 39 The following steps use minicom for serial communication, feel free to use 40 any other serial terminal that supports xmodem based file transfers. 41 Thanks to @orangecms for his vf2-loader tool which makes the flashing process easier 43 git clone the vf2-loader tool from https://github.com/orangecms/vf2-loader.git and [all …]
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/Zephyr-latest/boards/shields/reyax_lora/doc/ |
D | index.rst | 18 - VDD: Power Supply 19 - NRST: Active low reset 20 - RXD: Serial data input 21 - TXD: Serial data output 22 - GND: Ground 27 .. target-notes::
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/Zephyr-latest/boards/infineon/cyw920829m2evk_02/support/ |
D | openocd.cfg | 4 # SPDX-License-Identifier: Apache-2.0 10 source [find target/cyw20829.cfg] 13 adapter serial $_ZEPHYR_BOARD_SERIAL
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/Zephyr-latest/soc/st/stm32/common/ |
D | pm_debug_swj.c | 4 * SPDX-License-Identifier: Apache-2.0 17 * Serial Wire / JTAG port pins are enabled as part of SoC default configuration. 26 /* Set Serial Wire / JTAG port pins to analog mode */ in swj_to_analog() 36 /* Run this routine as the earliest pin configuration in the target, 37 * to avoid potential conflicts with devices accessing SWJ-DG pins for
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/Zephyr-latest/samples/drivers/mspi/mspi_flash/ |
D | README.rst | 1 .. zephyr:code-sample:: mspi-flash 2 :name: JEDEC MSPI-NOR flash 3 :relevant-api: flash_interface 5 Use the flash API to interact with a MSPI NOR serial flash memory device. 10 This sample demonstrates using the :ref:`flash API <flash_api>` on a MSPI NOR serial flash 18 The application will build only for a target that has a :ref:`devicetree <dt-guide>` 21 * :dtcompatible:`ambiq,mspi-device`, :dtcompatible:`mspi-atxp032` 23 .. zephyr-app-commands:: 24 :zephyr-app: samples/drivers/mspi/mspi_flash 32 .. code-block:: console [all …]
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/Zephyr-latest/boards/snps/hsdk/support/ |
D | openocd.cfg | 1 # Copyright (C) 2019-2020 Synopsys, Inc. 2 # SPDX-License-Identifier: Apache-2.0 6 # SDP has built-in FT2232 chip, which is similar to Digilent HS-1, except that 10 # Only specify FTDI serial number if it is specified via 13 adapter serial $_ZEPHYR_BOARD_SERIAL 30 # Contains quad-core ARC HS38. 40 set _CHIPNAME arc-em 45 jtag newtap $_CHIPNAME cpu4 -irlen 4 -ircapture 0x1 -expected-id 0x200c24b1 47 jtag newtap $_CHIPNAME cpu3 -irlen 4 -ircapture 0x1 -expected-id 0x200824b1 49 jtag newtap $_CHIPNAME cpu2 -irlen 4 -ircapture 0x1 -expected-id 0x200424b1 [all …]
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/Zephyr-latest/boards/snps/hsdk4xd/support/ |
D | openocd.cfg | 1 # Copyright (C) 2019-2023 Synopsys, Inc. 2 # SPDX-License-Identifier: Apache-2.0 6 # SDP has built-in FT2232 chip, which is similar to Digilent HS-1, except that 10 # Only specify FTDI serial number if it is specified via 13 adapter serial $_ZEPHYR_BOARD_SERIAL 30 # Contains quad-core ARC HS4x. 40 set _CHIPNAME arc-em 45 jtag newtap $_CHIPNAME cpu4 -irlen 4 -ircapture 0x1 -expected-id 0x100c54b1 47 jtag newtap $_CHIPNAME cpu3 -irlen 4 -ircapture 0x1 -expected-id 0x100854b1 49 jtag newtap $_CHIPNAME cpu2 -irlen 4 -ircapture 0x1 -expected-id 0x100454b1 [all …]
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/Zephyr-latest/boards/snps/em_starterkit/support/ |
D | openocd.cfg | 2 # EM Starter Kit has built-in FT2232 chip, which is similar to Digilent HS-1. 11 # Only specify FTDI serial number if it is specified via 24 source [find target/snps_em_sk_fpga.cfg]
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/Zephyr-latest/samples/drivers/spi_flash/ |
D | README.rst | 1 .. zephyr:code-sample:: spi-nor 2 :name: JEDEC SPI-NOR flash 3 :relevant-api: flash_interface 5 Use the flash API to interact with an SPI NOR serial flash memory device. 10 This sample demonstrates using the :ref:`flash API <flash_api>` on a SPI NOR serial flash 18 The application will build only for a target that has a devicetree node with one of the 21 * :dtcompatible:`jedec,spi-nor`, 22 * :dtcompatible:`st,stm32-qspi-nor`, 23 * :dtcompatible:`st,stm32-ospi-nor`, 24 * :dtcompatible:`nordic,qspi-nor`. [all …]
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/Zephyr-latest/boards/up-bridge-the-gap/up_squared_pro_7000/doc/ |
D | up_squared_pro_7000.rst | 11 UP Squared Pro 7000 is the 3rd generation of palm-sized developer board of 13 (Intel N-series Platform). 15 For more information about Intel N-series Platform please refer to 46 .. zephyr-app-commands:: 47 :zephyr-app: samples/hello_world 56 Connect Serial Console 59 Current board configuration assumes that serial console is connected to 63 Refer to `UP Serial Console`_ for additional information about serial 70 :start-after: start_include_here 76 :start-after: start_include_here [all …]
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/Zephyr-latest/boards/microchip/ev11l78a/doc/ |
D | index.rst | 7 is a low-cost evaluation platform for Microchip's UPD301C Standalone 8 Programmable USB Power Delivery (PD) Controller. This RoHS-compliant 10 USB Type-C™ Connector Specification and USB PD 3.0 specification. 15 - ATSAMD20E16 ARM Cortex-M0+ processor at 48 MHz 16 - UPD301C combines a SAMD20 core and a UPD350 USB-PD controller 17 - Sink PDO Selector Switch 18 - Onboard LED Voltmeter 27 .. list-table:: 28 :header-rows: 1 30 * - Interface [all …]
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/Zephyr-latest/boards/aspeed/ast1030_evb/doc/ |
D | index.rst | 13 - ARM Cortex-M4F Processor 14 - 768 KB on-chip SRAM for instruction and data memory 15 - 1 MB on-chip Flash memory for boot ROM and data storage 16 - SPI interface 17 - UART interface 18 - I2C/I3C interface 19 - FAN PWM interface 20 - ADC interface 21 - JTAG interface 22 - USB interface [all …]
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