Searched +full:sck +full:- +full:differential +full:- +full:clock (Results 1 – 5 of 5) sorted by relevance
| /Zephyr-Core-3.6.0/dts/bindings/spi/ |
| D | nxp,imx-flexspi.yaml | 1 # Copyright 2018-2023, NXP
2 # SPDX-License-Identifier: Apache-2.0
6 compatible: "nxp,imx-flexspi"
8 include: [spi-controller.yaml, pinctrl-device.yaml]
17 ahb-bufferable:
23 ahb-cacheable:
29 ahb-prefetch:
34 ahb-read-addr-opt:
40 combination-mode:
46 sck-differential-clock:
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| /Zephyr-Core-3.6.0/boards/arm/mimxrt1060_evk/ |
| D | mimxrt1060_evk_hyperflash.dts | 4 * SPDX-License-Identifier: Apache-2.0
9 /delete-node/ &is25wp064;
13 zephyr,flash-controller = &s26ks512s0;
15 zephyr,code-partition = &slot0_partition;
21 ahb-prefetch;
22 ahb-read-addr-opt;
23 ahb-bufferable;
24 ahb-cacheable;
25 sck-differential-clock;
26 combination-mode;
[all …]
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| /Zephyr-Core-3.6.0/boards/arm/mimxrt1050_evk/ |
| D | mimxrt1050_evk.dts | 4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
10 #include "mimxrt1050_evk-pinctrl.dtsi"
11 #include <zephyr/dt-bindings/display/panel.h>
12 #include <zephyr/dt-bindings/input/input-event-codes.h>
15 model = "NXP MIMXRT1050-EVK board";
32 zephyr,shell-uart = &lpuart1;
33 zephyr,flash-controller = &s26ks512s0;
35 zephyr,code-partition = &slot0_partition;
40 /* Micron MT48LC16M16A2B4-6AIT:G */
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| /Zephyr-Core-3.6.0/boards/arm/mimxrt1062_fmurt6/ |
| D | mimxrt1062_fmurt6.dts | 2 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
10 #include "mimxrt1062_fmurt6-pinctrl.dtsi"
11 #include <zephyr/dt-bindings/pwm/pwm.h>
25 telem4-gps2 = &lpuart5;
29 zephyr,flash-controller = &s26ks512s0;
31 zephyr,code-partition = &slot0_partition;
36 zephyr,shell-uart = &lpuart7;
41 compatible = "gpio-leds";
42 green_led: led-1 {
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| /Zephyr-Core-3.6.0/soc/arm/nxp_imx/rt/ |
| D | flexspi_nor_config.h | 6 * SPDX-License-Identifier: Apache-2.0
139 /* !< Bit for Differential clock enable */
151 /* !< Bit for DDR clock configuration indication. */
186 /* !< Switch to 0-4-4/0-8-8 mode */
199 /* !< [0x000-0x003] Tag, fixed value 0x42464346UL */
201 /* !< [0x004-0x007] Version,[31:24] -'V', [23:16] - Major, [15:8] - Minor, [7:0] - bugfix */
203 /* !< [0x008-0x00b] Reserved for future use */
205 /* !< [0x00c-0x00c] Read Sample Clock Source, valid value: 0/1/3 */
207 /* !< [0x00d-0x00d] CS hold time, default value: 3 */
209 /* !< [0x00e-0x00e] CS setup time, default value: 3 */
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