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/Zephyr-latest/dts/bindings/ethernet/
Dxlnx,gem.yaml3 # SPDX-License-Identifier: Apache-2.0
10 include: ethernet-controller.yaml
19 clock-frequency:
23 Specifies the base clock frequency from which the GEM's TX clock
25 clock control register in the CRL_APB. The GEM's TX clock frequency
27 which it will be adjusted at run-time. Therefore, the value of this
29 respective GEM's TX clock - by default, this is the IO PLL.
31 mdc-divider:
42 init-mdio-phy:
45 Activates the management of a PHY associated with the controller in-
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