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/cmsis-dsp-3.7.0-3.6.0/PythonWrapper/examples/kws_example/
Dsched.py72 sdfError = src.run()
75 sdfError = audioWin.run()
78 sdfError = feature.run()
81 sdfError = src.run()
84 sdfError = audioWin.run()
87 sdfError = feature.run()
90 sdfError = src.run()
93 sdfError = audioWin.run()
96 sdfError = feature.run()
99 sdfError = src.run()
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Dappnodes.py40 def run(self): member in Sink
59 def run(self): member in Source
100 def run(self): member in FIR
120 def run(self): member in Feature
140 def run(self): member in KWS
/cmsis-dsp-3.7.0-3.6.0/Testing/cmsis_build/
Drunall.py70 # Run a command and get error or result
75 def run(*args,mustPrint=False,dumpStdErr=True): function
81 result=subprocess.run(args,text=True,capture_output=True,timeout=600)
131 # Run AVH
142 res=run(avh,"-f",config,app)
153 # Load all the test suite to run
254 # Run the tests and log the result
260 res=run("csolution","convert","-s",s)
280 …res=run(sys.executable,"../processTests.py","-gen","..","-p","../Patterns","-d","../Parameters","-…
294 res=run("cbuild",buildFile)
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Dquicktest.bat9 REM ECHO "Run"
18 REM ECHO "Run"
27 ECHO "Run"
36 REM ECHO "Run"
/cmsis-dsp-3.7.0-3.6.0/Testing/
DREADME.md24 The commands must be run from Testing folder:
36 **Now the test suite you want to run can be selected:**
40 Each time you want to change the test suite to run, you need to execute this function. No need to r…
53 The CMSIS build tools must be installed and configured. You may need to run the CMSIS build tools s…
71 **You can then run the executable on Virtual Hardware.**
73 For instance, to run the test on the virtual hardware for Corstone 300, if you have the Arm MDK ins…
131 #### R10 : The test may be run on the DUT or on the host
137 #### R13 : Control of the tests could run on the DUT but could also be run on a host
220 A benchmark will often have to be run with different lengths for the input.
315 So, the number of possible run must be a multiple of 3 since we need to specify values for all para…
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/cmsis-dsp-3.7.0-3.6.0/Examples/ARM/arm_bayes_example/
DARMCM55_FP_MVE_config.txt5 cpu0.cpi_div=1 # (int , run-time ) default = '0x1' : di…
6 cpu0.cpi_mul=1 # (int , run-time ) default = '0x1' : mu…
7 cpu0.min_sync_level=3 # (int , run-time ) default = '0x0' : fo…
16 #cpu1.cpi_div=1 # (int , run-time ) default = '0x1' : d…
17 #cpu1.cpi_mul=1 # (int , run-time ) default = '0x1' : m…
18 #cpu1.min_sync_level=3 # (int , run-time ) default = '0x0' : f…
DARMCM0_config.txt5 armcortexm0ct.cpi_div=1 # (int , run-time ) default = '0x1' : di…
6 armcortexm0ct.cpi_mul=1 # (int , run-time ) default = '0x1' : mu…
7 armcortexm0ct.min_sync_level=3 # (int , run-time ) default = '0x0' : fo…
DARMCM3_config.txt5 armcortexm3ct.cpi_div=1 # (int , run-time ) default = '0x1' : di…
6 armcortexm3ct.cpi_mul=1 # (int , run-time ) default = '0x1' : mu…
7 armcortexm3ct.min_sync_level=3 # (int , run-time ) default = '0x0' : fo…
DARMCM4_FP_config.txt5 armcortexm4ct.cpi_div=1 # (int , run-time ) default = '0x1' : di…
6 armcortexm4ct.cpi_mul=1 # (int , run-time ) default = '0x1' : mu…
7 armcortexm4ct.min_sync_level=3 # (int , run-time ) default = '0x0' : fo…
DARMCM7_SP_config.txt5 armcortexm7ct.cpi_div=1 # (int , run-time ) default = '0x1' : di…
6 armcortexm7ct.cpi_mul=1 # (int , run-time ) default = '0x1' : mu…
7 armcortexm7ct.min_sync_level=3 # (int , run-time ) default = '0x0' : fo…
/cmsis-dsp-3.7.0-3.6.0/Examples/ARM/arm_svm_example/
DARMCM55_FP_MVE_config.txt5 cpu0.cpi_div=1 # (int , run-time ) default = '0x1' : di…
6 cpu0.cpi_mul=1 # (int , run-time ) default = '0x1' : mu…
7 cpu0.min_sync_level=3 # (int , run-time ) default = '0x0' : fo…
16 #cpu1.cpi_div=1 # (int , run-time ) default = '0x1' : d…
17 #cpu1.cpi_mul=1 # (int , run-time ) default = '0x1' : m…
18 #cpu1.min_sync_level=3 # (int , run-time ) default = '0x0' : f…
DARMCM0_config.txt5 armcortexm0ct.cpi_div=1 # (int , run-time ) default = '0x1' : di…
6 armcortexm0ct.cpi_mul=1 # (int , run-time ) default = '0x1' : mu…
7 armcortexm0ct.min_sync_level=3 # (int , run-time ) default = '0x0' : fo…
DARMCM3_config.txt5 armcortexm3ct.cpi_div=1 # (int , run-time ) default = '0x1' : di…
6 armcortexm3ct.cpi_mul=1 # (int , run-time ) default = '0x1' : mu…
7 armcortexm3ct.min_sync_level=3 # (int , run-time ) default = '0x0' : fo…
DARMCM4_FP_config.txt5 armcortexm4ct.cpi_div=1 # (int , run-time ) default = '0x1' : di…
6 armcortexm4ct.cpi_mul=1 # (int , run-time ) default = '0x1' : mu…
7 armcortexm4ct.min_sync_level=3 # (int , run-time ) default = '0x0' : fo…
/cmsis-dsp-3.7.0-3.6.0/Examples/ARM/arm_class_marks_example/
DARMCM55_FP_MVE_config.txt5 cpu0.cpi_div=1 # (int , run-time ) default = '0x1' : di…
6 cpu0.cpi_mul=1 # (int , run-time ) default = '0x1' : mu…
7 cpu0.min_sync_level=3 # (int , run-time ) default = '0x0' : fo…
16 #cpu1.cpi_div=1 # (int , run-time ) default = '0x1' : d…
17 #cpu1.cpi_mul=1 # (int , run-time ) default = '0x1' : m…
18 #cpu1.min_sync_level=3 # (int , run-time ) default = '0x0' : f…
/cmsis-dsp-3.7.0-3.6.0/Examples/ARM/arm_variance_example/
DARMCM55_FP_MVE_config.txt5 cpu0.cpi_div=1 # (int , run-time ) default = '0x1' : di…
6 cpu0.cpi_mul=1 # (int , run-time ) default = '0x1' : mu…
7 cpu0.min_sync_level=3 # (int , run-time ) default = '0x0' : fo…
16 #cpu1.cpi_div=1 # (int , run-time ) default = '0x1' : d…
17 #cpu1.cpi_mul=1 # (int , run-time ) default = '0x1' : m…
18 #cpu1.min_sync_level=3 # (int , run-time ) default = '0x0' : f…
/cmsis-dsp-3.7.0-3.6.0/Examples/ARM/arm_convolution_example/
DARMCM55_FP_MVE_config.txt5 cpu0.cpi_div=1 # (int , run-time ) default = '0x1' : di…
6 cpu0.cpi_mul=1 # (int , run-time ) default = '0x1' : mu…
7 cpu0.min_sync_level=3 # (int , run-time ) default = '0x0' : fo…
16 #cpu1.cpi_div=1 # (int , run-time ) default = '0x1' : d…
17 #cpu1.cpi_mul=1 # (int , run-time ) default = '0x1' : m…
18 #cpu1.min_sync_level=3 # (int , run-time ) default = '0x0' : f…
/cmsis-dsp-3.7.0-3.6.0/Examples/ARM/arm_dotproduct_example/
DARMCM55_FP_MVE_config.txt5 cpu0.cpi_div=1 # (int , run-time ) default = '0x1' : di…
6 cpu0.cpi_mul=1 # (int , run-time ) default = '0x1' : mu…
7 cpu0.min_sync_level=3 # (int , run-time ) default = '0x0' : fo…
16 #cpu1.cpi_div=1 # (int , run-time ) default = '0x1' : d…
17 #cpu1.cpi_mul=1 # (int , run-time ) default = '0x1' : m…
18 #cpu1.min_sync_level=3 # (int , run-time ) default = '0x0' : f…
/cmsis-dsp-3.7.0-3.6.0/Examples/ARM/arm_fft_bin_example/
DARMCM55_FP_MVE_config.txt5 cpu0.cpi_div=1 # (int , run-time ) default = '0x1' : di…
6 cpu0.cpi_mul=1 # (int , run-time ) default = '0x1' : mu…
7 cpu0.min_sync_level=3 # (int , run-time ) default = '0x0' : fo…
16 #cpu1.cpi_div=1 # (int , run-time ) default = '0x1' : d…
17 #cpu1.cpi_mul=1 # (int , run-time ) default = '0x1' : m…
18 #cpu1.min_sync_level=3 # (int , run-time ) default = '0x0' : f…
/cmsis-dsp-3.7.0-3.6.0/Examples/ARM/arm_fir_example/
DARMCM55_FP_MVE_config.txt5 cpu0.cpi_div=1 # (int , run-time ) default = '0x1' : di…
6 cpu0.cpi_mul=1 # (int , run-time ) default = '0x1' : mu…
7 cpu0.min_sync_level=3 # (int , run-time ) default = '0x0' : fo…
16 #cpu1.cpi_div=1 # (int , run-time ) default = '0x1' : d…
17 #cpu1.cpi_mul=1 # (int , run-time ) default = '0x1' : m…
18 #cpu1.min_sync_level=3 # (int , run-time ) default = '0x0' : f…
/cmsis-dsp-3.7.0-3.6.0/Examples/ARM/arm_matrix_example/
DARMCM55_FP_MVE_config.txt5 cpu0.cpi_div=1 # (int , run-time ) default = '0x1' : di…
6 cpu0.cpi_mul=1 # (int , run-time ) default = '0x1' : mu…
7 cpu0.min_sync_level=3 # (int , run-time ) default = '0x0' : fo…
16 #cpu1.cpi_div=1 # (int , run-time ) default = '0x1' : d…
17 #cpu1.cpi_mul=1 # (int , run-time ) default = '0x1' : m…
18 #cpu1.min_sync_level=3 # (int , run-time ) default = '0x0' : f…
/cmsis-dsp-3.7.0-3.6.0/Examples/ARM/arm_signal_converge_example/
DARMCM55_FP_MVE_config.txt5 cpu0.cpi_div=1 # (int , run-time ) default = '0x1' : di…
6 cpu0.cpi_mul=1 # (int , run-time ) default = '0x1' : mu…
7 cpu0.min_sync_level=3 # (int , run-time ) default = '0x0' : fo…
16 #cpu1.cpi_div=1 # (int , run-time ) default = '0x1' : d…
17 #cpu1.cpi_mul=1 # (int , run-time ) default = '0x1' : m…
18 #cpu1.min_sync_level=3 # (int , run-time ) default = '0x0' : f…
/cmsis-dsp-3.7.0-3.6.0/Examples/ARM/arm_sin_cos_example/
DARMCM55_FP_MVE_config.txt5 cpu0.cpi_div=1 # (int , run-time ) default = '0x1' : di…
6 cpu0.cpi_mul=1 # (int , run-time ) default = '0x1' : mu…
7 cpu0.min_sync_level=3 # (int , run-time ) default = '0x0' : fo…
16 #cpu1.cpi_div=1 # (int , run-time ) default = '0x1' : d…
17 #cpu1.cpi_mul=1 # (int , run-time ) default = '0x1' : m…
18 #cpu1.min_sync_level=3 # (int , run-time ) default = '0x0' : f…
/cmsis-dsp-3.7.0-3.6.0/Examples/ARM/arm_linear_interp_example/
DARMCM55_FP_MVE_config.txt5 cpu0.cpi_div=1 # (int , run-time ) default = '0x1' : di…
6 cpu0.cpi_mul=1 # (int , run-time ) default = '0x1' : mu…
7 cpu0.min_sync_level=3 # (int , run-time ) default = '0x0' : fo…
16 #cpu1.cpi_div=1 # (int , run-time ) default = '0x1' : d…
17 #cpu1.cpi_mul=1 # (int , run-time ) default = '0x1' : m…
18 #cpu1.min_sync_level=3 # (int , run-time ) default = '0x0' : f…
/cmsis-dsp-3.7.0-3.6.0/Examples/ARM/arm_graphic_equalizer_example/
DARMCM55_FP_MVE_config.txt5 cpu0.cpi_div=1 # (int , run-time ) default = '0x1' : di…
6 cpu0.cpi_mul=1 # (int , run-time ) default = '0x1' : mu…
7 cpu0.min_sync_level=3 # (int , run-time ) default = '0x0' : fo…
16 #cpu1.cpi_div=1 # (int , run-time ) default = '0x1' : d…
17 #cpu1.cpi_mul=1 # (int , run-time ) default = '0x1' : m…
18 #cpu1.min_sync_level=3 # (int , run-time ) default = '0x0' : f…

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