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/Zephyr-latest/dts/bindings/i2c/
Drenesas,ra-iic.yaml2 # SPDX-License-Identifier: Apache-2.0
6 compatible: "renesas,ra-iic"
8 include: [i2c-controller.yaml, pinctrl-device.yaml]
21 rise-time-ns:
25 fall-time-ns:
29 duty-cycle-percent:
33 interrupt-priority-level:
/Zephyr-latest/dts/bindings/auxdisplay/
Dhit,hd44780.yaml4 # SPDX-License-Identifier: Apache-2.0
11 include: [auxdisplay-device.yaml]
17 description: Operating mode of display, 8-bit or 4 for 4-bit mode
19 - 4
20 - 8
22 register-select-gpios:
23 type: phandle-array
27 read-write-gpios:
28 type: phandle-array
31 enable-gpios:
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/Zephyr-latest/drivers/i2c/
Di2c_sam0.c4 * SPDX-License-Identifier: Apache-2.0
21 #include "i2c-priv.h"
73 while ((regs->SYNCBUSY.reg & SERCOM_I2CM_SYNCBUSY_MASK) != 0) { in wait_synchronization()
77 while ((regs->STATUS.reg & SERCOM_I2CM_STATUS_SYNCBUSY) != 0) { in wait_synchronization()
86 struct i2c_sam0_dev_data *data = dev->data; in i2c_sam0_terminate_on_error()
87 const struct i2c_sam0_dev_config *const cfg = dev->config; in i2c_sam0_terminate_on_error()
88 SercomI2cm *i2c = cfg->regs; in i2c_sam0_terminate_on_error()
90 if (!(i2c->STATUS.reg & (SERCOM_I2CM_STATUS_ARBLOST | in i2c_sam0_terminate_on_error()
107 if (cfg->dma_channel != 0xFF) { in i2c_sam0_terminate_on_error()
108 dma_stop(cfg->dma_dev, cfg->dma_channel); in i2c_sam0_terminate_on_error()
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Di2c_ll_stm32_v2.c5 * SPDX-License-Identifier: Apache-2.0
28 #include "i2c-priv.h"
40 #define STM32_I2C_ANALOG_FILTER_DELAY_MIN 50U /* ns */
41 #define STM32_I2C_ANALOG_FILTER_DELAY_MAX 260U /* ns */
55 uint32_t hddat_min; /* Minimum data hold time in ns */
56 uint32_t vddat_max; /* Maximum data valid time in ns */
57 uint32_t sudat_min; /* Minimum data setup time in ns */
58 uint32_t lscl_min; /* Minimum low period of the SCL clock in ns */
59 uint32_t hscl_min; /* Minimum high period of SCL clock in ns */
60 uint32_t trise; /* Rise time in ns */
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/Zephyr-latest/drivers/i3c/
Di3c_cdns.c4 * SPDX-License-Identifier: Apache-2.0
472 /* Target T_LOW period in open-drain mode. */
477 * minimum of the clock rise and fall time plus 3ns
484 /* command tx fifo threshold - unused */
486 /* in-band-interrupt data fifo threshold - unused */
488 /* in-band-interrupt response queue threshold */
490 /* tx data threshold - unused */
611 for (i = 15; i >= 0; --i) { in i3c_cdns_crc5()
660 /* Returns [7:1] 7-bit addr, [0] even/xor parity */
668 b = b & (b - 1); in cdns_i3c_even_parity_byte()
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