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/hal_stm32-2.7.6/.github/workflows/
Dtest.yml7 runs-on: ubuntu-latest
9 fail-fast: false
11 python-version: [3.6, 3.7, 3.8]
13 - uses: actions/checkout@v1
14 - name: Set up Python
15 uses: actions/setup-python@v1
17 python-version: ${{ matrix.python-version }}
18 - name: install dependencies
20 pip3 install -r scripts/requirements.txt
21 pip3 install -r scripts/requirements-test.txt
[all …]
/hal_stm32-2.7.6/stm32cube/stm32mp1xx/soc/
Dstm32mp157fxx_cm4.h8 * - Data structures and the address mapping for all peripherals
9 * - Peripheral's registers declarations and bits definition
10 * - Macros to access peripherals registers hardware
18 * This software component is licensed by ST under BSD 3-Clause license,
21 * opensource.org/licenses/BSD-3-Clause
60 …/****** Cortex-M Processor Exceptions Numbers ***************************************************…
61 …NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt …
62 …HardFault_IRQn = -13, /*!< 4 Cortex-M Memory Management Interrupt …
63 …MemoryManagement_IRQn = -12, /*!< 4 Cortex-M Memory Management Interrupt …
64 …BusFault_IRQn = -11, /*!< 5 Cortex-M Bus Fault Interrupt …
[all …]
Dstm32mp157cxx_cm4.h8 * - Data structures and the address mapping for all peripherals
9 * - Peripheral's registers declarations and bits definition
10 * - Macros to access peripherals registers hardware
18 * This software component is licensed by ST under BSD 3-Clause license,
21 * opensource.org/licenses/BSD-3-Clause
60 …/****** Cortex-M Processor Exceptions Numbers ***************************************************…
61 …NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt …
62 …HardFault_IRQn = -13, /*!< 4 Cortex-M Memory Management Interrupt …
63 …MemoryManagement_IRQn = -12, /*!< 4 Cortex-M Memory Management Interrupt …
64 …BusFault_IRQn = -11, /*!< 5 Cortex-M Bus Fault Interrupt …
[all …]
Dstm32mp157axx_cm4.h8 * - Data structures and the address mapping for all peripherals
9 * - Peripheral's registers declarations and bits definition
10 * - Macros to access peripherals registers hardware
18 * This software component is licensed by ST under BSD 3-Clause license,
21 * opensource.org/licenses/BSD-3-Clause
60 …/****** Cortex-M Processor Exceptions Numbers ***************************************************…
61 …NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt …
62 …HardFault_IRQn = -13, /*!< 4 Cortex-M Memory Management Interrupt …
63 …MemoryManagement_IRQn = -12, /*!< 4 Cortex-M Memory Management Interrupt …
64 …BusFault_IRQn = -11, /*!< 5 Cortex-M Bus Fault Interrupt …
[all …]
Dstm32mp157dxx_cm4.h8 * - Data structures and the address mapping for all peripherals
9 * - Peripheral's registers declarations and bits definition
10 * - Macros to access peripherals registers hardware
18 * This software component is licensed by ST under BSD 3-Clause license,
21 * opensource.org/licenses/BSD-3-Clause
60 …/****** Cortex-M Processor Exceptions Numbers ***************************************************…
61 …NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt …
62 …HardFault_IRQn = -13, /*!< 4 Cortex-M Memory Management Interrupt …
63 …MemoryManagement_IRQn = -12, /*!< 4 Cortex-M Memory Management Interrupt …
64 …BusFault_IRQn = -11, /*!< 5 Cortex-M Bus Fault Interrupt …
[all …]
Dstm32mp157axx_ca7.h8 * - Data structures and the address mapping for all peripherals
9 * - Peripheral's registers declarations and bits definition
10 * - Macros to access peripherals registers hardware
18 * This software component is licensed by ST under BSD 3-Clause license,
21 * opensource.org/licenses/BSD-3-Clause
60 …/****** Cortex-A Processor Specific Interrupt Numbers *******************************************…
84 …NonSecurePhysicalTimer_IRQn = 30, /*!< Non-Secure Physical Timer Interrupt …
181 …CEC_IRQn = 126, /*!< HDMI-CEC global Interrupt …
184 …SPDIF_RX_IRQn = 129, /*!< SPDIF-RX global Interrupt …
236 …WAKEUP_PIN_IRQn = 181, /*!< Interrupt for all 6 wake-up pins …
[all …]
Dstm32mp157dxx_ca7.h8 * - Data structures and the address mapping for all peripherals
9 * - Peripheral's registers declarations and bits definition
10 * - Macros to access peripherals registers hardware
18 * This software component is licensed by ST under BSD 3-Clause license,
21 * opensource.org/licenses/BSD-3-Clause
60 …/****** Cortex-A Processor Specific Interrupt Numbers *******************************************…
84 …NonSecurePhysicalTimer_IRQn = 30, /*!< Non-Secure Physical Timer Interrupt …
181 …CEC_IRQn = 126, /*!< HDMI-CEC global Interrupt …
184 …SPDIF_RX_IRQn = 129, /*!< SPDIF-RX global Interrupt …
236 …WAKEUP_PIN_IRQn = 181, /*!< Interrupt for all 6 wake-up pins …
[all …]
Dstm32mp153fxx_cm4.h8 * - Data structures and the address mapping for all peripherals
9 * - Peripheral's registers declarations and bits definition
10 * - Macros to access peripherals registers hardware
18 * This software component is licensed by ST under BSD 3-Clause license,
21 * opensource.org/licenses/BSD-3-Clause
60 …/****** Cortex-M Processor Exceptions Numbers ***************************************************…
61 …NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt …
62 …HardFault_IRQn = -13, /*!< 4 Cortex-M Memory Management Interrupt …
63 …MemoryManagement_IRQn = -12, /*!< 4 Cortex-M Memory Management Interrupt …
64 …BusFault_IRQn = -11, /*!< 5 Cortex-M Bus Fault Interrupt …
[all …]
Dstm32mp153cxx_cm4.h8 * - Data structures and the address mapping for all peripherals
9 * - Peripheral's registers declarations and bits definition
10 * - Macros to access peripherals registers hardware
18 * This software component is licensed by ST under BSD 3-Clause license,
21 * opensource.org/licenses/BSD-3-Clause
60 …/****** Cortex-M Processor Exceptions Numbers ***************************************************…
61 …NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt …
62 …HardFault_IRQn = -13, /*!< 4 Cortex-M Memory Management Interrupt …
63 …MemoryManagement_IRQn = -12, /*!< 4 Cortex-M Memory Management Interrupt …
64 …BusFault_IRQn = -11, /*!< 5 Cortex-M Bus Fault Interrupt …
[all …]
Dstm32mp153axx_cm4.h8 * - Data structures and the address mapping for all peripherals
9 * - Peripheral's registers declarations and bits definition
10 * - Macros to access peripherals registers hardware
18 * This software component is licensed by ST under BSD 3-Clause license,
21 * opensource.org/licenses/BSD-3-Clause
60 …/****** Cortex-M Processor Exceptions Numbers ***************************************************…
61 …NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt …
62 …HardFault_IRQn = -13, /*!< 4 Cortex-M Memory Management Interrupt …
63 …MemoryManagement_IRQn = -12, /*!< 4 Cortex-M Memory Management Interrupt …
64 …BusFault_IRQn = -11, /*!< 5 Cortex-M Bus Fault Interrupt …
[all …]
Dstm32mp153dxx_cm4.h8 * - Data structures and the address mapping for all peripherals
9 * - Peripheral's registers declarations and bits definition
10 * - Macros to access peripherals registers hardware
18 * This software component is licensed by ST under BSD 3-Clause license,
21 * opensource.org/licenses/BSD-3-Clause
60 …/****** Cortex-M Processor Exceptions Numbers ***************************************************…
61 …NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt …
62 …HardFault_IRQn = -13, /*!< 4 Cortex-M Memory Management Interrupt …
63 …MemoryManagement_IRQn = -12, /*!< 4 Cortex-M Memory Management Interrupt …
64 …BusFault_IRQn = -11, /*!< 5 Cortex-M Bus Fault Interrupt …
[all …]
Dstm32mp151cxx_cm4.h8 * - Data structures and the address mapping for all peripherals
9 * - Peripheral's registers declarations and bits definition
10 * - Macros to access peripherals registers hardware
18 * This software component is licensed by ST under BSD 3-Clause license,
21 * opensource.org/licenses/BSD-3-Clause
60 …/****** Cortex-M Processor Exceptions Numbers ***************************************************…
61 …NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt …
62 …HardFault_IRQn = -13, /*!< 4 Cortex-M Memory Management Interrupt …
63 …MemoryManagement_IRQn = -12, /*!< 4 Cortex-M Memory Management Interrupt …
64 …BusFault_IRQn = -11, /*!< 5 Cortex-M Bus Fault Interrupt …
[all …]
Dstm32mp151fxx_cm4.h8 * - Data structures and the address mapping for all peripherals
9 * - Peripheral's registers declarations and bits definition
10 * - Macros to access peripherals registers hardware
18 * This software component is licensed by ST under BSD 3-Clause license,
21 * opensource.org/licenses/BSD-3-Clause
60 …/****** Cortex-M Processor Exceptions Numbers ***************************************************…
61 …NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt …
62 …HardFault_IRQn = -13, /*!< 4 Cortex-M Memory Management Interrupt …
63 …MemoryManagement_IRQn = -12, /*!< 4 Cortex-M Memory Management Interrupt …
64 …BusFault_IRQn = -11, /*!< 5 Cortex-M Bus Fault Interrupt …
[all …]
Dstm32mp151dxx_cm4.h8 * - Data structures and the address mapping for all peripherals
9 * - Peripheral's registers declarations and bits definition
10 * - Macros to access peripherals registers hardware
18 * This software component is licensed by ST under BSD 3-Clause license,
21 * opensource.org/licenses/BSD-3-Clause
60 …/****** Cortex-M Processor Exceptions Numbers ***************************************************…
61 …NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt …
62 …HardFault_IRQn = -13, /*!< 4 Cortex-M Memory Management Interrupt …
63 …MemoryManagement_IRQn = -12, /*!< 4 Cortex-M Memory Management Interrupt …
64 …BusFault_IRQn = -11, /*!< 5 Cortex-M Bus Fault Interrupt …
[all …]
Dstm32mp151axx_cm4.h8 * - Data structures and the address mapping for all peripherals
9 * - Peripheral's registers declarations and bits definition
10 * - Macros to access peripherals registers hardware
18 * This software component is licensed by ST under BSD 3-Clause license,
21 * opensource.org/licenses/BSD-3-Clause
60 …/****** Cortex-M Processor Exceptions Numbers ***************************************************…
61 …NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt …
62 …HardFault_IRQn = -13, /*!< 4 Cortex-M Memory Management Interrupt …
63 …MemoryManagement_IRQn = -12, /*!< 4 Cortex-M Memory Management Interrupt …
64 …BusFault_IRQn = -11, /*!< 5 Cortex-M Bus Fault Interrupt …
[all …]
Dstm32mp153cxx_ca7.h8 * - Data structures and the address mapping for all peripherals
9 * - Peripheral's registers declarations and bits definition
10 * - Macros to access peripherals registers hardware
18 * This software component is licensed by ST under BSD 3-Clause license,
21 * opensource.org/licenses/BSD-3-Clause
60 …/****** Cortex-A Processor Specific Interrupt Numbers *******************************************…
84 …NonSecurePhysicalTimer_IRQn = 30, /*!< Non-Secure Physical Timer Interrupt …
181 …CEC_IRQn = 126, /*!< HDMI-CEC global Interrupt …
184 …SPDIF_RX_IRQn = 129, /*!< SPDIF-RX global Interrupt …
236 …WAKEUP_PIN_IRQn = 181, /*!< Interrupt for all 6 wake-up pins …
[all …]
Dstm32mp153fxx_ca7.h8 * - Data structures and the address mapping for all peripherals
9 * - Peripheral's registers declarations and bits definition
10 * - Macros to access peripherals registers hardware
18 * This software component is licensed by ST under BSD 3-Clause license,
21 * opensource.org/licenses/BSD-3-Clause
60 …/****** Cortex-A Processor Specific Interrupt Numbers *******************************************…
84 …NonSecurePhysicalTimer_IRQn = 30, /*!< Non-Secure Physical Timer Interrupt …
181 …CEC_IRQn = 126, /*!< HDMI-CEC global Interrupt …
184 …SPDIF_RX_IRQn = 129, /*!< SPDIF-RX global Interrupt …
236 …WAKEUP_PIN_IRQn = 181, /*!< Interrupt for all 6 wake-up pins …
[all …]
Dstm32mp153axx_ca7.h8 * - Data structures and the address mapping for all peripherals
9 * - Peripheral's registers declarations and bits definition
10 * - Macros to access peripherals registers hardware
18 * This software component is licensed by ST under BSD 3-Clause license,
21 * opensource.org/licenses/BSD-3-Clause
60 …/****** Cortex-A Processor Specific Interrupt Numbers *******************************************…
84 …NonSecurePhysicalTimer_IRQn = 30, /*!< Non-Secure Physical Timer Interrupt …
181 …CEC_IRQn = 126, /*!< HDMI-CEC global Interrupt …
184 …SPDIF_RX_IRQn = 129, /*!< SPDIF-RX global Interrupt …
236 …WAKEUP_PIN_IRQn = 181, /*!< Interrupt for all 6 wake-up pins …
[all …]
Dstm32mp153dxx_ca7.h8 * - Data structures and the address mapping for all peripherals
9 * - Peripheral's registers declarations and bits definition
10 * - Macros to access peripherals registers hardware
18 * This software component is licensed by ST under BSD 3-Clause license,
21 * opensource.org/licenses/BSD-3-Clause
60 …/****** Cortex-A Processor Specific Interrupt Numbers *******************************************…
84 …NonSecurePhysicalTimer_IRQn = 30, /*!< Non-Secure Physical Timer Interrupt …
181 …CEC_IRQn = 126, /*!< HDMI-CEC global Interrupt …
184 …SPDIF_RX_IRQn = 129, /*!< SPDIF-RX global Interrupt …
236 …WAKEUP_PIN_IRQn = 181, /*!< Interrupt for all 6 wake-up pins …
[all …]
Dstm32mp151cxx_ca7.h8 * - Data structures and the address mapping for all peripherals
9 * - Peripheral's registers declarations and bits definition
10 * - Macros to access peripherals registers hardware
18 * This software component is licensed by ST under BSD 3-Clause license,
21 * opensource.org/licenses/BSD-3-Clause
60 …/****** Cortex-A Processor Specific Interrupt Numbers *******************************************…
84 …NonSecurePhysicalTimer_IRQn = 30, /*!< Non-Secure Physical Timer Interrupt …
181 …CEC_IRQn = 126, /*!< HDMI-CEC global Interrupt …
184 …SPDIF_RX_IRQn = 129, /*!< SPDIF-RX global Interrupt …
236 …WAKEUP_PIN_IRQn = 181, /*!< Interrupt for all 6 wake-up pins …
[all …]
Dstm32mp151fxx_ca7.h8 * - Data structures and the address mapping for all peripherals
9 * - Peripheral's registers declarations and bits definition
10 * - Macros to access peripherals registers hardware
18 * This software component is licensed by ST under BSD 3-Clause license,
21 * opensource.org/licenses/BSD-3-Clause
60 …/****** Cortex-A Processor Specific Interrupt Numbers *******************************************…
84 …NonSecurePhysicalTimer_IRQn = 30, /*!< Non-Secure Physical Timer Interrupt …
181 …CEC_IRQn = 126, /*!< HDMI-CEC global Interrupt …
184 …SPDIF_RX_IRQn = 129, /*!< SPDIF-RX global Interrupt …
236 …WAKEUP_PIN_IRQn = 181, /*!< Interrupt for all 6 wake-up pins …
[all …]
Dstm32mp151axx_ca7.h8 * - Data structures and the address mapping for all peripherals
9 * - Peripheral's registers declarations and bits definition
10 * - Macros to access peripherals registers hardware
18 * This software component is licensed by ST under BSD 3-Clause license,
21 * opensource.org/licenses/BSD-3-Clause
60 …/****** Cortex-A Processor Specific Interrupt Numbers *******************************************…
84 …NonSecurePhysicalTimer_IRQn = 30, /*!< Non-Secure Physical Timer Interrupt …
181 …CEC_IRQn = 126, /*!< HDMI-CEC global Interrupt …
184 …SPDIF_RX_IRQn = 129, /*!< SPDIF-RX global Interrupt …
236 …WAKEUP_PIN_IRQn = 181, /*!< Interrupt for all 6 wake-up pins …
[all …]
Dstm32mp151dxx_ca7.h8 * - Data structures and the address mapping for all peripherals
9 * - Peripheral's registers declarations and bits definition
10 * - Macros to access peripherals registers hardware
18 * This software component is licensed by ST under BSD 3-Clause license,
21 * opensource.org/licenses/BSD-3-Clause
60 …/****** Cortex-A Processor Specific Interrupt Numbers *******************************************…
84 …NonSecurePhysicalTimer_IRQn = 30, /*!< Non-Secure Physical Timer Interrupt …
181 …CEC_IRQn = 126, /*!< HDMI-CEC global Interrupt …
184 …SPDIF_RX_IRQn = 129, /*!< SPDIF-RX global Interrupt …
236 …WAKEUP_PIN_IRQn = 181, /*!< Interrupt for all 6 wake-up pins …
[all …]
Dstm32mp157cxx_ca7.h8 * - Data structures and the address mapping for all peripherals
9 * - Peripheral's registers declarations and bits definition
10 * - Macros to access peripherals registers hardware
18 * This software component is licensed by ST under BSD 3-Clause license,
21 * opensource.org/licenses/BSD-3-Clause
60 …/****** Cortex-A Processor Specific Interrupt Numbers *******************************************…
84 …NonSecurePhysicalTimer_IRQn = 30, /*!< Non-Secure Physical Timer Interrupt …
181 …CEC_IRQn = 126, /*!< HDMI-CEC global Interrupt …
184 …SPDIF_RX_IRQn = 129, /*!< SPDIF-RX global Interrupt …
236 …WAKEUP_PIN_IRQn = 181, /*!< Interrupt for all 6 wake-up pins …
[all …]
Dstm32mp157fxx_ca7.h8 * - Data structures and the address mapping for all peripherals
9 * - Peripheral's registers declarations and bits definition
10 * - Macros to access peripherals registers hardware
18 * This software component is licensed by ST under BSD 3-Clause license,
21 * opensource.org/licenses/BSD-3-Clause
60 …/****** Cortex-A Processor Specific Interrupt Numbers *******************************************…
84 …NonSecurePhysicalTimer_IRQn = 30, /*!< Non-Secure Physical Timer Interrupt …
181 …CEC_IRQn = 126, /*!< HDMI-CEC global Interrupt …
184 …SPDIF_RX_IRQn = 129, /*!< SPDIF-RX global Interrupt …
236 …WAKEUP_PIN_IRQn = 181, /*!< Interrupt for all 6 wake-up pins …
[all …]