Searched +full:pwm +full:- +full:cells (Results 1 – 25 of 388) sorted by relevance
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/Zephyr-Core-3.7.0/dts/arm/ene/ |
D | kb1200.dtsi | 4 * SPDX-License-Identifier: Apache-2.0 8 #include <arm/armv7-m.dtsi> 17 #address-cells = <1>; 18 #size-cells = <0>; 22 compatible = "arm,cortex-m4"; 24 clock-frequency = <DT_FREQ_M(48)>; 29 compatible = "mmio-sram"; 34 flash-controller@50100000 { 35 compatible = "ene,kb1200-flash-controller"; 37 #address-cells = <1>; [all …]
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/Zephyr-Core-3.7.0/dts/arm/st/f3/ |
D | stm32f373.dtsi | 4 * SPDX-License-Identifier: Apache-2.0 8 #include <zephyr/dt-bindings/adc/stm32f1_adc.h> 12 compatible = "st,stm32f373", "st,stm32f3", "simple-bus"; 19 compatible = "st,stm32f1-rcc"; 22 pinctrl: pin-controller@48000000 { 24 compatible = "st,stm32-gpio"; 25 gpio-controller; 26 #gpio-cells = <2>; 33 compatible = "st,stm32-i2c-v2"; 34 clock-frequency = <I2C_BITRATE_STANDARD>; [all …]
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D | stm32f303.dtsi | 2 * Copyright (c) 2017 I-SENSE group of ICCS 4 * SPDX-License-Identifier: Apache-2.0 8 #include <zephyr/dt-bindings/adc/stm32l4_adc.h> 12 compatible = "st,stm32f303", "st,stm32f3", "simple-bus"; 20 compatible = "st,stm32-i2c-v2"; 21 clock-frequency = <I2C_BITRATE_STANDARD>; 22 #address-cells = <1>; 23 #size-cells = <0>; 31 interrupt-names = "event", "error"; 36 compatible = "st,stm32-spi-fifo", "st,stm32-spi"; [all …]
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/Zephyr-Core-3.7.0/dts/arm/gd/gd32e10x/ |
D | gd32e10x.dtsi | 4 * SPDX-License-Identifier: Apache-2.0 8 #include <arm/armv7-m.dtsi> 9 #include <zephyr/dt-bindings/gpio/gpio.h> 10 #include <zephyr/dt-bindings/pwm/pwm.h> 11 #include <zephyr/dt-bindings/i2c/i2c.h> 12 #include <zephyr/dt-bindings/clock/gd32e10x-clocks.h> 13 #include <zephyr/dt-bindings/reset/gd32e10x.h> 17 #address-cells = <1>; 18 #size-cells = <0>; 21 clock-frequency = <DT_FREQ_M(120)>; [all …]
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/Zephyr-Core-3.7.0/dts/arm/gd/gd32e50x/ |
D | gd32e507xe.dtsi | 4 * SPDX-License-Identifier: Apache-2.0 13 compatible = "gd,gd32-timer"; 16 interrupt-names = "brk", "up", "trgcom", "cc"; 19 is-advanced; 23 pwm { 24 compatible = "gd,gd32-pwm"; 26 #pwm-cells = <3>; 31 compatible = "gd,gd32-timer"; 34 interrupt-names = "global"; 40 pwm { [all …]
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/Zephyr-Core-3.7.0/dts/arm/st/f2/ |
D | stm32f2.dtsi | 6 * SPDX-License-Identifier: Apache-2.0 9 #include <arm/armv7-m.dtsi> 10 #include <zephyr/dt-bindings/clock/stm32f4_clock.h> 11 #include <zephyr/dt-bindings/i2c/i2c.h> 12 #include <zephyr/dt-bindings/gpio/gpio.h> 13 #include <zephyr/dt-bindings/pwm/pwm.h> 14 #include <zephyr/dt-bindings/pwm/stm32_pwm.h> 15 #include <zephyr/dt-bindings/dma/stm32_dma.h> 16 #include <zephyr/dt-bindings/adc/stm32f4_adc.h> 17 #include <zephyr/dt-bindings/reset/stm32f2_4_7_reset.h> [all …]
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/Zephyr-Core-3.7.0/dts/arm/gd/gd32f403/ |
D | gd32f403.dtsi | 5 * SPDX-License-Identifier: Apache-2.0 9 #include <arm/armv7-m.dtsi> 10 #include <zephyr/dt-bindings/adc/adc.h> 11 #include <zephyr/dt-bindings/gpio/gpio.h> 12 #include <zephyr/dt-bindings/pwm/pwm.h> 13 #include <zephyr/dt-bindings/clock/gd32f403-clocks.h> 14 #include <zephyr/dt-bindings/reset/gd32f403.h> 18 #address-cells = <1>; 19 #size-cells = <0>; 22 compatible = "arm,cortex-m4f"; [all …]
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/Zephyr-Core-3.7.0/dts/arm/gd/gd32f4xx/ |
D | gd32f4xx.dtsi | 4 * SPDX-License-Identifier: Apache-2.0 7 #include <arm/armv7-m.dtsi> 8 #include <zephyr/dt-bindings/adc/adc.h> 9 #include <zephyr/dt-bindings/gpio/gpio.h> 10 #include <zephyr/dt-bindings/i2c/i2c.h> 11 #include <zephyr/dt-bindings/pwm/pwm.h> 12 #include <zephyr/dt-bindings/clock/gd32f4xx-clocks.h> 13 #include <zephyr/dt-bindings/reset/gd32f4xx.h> 17 #address-cells = <1>; 18 #size-cells = <0>; [all …]
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/Zephyr-Core-3.7.0/dts/arm/nuvoton/npcx/ |
D | npcx.dtsi | 4 * SPDX-License-Identifier: Apache-2.0 7 #include <arm/armv7-m.dtsi> 10 #include <zephyr/dt-bindings/adc/adc.h> 11 #include <zephyr/dt-bindings/clock/npcx_clock.h> 12 #include <zephyr/dt-bindings/flash_controller/npcx_fiu_qspi.h> 13 #include <zephyr/dt-bindings/gpio/gpio.h> 14 #include <zephyr/dt-bindings/i2c/i2c.h> 15 #include <zephyr/dt-bindings/pinctrl/npcx-pinctrl.h> 16 #include <zephyr/dt-bindings/pwm/pwm.h> 17 #include <zephyr/dt-bindings/sensor/npcx_tach.h> [all …]
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/Zephyr-Core-3.7.0/dts/arm/st/c0/ |
D | stm32c0.dtsi | 5 * SPDX-License-Identifier: Apache-2.0 8 #include <arm/armv6-m.dtsi> 9 #include <zephyr/dt-bindings/adc/adc.h> 10 #include <zephyr/dt-bindings/clock/stm32c0_clock.h> 11 #include <zephyr/dt-bindings/gpio/gpio.h> 12 #include <zephyr/dt-bindings/i2c/i2c.h> 13 #include <zephyr/dt-bindings/pwm/pwm.h> 14 #include <zephyr/dt-bindings/pwm/stm32_pwm.h> 15 #include <zephyr/dt-bindings/adc/stm32l4_adc.h> 16 #include <zephyr/dt-bindings/reset/stm32c0_reset.h> [all …]
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/Zephyr-Core-3.7.0/dts/arm/st/h5/ |
D | stm32h562.dtsi | 4 * SPDX-License-Identifier: Apache-2.0 8 #include <zephyr/dt-bindings/flash_controller/ospi.h> 10 #include <zephyr/dt-bindings/flash_controller/xspi.h> 16 #clock-cells = <0>; 17 compatible = "st,stm32u5-pll-clock"; 23 compatible = "st,stm32h562", "st,stm32h5", "simple-bus"; 25 pinctrl: pin-controller@42020000 { 27 compatible = "st,stm32-gpio"; 28 gpio-controller; 29 #gpio-cells = <2>; [all …]
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/Zephyr-Core-3.7.0/dts/arm/microchip/ |
D | mec1501hsz.dtsi | 4 * SPDX-License-Identifier: Apache-2.0 7 #include <arm/armv7-m.dtsi> 8 #include <zephyr/dt-bindings/adc/adc.h> 9 #include <zephyr/dt-bindings/clock/mchp_xec_pcr.h> 10 #include <zephyr/dt-bindings/i2c/i2c.h> 11 #include <zephyr/dt-bindings/gpio/gpio.h> 12 #include <zephyr/dt-bindings/gpio/microchip-xec-gpio.h> 16 #address-cells = <1>; 17 #size-cells = <0>; 21 compatible = "arm,cortex-m4"; [all …]
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/Zephyr-Core-3.7.0/dts/arm/infineon/cat3/xmc/ |
D | xmc4xxx.dtsi | 5 * SPDX-License-Identifier: Apache-2.0 8 #include <arm/armv7-m.dtsi> 9 #include <zephyr/dt-bindings/adc/adc.h> 10 #include <zephyr/dt-bindings/gpio/gpio.h> 11 #include <zephyr/dt-bindings/gpio/infineon-xmc4xxx-gpio.h> 15 #address-cells = <1>; 16 #size-cells = <0>; 19 compatible = "arm,cortex-m4f"; 25 compatible = "infineon,xmc4xxx-flash-controller"; 27 #address-cells = <1>; [all …]
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/Zephyr-Core-3.7.0/dts/arm/st/f0/ |
D | stm32f0.dtsi | 6 * SPDX-License-Identifier: Apache-2.0 9 #include <arm/armv6-m.dtsi> 10 #include <zephyr/dt-bindings/clock/stm32f0_clock.h> 11 #include <zephyr/dt-bindings/i2c/i2c.h> 12 #include <zephyr/dt-bindings/gpio/gpio.h> 13 #include <zephyr/dt-bindings/pwm/pwm.h> 14 #include <zephyr/dt-bindings/pwm/stm32_pwm.h> 15 #include <zephyr/dt-bindings/dma/stm32_dma.h> 16 #include <zephyr/dt-bindings/adc/stm32l4_adc.h> 17 #include <zephyr/dt-bindings/reset/stm32f0_1_3_reset.h> [all …]
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/Zephyr-Core-3.7.0/dts/arm/ti/ |
D | cc13xx_cc26xx.dtsi | 4 * SPDX-License-Identifier: Apache-2.0 7 #include <arm/armv7-m.dtsi> 8 #include <zephyr/dt-bindings/adc/adc.h> 9 #include <zephyr/dt-bindings/i2c/i2c.h> 10 #include <zephyr/dt-bindings/gpio/gpio.h> 11 #include <zephyr/dt-bindings/pwm/pwm.h> 16 zephyr,flash-controller = &flash_controller; 20 #address-cells = <1>; 21 #size-cells = <0>; 25 compatible = "arm,cortex-m4"; [all …]
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/Zephyr-Core-3.7.0/dts/arm/st/f1/ |
D | stm32f103Xg.dtsi | 1 /* SPDX-License-Identifier: Apache-2.0 18 flash-controller@40022000 { 22 * This matters if you're doing in-application 24 * read-while-write capabilities, but is 25 * otherwise a non-issue. 28 erase-block-size = <DT_SIZE_K(2)>; 33 compatible = "st,stm32-timers"; 42 pwm { 43 compatible = "st,stm32-pwm"; 45 #pwm-cells = <3>; [all …]
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/Zephyr-Core-3.7.0/dts/arm/st/l4/ |
D | stm32l4p5.dtsi | 4 * SPDX-License-Identifier: Apache-2.0 9 #include <zephyr/dt-bindings/flash_controller/ospi.h> 11 /delete-node/ &quadspi; 19 compatible = "st,stm32l4p5", "st,stm32l4", "simple-bus"; 22 clk_hsi48: clk-hsi48 { 23 #clock-cells = <0>; 24 compatible = "fixed-clock"; 25 clock-frequency = <DT_FREQ_M(48)>; 30 flash-controller@40022000 { 32 erase-block-size = <4096>; [all …]
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D | stm32l471.dtsi | 4 * SPDX-License-Identifier: Apache-2.0 11 compatible = "st,stm32l471", "st,stm32l4", "simple-bus"; 13 pinctrl: pin-controller@48000000 { 16 compatible = "st,stm32-gpio"; 17 gpio-controller; 18 #gpio-cells = <2>; 24 compatible = "st,stm32-gpio"; 25 gpio-controller; 26 #gpio-cells = <2>; 32 compatible = "st,stm32-gpio"; [all …]
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/Zephyr-Core-3.7.0/dts/bindings/test/ |
D | vnd,pwm.yaml | 2 # SPDX-License-Identifier: Apache-2.0 4 description: VND PWM controller 6 compatible: "vnd,pwm" 8 include: [pwm-controller.yaml, base.yaml] 14 "#pwm-cells": 17 pwm-cells: 18 - channel 19 - period 20 - flags
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/Zephyr-Core-3.7.0/dts/bindings/pwm/ |
D | microchip,xec-pwm.yaml | 2 # SPDX-License-Identifier: Apache-2.0 4 description: Microchip XEC PWM 6 include: [pwm-controller.yaml, base.yaml, pinctrl-device.yaml] 8 compatible: "microchip,xec-pwm" 17 description: PWM PCR register index and bit position 19 "#pwm-cells": 22 pwm-cells: 23 - channel 24 - period 25 - flags
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D | maxim,max31790-pwm.yaml | 2 # SPDX-License-Identifier: Apache-2.0 4 description: Maxim MAX31790 6-channel I2C-bus PWM controller 6 compatible: "maxim,max31790-pwm" 8 include: [pwm-controller.yaml, base.yaml] 10 on-bus: max31790 13 "#pwm-cells": 16 pwm-cells: 17 - channel 18 - period
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D | litex,pwm.yaml | 4 # SPDX-License-Identifier: Apache-2.0 7 description: LiteX PWM controller 9 include: [pwm-controller.yaml, base.yaml] 11 compatible: "litex,pwm" 17 "#pwm-cells": 20 pwm-cells: 21 - channel 22 - period
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/Zephyr-Core-3.7.0/dts/bindings/clock/ |
D | pwm-clock.yaml | 2 # SPDX-License-Identifier: Apache-2.0 5 An external clock signal driven by a PWM pin. 11 compatible = "pwm-clock"; 12 #clock-cells = <1>; 16 This will create a device node with a clock-controller 17 API. Internally the device node will use PWM API to start the 21 The clock frequency can be explicitly set using the clock-frequency 24 The PWM node may need to be properly configured to generate 26 for the target PWM driver. 28 compatible: "pwm-clock" [all …]
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/Zephyr-Core-3.7.0/dts/arm/st/f7/ |
D | stm32f7.dtsi | 6 * SPDX-License-Identifier: Apache-2.0 9 #include <arm/armv7-m.dtsi> 10 #include <zephyr/dt-bindings/clock/stm32f7_clock.h> 11 #include <zephyr/dt-bindings/i2c/i2c.h> 12 #include <zephyr/dt-bindings/gpio/gpio.h> 13 #include <zephyr/dt-bindings/pwm/pwm.h> 14 #include <zephyr/dt-bindings/pwm/stm32_pwm.h> 15 #include <zephyr/dt-bindings/dma/stm32_dma.h> 16 #include <zephyr/dt-bindings/adc/stm32f4_adc.h> 17 #include <zephyr/dt-bindings/reset/stm32f2_4_7_reset.h> [all …]
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/Zephyr-Core-3.7.0/boards/others/serpente/ |
D | serpente.dts | 4 * SPDX-License-Identifier: Apache-2.0 7 /dts-v1/; 10 #include "serpente-pinctrl.dtsi" 18 zephyr,shell-uart = &sercom2; 21 zephyr,code-partition = &code_partition; 28 red-led = &red_led; 29 green-led = &green_led; 30 blue-led = &blue_led; 32 pwm-led0 = &red_pwm_led; 33 pwm-led1 = &green_pwm_led; [all …]
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