Searched full:protect (Results 1 – 25 of 106) sorted by relevance
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| /Zephyr-latest/drivers/flash/ |
| D | flash_stm32wbx.c | 99 * When the PESD bit mechanism is used by CPU2 to protect its in write_dword()
107 * used to protect the CPU2 timing. in write_dword()
122 * processing to protect some latency in critical code in write_dword()
135 * protect its timing. If the semaphore is locked, the in write_dword()
139 * to protect its timing, therefore, it is useless to in write_dword()
173 * opportunity to CPU2 to protect its timing in write_dword()
236 * When the PESD bit mechanism is used by CPU2 to protect its in erase_page()
244 * used to protect the CPU2 timing. in erase_page()
259 * processing to protect some latency in critical code in erase_page()
272 * protect its timing. If the semaphore is locked, the in erase_page()
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| /Zephyr-latest/dts/bindings/usb/uac2/ |
| D | zephyr,uac2-output-terminal.yaml | 32 copy-protect-control:
34 description: Copy Protect Control capabilities
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| D | zephyr,uac2-input-terminal.yaml | 28 copy-protect-control:
30 description: Copy Protect Control capabilities
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| /Zephyr-latest/doc/hardware/peripherals/edac/ |
| D | ibecc.rst | 32 * OPERATION_MODE = 0x0 sets functional mode to protect requests based on
38 * OPERATION_MODE = 0x2 sets functional mode to protect all requests and ignore
73 that no locking mechanism can protect code against an NMI happening. Zephyr's
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| /Zephyr-latest/soc/renesas/rzt2m/ |
| D | soc.h | 19 /* Safety area protect register */
25 /* Non-safety area protect register */
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| D | soc.c | 95 /* Unlock the Protect Registers in soc_early_init_hook()
98 /* After the device drivers are done, lock the Protect Registers. */ in soc_early_init_hook()
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| /Zephyr-latest/include/zephyr/drivers/ |
| D | hwspinlock.h | 66 * be called before a critical section that we want to protect.
92 * called before a critical section that we want to protect.
113 * be called after a critical section that we want to protect.
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| /Zephyr-latest/boards/sipeed/longan_nano/support/ |
| D | openocd.cfg | 24 flash protect 0 0 last off
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| /Zephyr-latest/soc/nuvoton/npcx/common/ |
| D | soc_pins.h | 51 * @brief Force the internal SPI flash write-protect pin (WP) to low level to
52 * protect the flash Status registers.
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| /Zephyr-latest/samples/drivers/led/apa102c_bitbang/src/ |
| D | main.c | 16 * Protect your eyes and do not look directly into those LEDs.
35 /* The LED is very bright. So to protect the eyes,
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| /Zephyr-latest/dts/bindings/mtd/ |
| D | atmel,at2x-base.yaml | 26 GPIO to which the write-protect pin of the chip is connected.
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| D | fujitsu,mb85rcxx.yaml | 28 description: GPIO to which the write-protect pin of the chip is connected.
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| /Zephyr-latest/dts/bindings/sdhc/ |
| D | renesas,ra-sdhc.yaml | 32 write-protect:
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| /Zephyr-latest/doc/kernel/usermode/ |
| D | overview.rst | 17 - The kernel can protect against many unintentional programming errors which
32 'user mode') we aim to protect against the following:
109 - We can't protect against mistakes made in memory domain configuration done in
118 - We do not protect against denial of service attacks through thread CPU
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| /Zephyr-latest/boards/sifive/hifive1/support/ |
| D | openocd.cfg | 19 flash protect 0 64 last off
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| /Zephyr-latest/include/zephyr/drivers/mm/ |
| D | mm_drv_bank.h | 15 * to protect the data when using these APIs.
33 * to protect the data when using these APIs.
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| /Zephyr-latest/boards/shields/x_nucleo_eeprma2/doc/ |
| D | index.rst | 32 The SPI EEPROM devices can write protect complete memory blocks by setting
33 the corresponding block protect bits in the status register.
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| /Zephyr-latest/drivers/clock_control/ |
| D | clock_control_renesas_cpg_mssr.h | 82 /* CPG write protect offset */
102 /* CPG write protect offset */
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| /Zephyr-latest/doc/connectivity/bluetooth/api/ |
| D | connection_mgmt.rst | 20 :c:func:`bt_conn_le_create_synced`. To protect against this, use the
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| /Zephyr-latest/soc/st/stm32/common/ |
| D | stm32_hsem.h | 24 * CPU2 is using PES bit. By default, CPU2 is using the PES bit to protect its
32 * erase data in flash. In order to protect its timing, the CPU1 may get this
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| /Zephyr-latest/subsys/llext/ |
| D | llext.c | 80 * Note, that while we protect the global llext list while searching, we release
82 * a responsibility of the caller to protect against races with a freeing
270 /* FIXME: protect the global list */ in llext_unload()
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| /Zephyr-latest/samples/userspace/shared_mem/ |
| D | README.rst | 4 Use memory partitioning to protect memory between threads.
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| /Zephyr-latest/doc/security/ |
| D | hardening-tool.rst | 7 process, known as "hardening", involves strengthening the security of a system to protect it from
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| /Zephyr-latest/samples/drivers/spi_fujitsu_fram/src/ |
| D | main.c | 105 /* disable write protect */ in write_bytes()
109 printk("unable to disable write protect\n"); in write_bytes()
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| /Zephyr-latest/tests/kernel/common/src/ |
| D | timeout_order.c | 27 /* no need to protect cur, all threads have the same prio */ in thread()
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