Home
last modified time | relevance | path

Searched full:port (Results 1 – 25 of 1574) sorted by relevance

12345678910>>...63

/Zephyr-Core-3.4.0/include/zephyr/drivers/interrupt_controller/
Dsam0_eic.h33 * @brief Acquire an EIC interrupt for specific port and pin combination
35 * This acquires the EIC interrupt for a specific port and pin combination,
37 * callback per port is supported and supplying a different one will
38 * change it for all lines on that port.
40 * @param port port index (A=0, etc)
41 * @param pin pin in the port
47 int sam0_eic_acquire(int port, int pin, enum sam0_eic_trigger trigger,
51 * @brief Release the EIC interrupt for a specific port and pin combination
53 * Release the EIC configuration for a specific port and pin combination.
57 * @param port port index (A=0, etc)
[all …]
/Zephyr-Core-3.4.0/tests/drivers/gpio/gpio_api_1pin/src/
Dtest_port.c14 static void port_get_raw_and_verify(const struct device *port, in port_get_raw_and_verify() argument
20 zassert_equal(gpio_port_get_raw(port, &val_actual), 0, in port_get_raw_and_verify()
21 "Test point %d: failed to get physical port value", idx); in port_get_raw_and_verify()
23 "Test point %d: invalid physical port get value", idx); in port_get_raw_and_verify()
26 static void port_get_and_verify(const struct device *port, in port_get_and_verify() argument
32 zassert_equal(gpio_port_get(port, &val_actual), 0, in port_get_and_verify()
33 "Test point %d: failed to get logical port value", idx); in port_get_and_verify()
35 "Test point %d: invalid logical port get value", idx); in port_get_and_verify()
38 static void port_set_masked_raw_and_verify(const struct device *port, in port_set_masked_raw_and_verify() argument
42 zassert_equal(gpio_port_set_masked_raw(port, mask, value), 0, in port_set_masked_raw_and_verify()
[all …]
Dtest_pin.c12 static void pin_get_raw_and_verify(const struct device *port, in pin_get_raw_and_verify() argument
18 val_actual = gpio_pin_get_raw(port, pin); in pin_get_raw_and_verify()
25 static void pin_get_and_verify(const struct device *port, unsigned int pin, in pin_get_and_verify() argument
30 val_actual = gpio_pin_get(port, pin); in pin_get_and_verify()
37 static void pin_set_raw_and_verify(const struct device *port, in pin_set_raw_and_verify() argument
41 zassert_equal(gpio_pin_set_raw(port, pin, val), 0, in pin_set_raw_and_verify()
46 static void pin_set_and_verify(const struct device *port, unsigned int pin, in pin_set_and_verify() argument
50 zassert_equal(gpio_pin_set(port, pin, val), 0, in pin_set_and_verify()
62 const struct device *port; in ZTEST() local
66 port = DEVICE_DT_GET(TEST_NODE); in ZTEST()
[all …]
Dtest_config.c15 static void pin_get_raw_and_verify(const struct device *port, in pin_get_raw_and_verify() argument
21 val_actual = gpio_pin_get_raw(port, pin); in pin_get_raw_and_verify()
28 static void pin_set_raw_and_verify(const struct device *port, in pin_set_raw_and_verify() argument
32 zassert_equal(gpio_pin_set_raw(port, pin, val), 0, in pin_set_raw_and_verify()
50 const struct device *port; in ZTEST() local
53 port = DEVICE_DT_GET(TEST_NODE); in ZTEST()
54 zassert_true(device_is_ready(port), "GPIO dev is not ready"); in ZTEST()
56 TC_PRINT("Running test on port=%s, pin=%d\n", port->name, TEST_PIN); in ZTEST()
58 ret = gpio_pin_configure(port, TEST_PIN, GPIO_OUTPUT); in ZTEST()
61 pin_set_raw_and_verify(port, TEST_PIN, 1, TEST_POINT(1)); in ZTEST()
[all …]
/Zephyr-Core-3.4.0/drivers/xen/
Devents.c28 /* data is the event_channels entry, subtracting the base, it's the port */ in empty_callback()
29 unsigned int port = (((evtchn_handle_t *)data) - event_channels); in empty_callback() local
31 events_missed[port] = true; in empty_callback()
44 rc = alloc.port; in alloc_unbound_event_channel()
77 int evtchn_close(evtchn_port_t port) in evtchn_close() argument
80 .port = port, in evtchn_close()
86 int evtchn_set_priority(evtchn_port_t port, uint32_t priority) in evtchn_set_priority() argument
89 .port = port, in evtchn_set_priority()
96 void notify_evtchn(evtchn_port_t port) in notify_evtchn() argument
100 __ASSERT(port < EVTCHN_2L_NR_CHANNELS, in notify_evtchn()
[all …]
/Zephyr-Core-3.4.0/subsys/net/l2/ethernet/gptp/
Dgptp_private.h28 #define GPTP_STATS_INC(port, var) (GPTP_PORT_PARAM_DS(port)->var++) argument
30 #define GPTP_STATS_INC(port, var)
36 * Utility to check if a port is configured as a slave.
38 * @param port Port to check.
40 * @return True if this is a slave port.
42 bool gptp_is_slave_port(int port);
45 * @brief Convert the network interface to the correct port number.
47 * @param iface Network Interface acting as a ptp port.
49 * @return Number of the port if found, ENODEV otherwise.
79 * @param port Port number.
[all …]
Dgptp_mi.c72 void gptp_change_port_state_debug(int port, enum gptp_port_state state, in gptp_change_port_state_debug() argument
76 void gptp_change_port_state(int port, enum gptp_port_state state) in gptp_change_port_state_debug()
81 if (global_ds->selected_role[port] == state) { in gptp_change_port_state_debug()
86 NET_DBG("[%d] state %s -> %s (%s():%d)", port, in gptp_change_port_state_debug()
87 state2str(global_ds->selected_role[port]), in gptp_change_port_state_debug()
91 global_ds->selected_role[port] = state; in gptp_change_port_state_debug()
96 int port, in gptp_change_pa_info_state_debug() argument
103 int port, in gptp_change_pa_info_state_debug()
113 NET_DBG("[%d] PA info state %s -> %s (%s():%d)", port, in gptp_change_pa_info_state_debug()
124 int port; in gptp_mi_half_sync_itv_timeout() local
[all …]
Dgptp_messages.h252 /** Source Port Id of the Path Delay Request. */
266 /** Source Port Id of the Path Delay Request. */
305 /** Target Port Identity , always 0xFF. */
329 * @param port gPTP port number.
333 struct net_pkt *gptp_prepare_sync(int port);
338 * @param port gPTP port number.
342 struct net_pkt *gptp_prepare_follow_up(int port, struct net_pkt *sync);
347 * @param port gPTP port number.
351 struct net_pkt *gptp_prepare_pdelay_req(int port);
356 * @param port gPTP port number.
[all …]
Dgptp_mi.h35 /** Port to which the Sync Information belongs to. */
45 * @brief Run all Media Independent Port Sync State Machines.
47 * @param port Number of the port the State Machines needs to be run on.
49 void gptp_mi_port_sync_state_machines(int port);
52 * @brief Run all Media Independent Port BMCA State Machines.
54 * @param port Number of the port the State Machines needs to be run on.
56 void gptp_mi_port_bmca_state_machines(int port);
66 * @param port Port number of the clock to use.
70 uint64_t gptp_get_current_time_nanosecond(int port);
Dgptp.c43 int port = net_eth_get_ptp_port(iface) + 1; in gptp_get_port_number() local
45 if (port >= GPTP_PORT_START && port < GPTP_PORT_END) { in gptp_get_port_number()
46 return port; in gptp_get_port_number()
49 for (port = GPTP_PORT_START; port < GPTP_PORT_END; port++) { in gptp_get_port_number()
50 if (GPTP_PORT_IFACE(port) == iface) { in gptp_get_port_number()
51 return port; in gptp_get_port_number()
58 bool gptp_is_slave_port(int port) in gptp_is_slave_port() argument
60 return (GPTP_GLOBAL_DS()->selected_role[port] == GPTP_PORT_SLAVE); in gptp_is_slave_port()
64 * Use the given port to generate the clock identity
68 static void gptp_compute_clock_identity(int port) in gptp_compute_clock_identity() argument
[all …]
Dgptp_md.c95 static int gptp_set_md_sync_receive(int port, in gptp_set_md_sync_receive() argument
106 state = &GPTP_PORT_STATE(port)->sync_rcv; in gptp_set_md_sync_receive()
111 port_ds = GPTP_PORT_DS(port); in gptp_set_md_sync_receive()
159 static void gptp_md_pdelay_reset(int port) in gptp_md_pdelay_reset() argument
166 state = &GPTP_PORT_STATE(port)->pdelay_req; in gptp_md_pdelay_reset()
167 port_ds = GPTP_PORT_DS(port); in gptp_md_pdelay_reset()
178 static void gptp_md_pdelay_check_multiple_resp(int port) in gptp_md_pdelay_check_multiple_resp() argument
184 state = &GPTP_PORT_STATE(port)->pdelay_req; in gptp_md_pdelay_check_multiple_resp()
185 port_ds = GPTP_PORT_DS(port); in gptp_md_pdelay_check_multiple_resp()
214 static void gptp_md_compute_pdelay_rate_ratio(int port) in gptp_md_compute_pdelay_rate_ratio() argument
[all …]
/Zephyr-Core-3.4.0/include/zephyr/arch/arc/v2/
Dsys_io.h26 void sys_out8(uint8_t data, io_port_t port) in sys_out8() argument
28 z_arc_v2_aux_reg_write(port, data); in sys_out8()
32 uint8_t sys_in8(io_port_t port) in sys_in8() argument
34 return (uint8_t)(z_arc_v2_aux_reg_read(port) & 0x000000ff); in sys_in8()
38 void sys_out16(uint16_t data, io_port_t port) in sys_out16() argument
40 z_arc_v2_aux_reg_write(port, data); in sys_out16()
44 uint16_t sys_in16(io_port_t port) in sys_in16() argument
46 return (uint16_t)(z_arc_v2_aux_reg_read(port) & 0x0000ffff); in sys_in16()
50 void sys_out32(uint32_t data, io_port_t port) in sys_out32() argument
52 z_arc_v2_aux_reg_write(port, data); in sys_out32()
[all …]
/Zephyr-Core-3.4.0/drivers/gpio/
Dgpio_handlers.c10 static inline int z_vrfy_gpio_pin_configure(const struct device *port, in z_vrfy_gpio_pin_configure() argument
14 Z_OOPS(Z_SYSCALL_DRIVER_GPIO(port, pin_configure)); in z_vrfy_gpio_pin_configure()
15 return z_impl_gpio_pin_configure((const struct device *)port, in z_vrfy_gpio_pin_configure()
22 static inline int z_vrfy_gpio_pin_get_config(const struct device *port, in z_vrfy_gpio_pin_get_config() argument
26 Z_OOPS(Z_SYSCALL_DRIVER_GPIO(port, pin_get_config)); in z_vrfy_gpio_pin_get_config()
29 return z_impl_gpio_pin_get_config(port, pin, flags); in z_vrfy_gpio_pin_get_config()
34 static inline int z_vrfy_gpio_port_get_raw(const struct device *port, in z_vrfy_gpio_port_get_raw() argument
37 Z_OOPS(Z_SYSCALL_DRIVER_GPIO(port, port_get_raw)); in z_vrfy_gpio_port_get_raw()
39 return z_impl_gpio_port_get_raw((const struct device *)port, in z_vrfy_gpio_port_get_raw()
44 static inline int z_vrfy_gpio_port_set_masked_raw(const struct device *port, in z_vrfy_gpio_port_set_masked_raw() argument
[all …]
Dgpio_emul.c108 * @param port The emulated GPIO device pointer
115 get_pins_with_flags(const struct device *port, gpio_port_pins_t mask, in get_pins_with_flags() argument
121 (struct gpio_emul_data *)port->data; in get_pins_with_flags()
123 (const struct gpio_emul_config *)port->config; in get_pins_with_flags()
139 * @param port The emulated GPIO device pointer
143 static inline gpio_port_pins_t get_input_pins(const struct device *port) in get_input_pins() argument
145 return get_pins_with_flags(port, GPIO_INPUT, GPIO_INPUT); in get_input_pins()
153 * @param port The emulated GPIO device pointer
157 static inline gpio_port_pins_t get_output_pins(const struct device *port) in get_output_pins() argument
159 return get_pins_with_flags(port, GPIO_OUTPUT, GPIO_OUTPUT); in get_output_pins()
[all …]
Dgpio_psoc6.c45 GPIO_PRT_Type * const port = cfg->regs; in gpio_psoc6_config() local
80 Cy_GPIO_Pin_FastInit(port, pin, drv_mode, pin_val, HSIOM_SEL_GPIO); in gpio_psoc6_config()
81 Cy_GPIO_SetVtrip(port, pin, CY_GPIO_VTRIP_CMOS); in gpio_psoc6_config()
82 Cy_GPIO_SetSlewRate(port, pin, CY_GPIO_SLEW_FAST); in gpio_psoc6_config()
83 Cy_GPIO_SetDriveSel(port, pin, CY_GPIO_DRIVE_FULL); in gpio_psoc6_config()
86 (unsigned int) port, pin, drv_mode, pin_val); in gpio_psoc6_config()
95 GPIO_PRT_Type * const port = cfg->regs; in gpio_psoc6_port_get_raw() local
97 *value = GPIO_PRT_IN(port); in gpio_psoc6_port_get_raw()
99 LOG_DBG("P: 0x%08x, V: 0x%08x", (unsigned int) port, *value); in gpio_psoc6_port_get_raw()
109 GPIO_PRT_Type * const port = cfg->regs; in gpio_psoc6_port_set_masked_raw() local
[all …]
Dgpio_nrfx.c25 NRF_GPIO_Type *port; member
30 static inline struct gpio_nrfx_data *get_port_data(const struct device *port) in get_port_data() argument
32 return port->data; in get_port_data()
35 static inline const struct gpio_nrfx_cfg *get_port_cfg(const struct device *port) in get_port_cfg() argument
37 return port->config; in get_port_cfg()
85 static int gpio_nrfx_pin_configure(const struct device *port, gpio_pin_t pin, in gpio_nrfx_pin_configure() argument
91 const struct gpio_nrfx_cfg *cfg = get_port_cfg(port); in gpio_nrfx_pin_configure()
145 nrf_gpio_port_out_set(cfg->port, BIT(pin)); in gpio_nrfx_pin_configure()
147 nrf_gpio_port_out_clear(cfg->port, BIT(pin)); in gpio_nrfx_pin_configure()
163 static int gpio_nrfx_port_get_raw(const struct device *port, in gpio_nrfx_port_get_raw() argument
[all …]
Dgpio_andes_atcgpio100.c101 static int gpio_atcgpio100_config(const struct device *port, in gpio_atcgpio100_config() argument
105 struct gpio_atcgpio100_data * const data = port->data; in gpio_atcgpio100_config()
123 OUTWORD(GPIO_DSET(port), pin_mask); in gpio_atcgpio100_config()
125 OUTWORD(GPIO_DCLR(port), pin_mask); in gpio_atcgpio100_config()
131 port_value = INWORD(GPIO_DIR(port)); in gpio_atcgpio100_config()
132 OUTWORD(GPIO_DIR(port), port_value | pin_mask); in gpio_atcgpio100_config()
149 OUTWORD(GPIO_DEBC(port), DF_DEBOUNCED_SETTING); in gpio_atcgpio100_config()
150 port_value = INWORD(GPIO_DEBE(port)); in gpio_atcgpio100_config()
151 OUTWORD(GPIO_DEBE(port), port_value | pin_mask); in gpio_atcgpio100_config()
155 port_value = INWORD(GPIO_DIR(port)); in gpio_atcgpio100_config()
[all …]
/Zephyr-Core-3.4.0/drivers/serial/
DKconfig.sifive15 # ---------- Port 0 ----------
18 bool "SIFIVE Port 0"
21 This tells the driver to configure the UART port at boot, depending on
25 int "Port 0 RX Interrupt Threshold Count"
29 Port 0 RX Threshold at which the RX FIFO interrupt triggers.
32 int "Port 0 TX Interrupt Threshold Count"
36 Port 0 TX Threshold at which the TX FIFO interrupt triggers.
38 # ---------- Port 1 ----------
41 bool "SIFIVE Port 1"
44 This tells the driver to configure the UART port at boot, depending on
[all …]
DKconfig.stellaris16 # ---------- Port 0 ----------
19 bool "Stellaris UART Port 0"
21 This tells the driver to configure the UART port at boot, depending on
24 # ---------- Port 1 ----------
27 bool "Stellaris UART Port 1"
29 This tells the driver to configure the UART port at boot, depending on
32 # ---------- Port 2 ----------
35 bool "Stellaris UART Port 2"
37 This tells the driver to configure the UART port at boot, depending on
/Zephyr-Core-3.4.0/include/zephyr/sys/
Dsys_io.h1 /* Port and memory mapped registers I/O operations */
23 /* Port I/O functions */
26 * @fn static inline void sys_out8(uint8_t data, io_port_t port);
27 * @brief Output a byte to an I/O port
29 * This function writes a byte to the given port.
32 * @param port the port address where to write the byte
36 * @fn static inline uint8_t sys_in8(io_port_t port);
37 * @brief Input a byte from an I/O port
39 * This function reads a byte from the port.
41 * @param port the port address from where to read the byte
[all …]
/Zephyr-Core-3.4.0/drivers/pinctrl/
Dpinctrl_numicro.c26 #define REG_MFP(port, pin) (*(volatile uint32_t *)((uint32_t)DT_INST_REG_ADDR_BY_NAME(0, mfp) + \ argument
27 ((port) * 8) + \
30 #define REG_MFOS(port) (*(volatile uint32_t *)((uint32_t)DT_INST_REG_ADDR_BY_NAME(0, mfos) + \ argument
31 ((port) * 4)))
35 /** Utility macro that expands to the GPIO port address if it exists */
40 /** Port addresses */
55 GPIO_T *port; in gpio_configure() local
65 port = (GPIO_T *)gpio_port_addrs[port_idx]; in gpio_configure()
73 port->MODE = (port->MODE & ~MODE_MASK(pin_idx)) | in gpio_configure()
75 port->DBEN = (port->DBEN & ~BIT(pin_idx)) | in gpio_configure()
[all …]
/Zephyr-Core-3.4.0/include/zephyr/arch/x86/ia32/
Dsys_io.h19 void sys_io_set_bit(io_port_t port, unsigned int bit) in sys_io_set_bit() argument
27 : "a" (reg), "Nd" (port), "Ir" (bit)); in sys_io_set_bit()
31 void sys_io_clear_bit(io_port_t port, unsigned int bit) in sys_io_clear_bit() argument
39 : "a" (reg), "Nd" (port), "Ir" (bit)); in sys_io_clear_bit()
43 int sys_io_test_bit(io_port_t port, unsigned int bit) in sys_io_test_bit() argument
50 : "Nd" (port), "Ir" (bit)); in sys_io_test_bit()
56 int sys_io_test_and_set_bit(io_port_t port, unsigned int bit) in sys_io_test_and_set_bit() argument
60 ret = sys_io_test_bit(port, bit); in sys_io_test_and_set_bit()
61 sys_io_set_bit(port, bit); in sys_io_test_and_set_bit()
67 int sys_io_test_and_clear_bit(io_port_t port, unsigned int bit) in sys_io_test_and_clear_bit() argument
[all …]
/Zephyr-Core-3.4.0/include/zephyr/xen/
Devents.h27 int evtchn_close(evtchn_port_t port);
28 int evtchn_set_priority(evtchn_port_t port, uint32_t priority);
29 void notify_evtchn(evtchn_port_t port);
35 * @return - local event channel port on success, negative on error
40 * Allocate local event channel, binded to remote port and attach specified callback
44 * @param remote_port - remote domain event channel port number
45 * @param cb - callback, attached to locat port
47 * @return - local event channel port on success, negative on error
55 * @param port - event channel number
60 int bind_event_channel(evtchn_port_t port, evtchn_cb_t cb, void *data);
[all …]
/Zephyr-Core-3.4.0/include/zephyr/net/
Dsocketutils.h13 * @brief Find port in addr:port string.
15 * @param addr_str String of addr[:port] format
17 * @return Pointer to "port" part, or NULL is none.
22 * @brief Call getaddrinfo() on addr:port string
24 * Convenience function to split addr[:port] string into address vs port
25 * components (or use default port number), and call getaddrinfo() on the
28 * @param addr_str String of addr[:port] format
29 * @param def_port Default port number to use if addr_str doesn't contain it
/Zephyr-Core-3.4.0/dts/bindings/ethernet/
Dsilabs,gecko-ethernet.yaml42 description: PHY MDC individual pin configuration defined as <location port pin>
47 description: PHY MDIO individual pin configuration defined as <location port pin>
53 description: Reference clock individual pin configuration defined as <location port pin>
58 description: Receive data valid individual pin configuration defined as <location port pin>
63 description: Transmit data 0 individual pin configuration defined as <location port pin>
68 description: Transmit data 1 individual pin configuration defined as <location port pin>
73 description: Transmit enable individual pin configuration defined as <location port pin>
78 description: Receive data 0 individual pin configuration defined as <location port pin>
83 description: Receive data 1 individual pin configuration defined as <location port pin>
88 description: Receive error individual pin configuration defined as <location port pin>
[all …]

12345678910>>...63