| /Zephyr-Core-3.7.0/drivers/pinctrl/renesas/rz/ |
| D | pinctrl_rzt2m.c | 4 * SPDX-License-Identifier: Apache-2.0
16 /* Port m mode control register */
17 #define PMC(port) (PORT_NSR + 0x400 + port) argument
18 /* Port m function control register */
19 #define PFC(port) (PORT_NSR + 0x600 + (0x4 * port)) argument
21 #define DRCTL(port, pin) (PORT_NSR + 0xa00 + (0x8 * port) + pin) argument
22 /* Port m region select register */
23 #define RSELP(port) (PTADR + port) argument
32 #define PFC_FUNC_MASK(pin) (0xf << (pin * 4)) argument
34 static void pinctrl_configure_pin(const pinctrl_soc_pin_t *pin) in pinctrl_configure_pin() argument
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| /Zephyr-Core-3.7.0/include/zephyr/drivers/interrupt_controller/ |
| D | sam0_eic.h | 4 * SPDX-License-Identifier: Apache-2.0
33 * @brief Acquire an EIC interrupt for specific port and pin combination
35 * This acquires the EIC interrupt for a specific port and pin combination,
37 * callback per port is supported and supplying a different one will
38 * change it for all lines on that port.
40 * @param port port index (A=0, etc)
41 * @param pin pin in the port
47 int sam0_eic_acquire(int port, int pin, enum sam0_eic_trigger trigger,
51 * @brief Release the EIC interrupt for a specific port and pin combination
53 * Release the EIC configuration for a specific port and pin combination.
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| D | intc_xmc4xxx.h | 4 * SPDX-License-Identifier: Apache-2.0
11 * @brief Enable interrupt for specific port_id and pin combination
13 * @param port_id Port index
14 * @param pin pin Pin the port
21 * @retval -ENOTSUP If the specific port_id/pin combination is not supported or
23 * @retval -EBUSY If the interrupt line is already used by a different port_id/pin
24 * @retval -EINVAL If the trigger combination is invalid
28 int intc_xmc4xxx_gpio_enable_interrupt(int port_id, int pin, enum gpio_int_mode mode,
32 * @brief Disable interrupt for specific port_id and pin combination
34 * @param port_id Port index
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| /Zephyr-Core-3.7.0/drivers/pinctrl/ |
| D | pinctrl_numicro.c | 4 * SPDX-License-Identifier: Apache-2.0
12 #include <zephyr/dt-bindings/pinctrl/numicro-pinctrl.h>
15 #define MODE_PIN_SHIFT(pin) ((pin) * 2) argument
16 #define MODE_MASK(pin) (3 << MODE_PIN_SHIFT(pin)) argument
17 #define DINOFF_PIN_SHIFT(pin) ((pin) + 16) argument
18 #define DINOFF_MASK(pin) (1 << DINOFF_PIN_SHIFT(pin)) argument
19 #define PUSEL_PIN_SHIFT(pin) ((pin) * 2) argument
20 #define PUSEL_MASK(pin) (3 << PUSEL_PIN_SHIFT(pin)) argument
21 #define SLEWCTL_PIN_SHIFT(pin) ((pin) * 2) argument
22 #define SLEWCTL_MASK(pin) (3 << SLEWCTL_PIN_SHIFT(pin)) argument
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| D | pinctrl_gecko.c | 5 * SPDX-License-Identifier: Apache-2.0
34 pin_config.port = GECKO_GET_PORT(pins[i]); in pinctrl_configure_pins()
35 pin_config.pin = GECKO_GET_PIN(pins[i]); in pinctrl_configure_pins()
41 rxpin.port = GECKO_GET_PORT(pins[i]); in pinctrl_configure_pins()
42 rxpin.pin = GECKO_GET_PIN(pins[i]); in pinctrl_configure_pins()
45 GPIO_PinModeSet(rxpin.port, rxpin.pin, rxpin.mode, in pinctrl_configure_pins()
50 txpin.port = GECKO_GET_PORT(pins[i]); in pinctrl_configure_pins()
51 txpin.pin = GECKO_GET_PIN(pins[i]); in pinctrl_configure_pins()
54 GPIO_PinModeSet(txpin.port, txpin.pin, txpin.mode, in pinctrl_configure_pins()
62 GPIO_PinModeSet(pin_config.port, pin_config.pin, pin_config.mode, in pinctrl_configure_pins()
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| /Zephyr-Core-3.7.0/tests/drivers/gpio/gpio_api_1pin/src/ |
| D | test_config.c | 4 * SPDX-License-Identifier: Apache-2.0
15 static void pin_get_raw_and_verify(const struct device *port, in pin_get_raw_and_verify() argument
16 unsigned int pin, in pin_get_raw_and_verify() argument
21 val_actual = gpio_pin_get_raw(port, pin); in pin_get_raw_and_verify()
23 "Test point %d: failed to get pin value", idx); in pin_get_raw_and_verify()
25 "Test point %d: invalid pin get value", idx); in pin_get_raw_and_verify()
28 static void pin_set_raw_and_verify(const struct device *port, in pin_set_raw_and_verify() argument
29 unsigned int pin, in pin_set_raw_and_verify() argument
32 zassert_equal(gpio_pin_set_raw(port, pin, val), 0, in pin_set_raw_and_verify()
33 "Test point %d: failed to set pin value", idx); in pin_set_raw_and_verify()
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| D | test_pin.c | 4 * SPDX-License-Identifier: Apache-2.0
12 static void pin_get_raw_and_verify(const struct device *port, in pin_get_raw_and_verify() argument
13 unsigned int pin, in pin_get_raw_and_verify() argument
18 val_actual = gpio_pin_get_raw(port, pin); in pin_get_raw_and_verify()
20 "Test point %d: failed to get physical pin value", idx); in pin_get_raw_and_verify()
22 "Test point %d: invalid physical pin get value", idx); in pin_get_raw_and_verify()
25 static void pin_get_and_verify(const struct device *port, unsigned int pin, in pin_get_and_verify() argument
30 val_actual = gpio_pin_get(port, pin); in pin_get_and_verify()
32 "Test point %d: failed to get logical pin value", idx); in pin_get_and_verify()
34 "Test point %d: invalid logical pin get value", idx); in pin_get_and_verify()
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| D | test_pin_interrupt.c | 4 * SPDX-License-Identifier: Apache-2.0
16 static void callback_edge(const struct device *port, struct gpio_callback *cb, in callback_edge() argument
20 "Detected interrupt on an invalid pin"); in callback_edge()
24 static void callback_level(const struct device *port, in callback_level() argument
31 "Detected interrupt on an invalid pin"); in callback_level()
35 ret = gpio_pin_interrupt_configure(port, TEST_PIN, GPIO_INT_DISABLE); in callback_level()
37 "Failed to disable pin interrupt in the callback"); in callback_level()
41 static void pin_set_and_verify(const struct device *port, unsigned int pin, in pin_set_and_verify() argument
45 zassert_equal(gpio_pin_set(port, pin, val), 0, in pin_set_and_verify()
46 "Test point %d: failed to set logical pin value", idx); in pin_set_and_verify()
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| D | test_port.c | 4 * SPDX-License-Identifier: Apache-2.0
12 #define TEST_GPIO_PORT_VALUE_MAX ((1LLU << GPIO_MAX_PINS_PER_PORT) - 1)
14 static void port_get_raw_and_verify(const struct device *port, in port_get_raw_and_verify() argument
20 zassert_equal(gpio_port_get_raw(port, &val_actual), 0, in port_get_raw_and_verify()
21 "Test point %d: failed to get physical port value", idx); in port_get_raw_and_verify()
23 "Test point %d: invalid physical port get value", idx); in port_get_raw_and_verify()
26 static void port_get_and_verify(const struct device *port, in port_get_and_verify() argument
32 zassert_equal(gpio_port_get(port, &val_actual), 0, in port_get_and_verify()
33 "Test point %d: failed to get logical port value", idx); in port_get_and_verify()
35 "Test point %d: invalid logical port get value", idx); in port_get_and_verify()
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| /Zephyr-Core-3.7.0/dts/bindings/ethernet/ |
| D | silabs,gecko-ethernet.yaml | 3 # SPDX-License-Identifier: Apache-2.0
7 compatible: "silabs,gecko-ethernet"
9 include: ethernet-controller.yaml
21 phy-address:
27 location-rmii:
33 location-mdio:
39 location-phy_mdc:
42 description: PHY MDC individual pin configuration defined as <location port pin>
44 location-phy_mdio:
47 description: PHY MDIO individual pin configuration defined as <location port pin>
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| /Zephyr-Core-3.7.0/include/zephyr/dt-bindings/pinctrl/renesas/ |
| D | pinctrl-ra-common.h | 4 * SPDX-License-Identifier: Apache-2.0
25 #define RA_PINCFG(port, pin, psel, opt) \ argument
26 ((((psel)&PSEL_MASK) << PSEL_POS) | (((pin)&PIN_MASK) << PIN_POS) | \
27 (((port)&PORT_MASK) << PORT_POS) | ((((port) >> 3) & PORT4_MASK) << PORT4_POS) | \
31 #define RA_PINCFG__40(port, pin, psel, opt) RA_PINCFG(port, pin, psel, opt) argument
35 #define RA_PINCFG__48(port, pin, psel, opt) RA_PINCFG(port, pin, psel, opt) argument
39 #define RA_PINCFG__64(port, pin, psel, opt) RA_PINCFG(port, pin, psel, opt) argument
43 #define RA_PINCFG_100(port, pin, psel, opt) RA_PINCFG(port, pin, psel, opt) argument
|
| /Zephyr-Core-3.7.0/drivers/pinctrl/renesas/ra/ |
| D | pinctrl_renesas_ra.c | 4 * SPDX-License-Identifier: Apache-2.0
21 static inline uint32_t pinctrl_ra_read_PmnFPS(size_t port, size_t pin) in pinctrl_ra_read_PmnFPS() argument
23 return sys_read32(DT_INST_REG_ADDR_BY_NAME(0, pfs) + (port * PIN_NUM + pin) * 4); in pinctrl_ra_read_PmnFPS()
26 static inline void pinctrl_ra_write_PmnFPS(size_t port, size_t pin, uint32_t value) in pinctrl_ra_write_PmnFPS() argument
28 sys_write32(value, DT_INST_REG_ADDR_BY_NAME(0, pfs) + (port * PIN_NUM + pin) * 4); in pinctrl_ra_write_PmnFPS()
31 static inline uint8_t pinctrl_ra_read_PMISC_PWPR(size_t port, size_t pin) in pinctrl_ra_read_PMISC_PWPR() argument
46 pincfg.pin = 0; in pinctrl_ra_configure_pfs()
47 pincfg.port = 0; in pinctrl_ra_configure_pfs()
51 uint32_t val = pinctrl_ra_read_PmnFPS(pinc->port, pinc->pin); in pinctrl_ra_configure_pfs()
53 pinctrl_ra_write_PmnFPS(pinc->port, pinc->pin, val & ~(BIT(PmnPFS_PMR_POS))); in pinctrl_ra_configure_pfs()
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| /Zephyr-Core-3.7.0/include/zephyr/drivers/gpio/ |
| D | gpio_emul.h | 4 * SPDX-License-Identifier: Apache-2.0
28 * Behaviour of emulated GPIO is application-defined. As-such, each
31 * - define a Device Tree overlay file to indicate the number of GPIO
33 * - register a callback with the GPIO controller using
35 * - asynchronously call @ref gpio_emul_input_set and / or
49 * @param port The emulated GPIO port
54 * @return -EINVAL if an invalid argument is provided
56 int gpio_emul_input_set_masked(const struct device *port, gpio_port_pins_t pins,
60 * @brief Modify the value of one emulated GPIO input @p pin
62 * @param port The emulated GPIO port
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| /Zephyr-Core-3.7.0/drivers/misc/timeaware_gpio/ |
| D | timeaware_gpio_handlers.c | 4 * SPDX-License-Identifier: Apache-2.0
9 static inline int z_vrfy_tgpio_port_get_time(const struct device *port, uint64_t *current_time) in z_vrfy_tgpio_port_get_time() argument
11 K_OOPS(Z_SYSCALL_DRIVER_TGPIO(port, get_time)); in z_vrfy_tgpio_port_get_time()
13 return z_impl_tgpio_port_get_time((const struct device *)port, (uint64_t *)current_time); in z_vrfy_tgpio_port_get_time()
17 static inline int z_vrfy_tgpio_port_get_cycles_per_second(const struct device *port, in z_vrfy_tgpio_port_get_cycles_per_second() argument
20 K_OOPS(Z_SYSCALL_DRIVER_TGPIO(port, cyc_per_sec)); in z_vrfy_tgpio_port_get_cycles_per_second()
22 return z_impl_tgpio_port_get_cycles_per_second((const struct device *)port, in z_vrfy_tgpio_port_get_cycles_per_second()
27 static inline int z_vrfy_tgpio_pin_periodic_output(const struct device *port, uint32_t pin, in z_vrfy_tgpio_pin_periodic_output() argument
31 K_OOPS(Z_SYSCALL_DRIVER_TGPIO(port, set_perout)); in z_vrfy_tgpio_pin_periodic_output()
32 return z_impl_tgpio_pin_periodic_output((const struct device *)port, pin, start_time, in z_vrfy_tgpio_pin_periodic_output()
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| /Zephyr-Core-3.7.0/include/zephyr/drivers/ |
| D | gpio.h | 2 * Copyright (c) 2019-2020 Nordic Semiconductor ASA
5 * Copyright (c) 2015-2016 Intel Corporation.
7 * SPDX-License-Identifier: Apache-2.0
26 #include <zephyr/dt-bindings/gpio/gpio.h>
46 /** Enables pin as input. */
49 /** Enables pin as output, no change to the output state. */
52 /** Disables pin for both input and output. */
68 /** Configures GPIO pin as output and initializes it to a low state. */
70 /** Configures GPIO pin as output and initializes it to a high state. */
72 /** Configures GPIO pin as output and initializes it to a logic 0. */
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| /Zephyr-Core-3.7.0/drivers/gpio/ |
| D | gpio_emul.c | 4 * SPDX-License-Identifier: Apache-2.0
55 * Pin direction as well as other pin properties are set using
87 /** Input values for each pin */
89 /** Output values for each pin */
91 /** Interrupt status for each pin */
95 /** Is interrupt enabled for each pin */
97 /** Singly-linked list of callbacks associated with the controller */
108 * @param port The emulated GPIO device pointer
115 get_pins_with_flags(const struct device *port, gpio_port_pins_t mask, in get_pins_with_flags() argument
121 (struct gpio_emul_data *)port->data; in get_pins_with_flags()
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| D | gpio_gd32.c | 4 * SPDX-License-Identifier: Apache-2.0
30 /** GPIO mode: input with pull-up/down (CTL bits) */
32 /** GPIO mode: output push-pull @ 2MHz (CTL bits) */
34 /** GPIO mode: output open-drain @ 2MHz (CTL bits) */
43 #define EXTISS_LINE_SHIFT(pin) (EXTISS_STEP * ((pin) % EXTISS_STEP)) argument
61 * @param line EXTI line (equals to GPIO pin number).
62 * @param arg GPIO port instance.
67 struct gpio_gd32_data *data = dev->data; in gpio_gd32_isr()
69 gpio_fire_callbacks(&data->callbacks, dev, BIT(line)); in gpio_gd32_isr()
75 * @param port GPIO port instance.
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| D | gpio_psoc6.c | 5 * SPDX-License-Identifier: Apache-2.0
41 gpio_pin_t pin, in gpio_psoc6_config() argument
44 const struct gpio_psoc6_config * const cfg = dev->config; in gpio_psoc6_config()
45 GPIO_PRT_Type * const port = cfg->regs; in gpio_psoc6_config() local
80 Cy_GPIO_Pin_FastInit(port, pin, drv_mode, pin_val, HSIOM_SEL_GPIO); in gpio_psoc6_config()
81 Cy_GPIO_SetVtrip(port, pin, CY_GPIO_VTRIP_CMOS); in gpio_psoc6_config()
82 Cy_GPIO_SetSlewRate(port, pin, CY_GPIO_SLEW_FAST); in gpio_psoc6_config()
83 Cy_GPIO_SetDriveSel(port, pin, CY_GPIO_DRIVE_FULL); in gpio_psoc6_config()
85 LOG_DBG("P: 0x%08x, Pin: %d, Mode: 0x%08x, Val: 0x%02x", in gpio_psoc6_config()
86 (unsigned int) port, pin, drv_mode, pin_val); in gpio_psoc6_config()
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| D | gpio_imx.c | 2 * Copyright (c) 2018-2019, NXP
4 * SPDX-License-Identifier: Apache-2.0
32 /* port ISR callback routine address */
36 static int imx_gpio_configure(const struct device *port, gpio_pin_t pin, in imx_gpio_configure() argument
39 const struct imx_gpio_config *config = port->config; in imx_gpio_configure()
40 GPIO_Type *base = config->base; in imx_gpio_configure()
43 return -ENOTSUP; in imx_gpio_configure()
45 __ASSERT_NO_MSG(pin < config->mux_count); in imx_gpio_configure()
48 /* Set appropriate bits in pin configuration register */ in imx_gpio_configure()
50 (volatile uint32_t *)config->pin_muxes[pin].config_register; in imx_gpio_configure()
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| D | gpio_dw.c | 4 * SPDX-License-Identifier: Apache-2.0
13 #include <zephyr/dt-bindings/gpio/snps-designware-gpio.h>
29 static int gpio_dw_port_set_bits_raw(const struct device *port, uint32_t mask);
30 static int gpio_dw_port_clear_bits_raw(const struct device *port,
88 uint32_t port = (base_addr & 0x3f) / 12U; in dw_derive_port_from_base() local
89 return port; in dw_derive_port_from_base()
94 return ((int)(config->irq_num) > 0U); in dw_interrupt_support()
101 /* 4-port GPIO implementation translates from base address to port */ in dw_get_ext_port()
125 /* 4-port GPIO implementation translates from base address to port */ in dw_get_data_port()
149 /* 4-port GPIO implementation translates from base address to port */ in dw_get_dir_port()
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| /Zephyr-Core-3.7.0/include/zephyr/dt-bindings/pinctrl/ |
| D | cc13xx_cc26xx-pinctrl.h | 2 * Copyright (c) 2015 - 2017, Texas Instruments Incorporated
4 * SPDX-License-Identifier: Apache-2.0
12 /* IOC Peripheral Port Mapping */
15 #define IOC_PORT_AUX_IO 0x00000008 /* AUX IO Pin */
16 #define IOC_PORT_MCU_SSI0_RX 0x00000009 /* MCU SSI0 Receive Pin */
17 #define IOC_PORT_MCU_SSI0_TX 0x0000000A /* MCU SSI0 Transmit Pin */
18 #define IOC_PORT_MCU_SSI0_FSS 0x0000000B /* MCU SSI0 FSS Pin */
19 #define IOC_PORT_MCU_SSI0_CLK 0x0000000C /* MCU SSI0 Clock Pin */
20 #define IOC_PORT_MCU_I2C_MSSDA 0x0000000D /* MCU I2C Data Pin */
21 #define IOC_PORT_MCU_I2C_MSSCL 0x0000000E /* MCU I2C Clock Pin */
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| /Zephyr-Core-3.7.0/dts/bindings/serial/ |
| D | silabs,gecko-usart.yaml | 3 compatible: "silabs,gecko-usart"
5 include: [uart-controller.yaml, pinctrl-device.yaml]
14 peripheral-id:
18 # Note: Not all SoC series support setting individual pin location. If this
19 # is a case all location-* properties need to have identical value.
21 location-rx:
23 description: RX pin configuration defined as <location port pin>
25 location-tx:
27 description: TX pin configuration defined as <location port pin>
29 location-rts:
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| /Zephyr-Core-3.7.0/samples/basic/button/src/ |
| D | main.c | 2 * Copyright (c) 2016 Open-RnD Sp. z o.o.
5 * SPDX-License-Identifier: Apache-2.0
47 button.port->name); in main()
53 printk("Error %d: failed to configure %s pin %d\n", in main()
54 ret, button.port->name, button.pin); in main()
61 printk("Error %d: failed to configure interrupt on %s pin %d\n", in main()
62 ret, button.port->name, button.pin); in main()
66 gpio_init_callback(&button_cb_data, button_pressed, BIT(button.pin)); in main()
67 gpio_add_callback(button.port, &button_cb_data); in main()
68 printk("Set up button at %s pin %d\n", button.port->name, button.pin); in main()
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| /Zephyr-Core-3.7.0/soc/atmel/sam0/common/ |
| D | soc_port.h | 2 * Copyright (c) 2016-2017 Piotr Mienkowski
3 * Copyright (c) 2020-2022 Gerson Fernando Budke
4 * SPDX-License-Identifier: Apache-2.0
8 * @brief Atmel SAM0 MCU family I/O Pin Controller (PORT)
17 * Pin flags/attributes
27 /* Open-Drain is a reserved entry at pinctrl driver */
29 /* Input-Enable means Input-Buffer, see dts/pinctrl/pincfg-node.yaml */
32 /* Output-Enable, see dts/pinctrl/pincfg-node.yaml */
35 /* Drive-Strength, 0mA means normal, any other value means stronger */
46 /** Connect pin to peripheral A. */
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| /Zephyr-Core-3.7.0/tests/drivers/gpio/gpio_get_direction/src/ |
| D | main.c | 4 * SPDX-License-Identifier: Apache-2.0
16 const struct device *port; member
17 gpio_pin_t pin; member
25 fixture.pin = TEST_PIN; in gpio_get_direction_setup()
26 fixture.port = DEVICE_DT_GET(TEST_NODE); in gpio_get_direction_setup()
35 zassert_true(device_is_ready(fixture->port), "GPIO device is not ready"); in gpio_get_direction_before()
42 rv = gpio_pin_configure(fixture->port, fixture->pin, fixture->flags); in common()
43 if (rv == -ENOTSUP) { in common()
44 /* some drivers / hw might not support e.g. input-output or disconnect */ in common()
55 fixture->flags = GPIO_DISCONNECTED; in ZTEST_F()
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