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/Zephyr-latest/dts/bindings/pinctrl/
Dxlnx,pinctrl-zynq.yaml2 # SPDX-License-Identifier: Apache-2.0
5 # https://www.kernel.org/doc/Documentation/devicetree/bindings/pinctrl/xlnx,zynq-pinctrl.txt
6 # https://www.kernel.org/doc/Documentation/devicetree/bindings/pinctrl/xlnx,zynq-pinctrl.yaml
9 Xilinx Zynq-7000 SoC series pinctrl node. This node will define pin multiplexing and
10 configurations in groups. Each group within the pinctrl node defines the pin multiplexing and
18 #include <zephyr/dt-bindings/pinctrl/pinctrl-zynq.h>
21 pinctrl_uart1_default: uart1-default {
29 slew-rate = <IO_SPEED_SLOW>;
30 power-source = <IO_STANDARD_LVCMOS18>;
33 conf-rx {
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Dxlnx,pinctrl-zynqmp.yaml2 # SPDX-License-Identifier: Apache-2.0
5 Xilinx ZynqMP SoC pinctrl node. It allows configuration of pin assignments
8 See Zynq UltraScale+ Devices Register Reference (UG1087) for details regarding
10 compatible: "xlnx,pinctrl-zynqmp"
14 child-binding:
16 Definitions for a pinctrl state.
17 child-binding:
20 - name: pincfg-node.yaml
/Zephyr-latest/include/zephyr/dt-bindings/pinctrl/
Dpinctrl-zynq.h4 * SPDX-License-Identifier: Apache-2.0
13 * Definitions for Xilinx Zynq-7000 pinctrl `power-source` devicetree property values. The value
27 * Definitions for Xilinx Zynq-7000 pinctrl `slew-rate` devicetree property values. The value
/Zephyr-latest/boards/digilent/zybo/
Dzybo.dts4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
9 #include <zephyr/dt-bindings/gpio/gpio.h>
10 #include <zephyr/dt-bindings/input/input-event-codes.h>
12 #include "zybo-pinctrl.dtsi"
16 compatible = "digilent,zynq-zybo", "xlnx,zynq-7000";
18 #address-cells = <1>;
19 #size-cells = <1>;
24 zephyr,shell-uart = &uart1;
35 #address-cells = <1>;
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Dzybo-pinctrl.dtsi4 * SPDX-License-Identifier: Apache-2.0
7 #include <zephyr/dt-bindings/pinctrl/pinctrl-zynq.h>
10 pinctrl_uart1_default: uart1-default {
18 slew-rate = <IO_SPEED_SLOW>;
19 power-source = <IO_STANDARD_LVCMOS18>;
22 conf-rx {
24 bias-high-impedance;
27 conf-tx {
29 bias-disable;
/Zephyr-latest/boards/digilent/zybo/doc/
Dindex.rst9 The `Digilent Zybo`_ (ZYnq BOard) is a feature-rich, ready-to-use embedded software and digital
10 circuit development board. It is built around the Xilinx Zynq-7000 family, which is based on the
11 Xilinx All Programmable System-on-Chip (AP SoC) architecture. This architecture tightly integrates a
12 dual-core ARM Cortex-A9 processor with Xilinx 7-series Field Programmable Gate Array (FPGA) logic.
14 .. figure:: zybo-0.jpg
28 +------------+------------+-------------------------------------+
31 | GICv1 | on-chip | ARM generic interrupt controller v1 |
32 +------------+------------+-------------------------------------+
33 | ARCH TIMER | on-chip | ARM architected timer |
34 +------------+------------+-------------------------------------+
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/Zephyr-latest/dts/arm/xilinx/
Dzynq7000.dtsi3 * SPDX-License-Identifier: Apache-2.0
7 #include <arm/armv7-a.dtsi>
8 #include <zephyr/dt-bindings/interrupt-controller/arm-gic.h>
9 #include <zephyr/dt-bindings/ethernet/xlnx_gem.h>
13 interrupt-parent = <&gic>;
16 compatible = "zephyr,memory-region", "xlnx,zynq-ocm";
18 zephyr,memory-region = "OCM_LOW";
22 compatible = "zephyr,memory-region", "xlnx,zynq-ocm";
24 zephyr,memory-region = "OCM_HIGH";
28 compatible = "arm,armv8-timer";
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Dzynqmp.dtsi4 * SPDX-License-Identifier: Apache-2.0
8 #include <arm/armv7-r.dtsi>
9 #include <zephyr/dt-bindings/interrupt-controller/arm-gic.h>
10 #include <zephyr/dt-bindings/ethernet/xlnx_gem.h>
14 pinctrl: pinctrl@ff180000 { label
16 compatible = "xlnx,pinctrl-zynqmp";
19 compatible = "soc-nv-flash";
24 compatible = "mmio-sram";
29 compatible = "zephyr,memory-region", "xlnx,zynq-ocm";
31 zephyr,memory-region = "OCM";
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/Zephyr-latest/doc/build/dts/api/
Dapi.rst10 Some of these -- the ones beginning with ``DT_INST_`` -- require a special
19 .. _devicetree-generic-apis:
33 :ref:`devicetree-property-access` API.
45 .. doxygengroup:: devicetree-generic-id
47 .. _devicetree-property-access:
52 The following general-purpose macros can be used to access node properties.
53 There are special-purpose APIs for accessing the :ref:`devicetree-ranges-property`,
54 :ref:`devicetree-reg-property` and :ref:`devicetree-interrupts-property`.
59 .. doxygengroup:: devicetree-generic-prop
61 .. _devicetree-ranges-property:
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/Zephyr-latest/drivers/serial/
Duart_xlnx_ps.c1 /* uart_xlnx_ps.c - Xilinx Zynq family serial driver */
6 * SPDX-License-Identifier: Apache-2.0
12 * @brief Xilinx Zynq Family Serial Driver
14 * This is the driver for the Xilinx Zynq family cadence serial device.
19 * - the following macro for the number of bytes between register addresses:
38 #include <zephyr/drivers/pinctrl.h>
42 * Comp. Xilinx Zynq-7000 Technical Reference Manual (ug585), chap. B.33
176 * of the UART are modified at run-time.
200 * of the UART are being modified at run-time.
222 * registers is described in the Zynq-7000 TRM, chapter 19.2.3 'Baud Rate
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/Zephyr-latest/doc/releases/
Drelease-notes-3.2.rst13 * Added support for :ref:`bin-blobs` (also see :ref:`west-blobs`).
15 * Converted all supported boards from ``pinmux`` to :ref:`pinctrl-guide`.
31 * CVE-2022-2993: Under embargo until 2022-11-03
33 * CVE-2022-2741: Under embargo until 2022-10-14
56 This definition can be used by third-party code to compile code conditional
58 Therefore, any third-party code integrated using the Zephyr build system will
91 changed from ``-ENETDOWN`` to ``-ENETUNREACH``. A return value of ``-ENETDOWN`` now indicates
129 * Removed support for configuring the CAN-FD maximum DLC value via Kconfig
156 valid for specific bindings to specify like :dtcompatible:`gpio-leds` and
157 :dtcompatible:`fixed-partitions`.
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Drelease-notes-3.6.rst12 * New :ref:`GNSS subsystem <gnss_api>` added, enabling geo-awareness in Zephyr applications.
13 * New API and drivers introduced for interfacing with :ref:`keyboard matrices <gpio-kbd>`.
16 * Integrated Trusted Firmware-M (TF-M) 2.0, including an update to Mbed TLS 3.5.2.
23 * Over 30 new supported boards, spanning all Zephyr-supported architectures.
37 * CVE-2023-5779 `Zephyr project bug tracker GHSA-7cmj-963q-jj47
38 <https://github.com/zephyrproject-rtos/zephyr/security/advisories/GHSA-7cmj-963q-jj47>`_
40 * CVE-2023-6249 `Zephyr project bug tracker GHSA-32f5-3p9h-2rqc
41 <https://github.com/zephyrproject-rtos/zephyr/security/advisories/GHSA-32f5-3p9h-2rqc>`_
43 * CVE-2023-6749 `Zephyr project bug tracker GHSA-757h-rw37-66hw
44 <https://github.com/zephyrproject-rtos/zephyr/security/advisories/GHSA-757h-rw37-66hw>`_
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/Zephyr-latest/
DMAINTAINERS.yml45 # files-regex:
56 # files-exclude:
59 # files-regex-exclude:
60 # Like 'files-regex', but any matching files will be excluded from the
63 # description: >-
64 # Plain-English description. Describe what the system is about, from an
68 # All areas must have a 'files' and/or 'files-regex' key. The other keys are
72 # this would be sub-areas which add extra fields (for ex. more `collaborators`
73 # who work only in that sub-area) to other areas.
98 # Collaborators: <list of sub-maintainers>
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