| /Zephyr-Core-2.7.6/soc/arm/atmel_sam/common/ |
| D | soc_gpio.h | 19 * Pin flags/attributes
22 /* TODO: replace hard coded pin attribute values with defines provided
62 /** Connect pin to peripheral A. */
64 /** Connect pin to peripheral B. */
66 /** Connect pin to peripheral C. */
68 /** Connect pin to peripheral D. */
70 /** Connect pin to peripheral E. */
72 /** Connect pin to peripheral F. */
74 /** Connect pin to peripheral G. */
76 /** Connect pin to peripheral H. */
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| /Zephyr-Core-2.7.6/tests/drivers/gpio/gpio_api_1pin/src/ |
| D | test_config.c | 16 unsigned int pin, in pin_get_raw_and_verify() argument
21 val_actual = gpio_pin_get_raw(port, pin); in pin_get_raw_and_verify()
23 "Test point %d: failed to get pin value", idx); in pin_get_raw_and_verify()
25 "Test point %d: invalid pin get value", idx); in pin_get_raw_and_verify()
29 unsigned int pin, in pin_set_raw_and_verify() argument
32 zassert_equal(gpio_pin_set_raw(port, pin, val), 0, in pin_set_raw_and_verify()
33 "Test point %d: failed to set pin value", idx); in pin_set_raw_and_verify()
39 * - Configure pin in in/out mode, verify that gpio_pin_set_raw /
40 * gpio_pin_get_raw operations change pin state.
41 * - Verify that GPIO_OUTPUT_HIGH flag is initializing the pin to high.
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| D | test_pin.c | 13 unsigned int pin, in pin_get_raw_and_verify() argument
18 val_actual = gpio_pin_get_raw(port, pin); in pin_get_raw_and_verify()
20 "Test point %d: failed to get physical pin value", idx); in pin_get_raw_and_verify()
22 "Test point %d: invalid physical pin get value", idx); in pin_get_raw_and_verify()
25 static void pin_get_and_verify(const struct device *port, unsigned int pin, in pin_get_and_verify() argument
30 val_actual = gpio_pin_get(port, pin); in pin_get_and_verify()
32 "Test point %d: failed to get logical pin value", idx); in pin_get_and_verify()
34 "Test point %d: invalid logical pin get value", idx); in pin_get_and_verify()
38 unsigned int pin, in pin_set_raw_and_verify() argument
41 zassert_equal(gpio_pin_set_raw(port, pin, val), 0, in pin_set_raw_and_verify()
[all …]
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| D | test_pin_interrupt.c | 19 "Detected interrupt on an invalid pin"); in callback_edge()
30 "Detected interrupt on an invalid pin"); in callback_level()
34 "Failed to disable pin interrupt in the callback"); in callback_level()
39 static void pin_set_and_verify(const struct device *port, unsigned int pin, in pin_set_and_verify() argument
43 zassert_equal(gpio_pin_set(port, pin, val), 0, in pin_set_and_verify()
44 "Test point %d: failed to set logical pin value", idx); in pin_set_and_verify()
59 TC_PRINT("Running test on port=%s, pin=%d\n", TEST_DEV, TEST_PIN); in test_gpio_pin_interrupt_edge()
63 TC_PRINT("Simultaneous pin in/out mode is not supported.\n"); in test_gpio_pin_interrupt_edge()
67 zassert_equal(ret, 0, "Failed to configure the pin"); in test_gpio_pin_interrupt_edge()
76 zassert_equal(ret, 0, "Failed to configure the pin"); in test_gpio_pin_interrupt_edge()
[all …]
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| /Zephyr-Core-2.7.6/dts/bindings/ethernet/ |
| D | silabs,gecko-ethernet.yaml | 42 description: PHY MDC individual pin configuration defined as <location port pin>
47 description: PHY MDIO individual pin configuration defined as <location port pin>
53 description: Reference clock individual pin configuration defined as <location port pin>
58 description: Receive data valid individual pin configuration defined as <location port pin>
63 description: Transmit data 0 individual pin configuration defined as <location port pin>
68 description: Transmit data 1 individual pin configuration defined as <location port pin>
73 description: Transmit enable individual pin configuration defined as <location port pin>
78 description: Receive data 0 individual pin configuration defined as <location port pin>
83 description: Receive data 1 individual pin configuration defined as <location port pin>
88 description: Receive error individual pin configuration defined as <location port pin>
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| /Zephyr-Core-2.7.6/dts/bindings/serial/ |
| D | nordic,nrf-uart-common.yaml | 10 tx-pin:
14 The TX pin to use.
16 For pins P0.0 through P0.31, use the pin number. For example,
19 tx-pin = <16>;
21 For pins P1.0 through P1.31, add 32 to the pin number. For
24 tx-pin = <34>; /* 32 + 2 */
26 rx-pin:
30 The RX pin to use. The pin numbering scheme is the same as the
31 tx-pin property's.
33 rts-pin:
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| D | espressif,esp32c3-uart.yaml | 14 tx-pin:
16 description: TX pin
19 rx-pin:
21 description: RX pin
24 rts-pin:
26 description: RTS pin
29 cts-pin:
31 description: CTS pin
|
| D | espressif,esp32-uart.yaml | 14 tx-pin:
16 description: TX pin
19 rx-pin:
21 description: RX pin
24 rts-pin:
26 description: RTS pin
29 cts-pin:
31 description: CTS pin
|
| D | espressif,esp32s2-uart.yaml | 14 tx-pin:
16 description: TX pin
19 rx-pin:
21 description: RX pin
24 rts-pin:
26 description: RTS pin
29 cts-pin:
31 description: CTS pin
|
| /Zephyr-Core-2.7.6/dts/bindings/sensor/ |
| D | nordic,nrf-qdec.yaml | 17 a-pin:
21 The A pin to use.
23 For pins P0.0 through P0.31, use the pin number. For example,
24 to use P0.16 for the A pin, set:
26 a-pin = <16>;
28 For pins P1.0 through P1.31, add 32 to the pin number. For
29 example, to use P1.2 for the A pin, set:
31 a-pin = <34>; /* 32 + 2 */
33 b-pin:
37 The B pin to use. The pin numbering scheme is the same as
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| /Zephyr-Core-2.7.6/dts/bindings/flash_controller/ |
| D | nordic,nrf-qspi.yaml | 25 sck-pin:
29 The SCK pin to use.
31 For pins P0.0 through P0.31, use the pin number. For example,
34 sck-pin = <16>;
36 For pins P1.0 through P1.31, add 32 to the pin number. For
39 sck-pin = <34>; /* 32 + 2 */
44 Pin numbers associated with IO0 through IO3 signals.
48 io-pins = <io0-pin io1-pin>; // two pins
50 io-pins = <io0-pin io1-pin io2-pin io3-pin>; // four pins
53 as shown above. The pin numbering scheme is the same as the
[all …]
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| /Zephyr-Core-2.7.6/soc/arm/atmel_sam0/common/ |
| D | soc_port.h | 8 * @brief Atmel SAM0 MCU family I/O Pin Controller (PORT)
17 * Pin flags/attributes
44 /** Connect pin to peripheral A. */
46 /** Connect pin to peripheral B. */
48 /** Connect pin to peripheral C. */
50 /** Connect pin to peripheral D. */
52 /** Connect pin to peripheral E. */
54 /** Connect pin to peripheral F. */
56 /** Connect pin to peripheral G. */
58 /** Connect pin to peripheral H. */
[all …]
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| D | soc_port.c | 9 * @brief Atmel SAM0 MCU family I/O Pin Controller (PORT)
14 int soc_port_pinmux_set(PortGroup *pg, uint32_t pin, uint32_t func) in soc_port_pinmux_set() argument
16 bool is_odd = pin & 1; in soc_port_pinmux_set()
17 int idx = pin / 2U; in soc_port_pinmux_set()
20 * even numbered pin goes in the bits 0..3 and the odd in soc_port_pinmux_set()
21 * numbered pin in bits 4..7. in soc_port_pinmux_set()
28 pg->PINCFG[pin].bit.PMUXEN = 1; in soc_port_pinmux_set()
33 void soc_port_configure(const struct soc_port_pin *pin) in soc_port_configure() argument
35 PortGroup *pg = pin->regs; in soc_port_configure()
36 uint32_t flags = pin->flags; in soc_port_configure()
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| /Zephyr-Core-2.7.6/drivers/modem/ |
| D | modem_pin.c | 2 * @brief Modem pin setup for modem context driver
4 * GPIO-based pin handling for the modem context driver
19 int modem_pin_read(struct modem_context *ctx, uint32_t pin) in modem_pin_read() argument
21 if (pin >= ctx->pins_len) { in modem_pin_read()
25 return gpio_pin_get(ctx->pins[pin].gpio_port_dev, in modem_pin_read()
26 ctx->pins[pin].pin); in modem_pin_read()
29 int modem_pin_write(struct modem_context *ctx, uint32_t pin, uint32_t value) in modem_pin_write() argument
31 if (pin >= ctx->pins_len) { in modem_pin_write()
35 return gpio_pin_set(ctx->pins[pin].gpio_port_dev, in modem_pin_write()
36 ctx->pins[pin].pin, value); in modem_pin_write()
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| /Zephyr-Core-2.7.6/boards/xtensa/esp32/ |
| D | esp32.dts | 38 tx-pin = <1>;
39 rx-pin = <3>;
40 rts-pin = <22>;
41 cts-pin = <19>;
46 tx-pin = <10>;
47 rx-pin = <9>;
48 rts-pin = <11>;
49 cts-pin = <6>;
55 tx-pin = <17>;
56 rx-pin = <16>;
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| /Zephyr-Core-2.7.6/dts/bindings/pwm/ |
| D | nordic,nrf-pwm.yaml | 16 ch0-pin:
20 The channel 0 pin to use.
22 For pins P0.0 through P0.31, use the pin number. For example,
25 ch0-pin = <16>;
27 For pins P1.0 through P1.31, add 32 to the pin number. For
30 ch0-pin = <34>; /* 32 + 2 */
37 ch1-pin:
41 The channel 1 pin to use. The pin numbering scheme is the same
42 as the ch0-pin property's.
49 ch2-pin:
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| /Zephyr-Core-2.7.6/dts/bindings/spi/ |
| D | nordic,nrf-spi-common.yaml | 15 sck-pin:
19 The SCK pin to use.
21 For pins P0.0 through P0.31, use the pin number. For example,
24 sck-pin = <16>;
26 For pins P1.0 through P1.31, add 32 to the pin number. For
29 sck-pin = <34>; /* 32 + 2 */
31 mosi-pin:
35 The MOSI pin to use. The pin numbering scheme is the same as
36 the sck-pin property's.
38 miso-pin:
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| /Zephyr-Core-2.7.6/include/drivers/interrupt_controller/ |
| D | sam0_eic.h | 33 * @brief Acquire an EIC interrupt for specific port and pin combination
35 * This acquires the EIC interrupt for a specific port and pin combination,
41 * @param pin pin in the port
47 int sam0_eic_acquire(int port, int pin, enum sam0_eic_trigger trigger,
51 * @brief Release the EIC interrupt for a specific port and pin combination
53 * Release the EIC configuration for a specific port and pin combination.
58 * @param pin pin in the port
60 int sam0_eic_release(int port, int pin);
63 * @brief Enable the EIC interrupt for a specific port and pin combination
66 * @param pin pin in the port
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| /Zephyr-Core-2.7.6/drivers/pinmux/ |
| D | pinmux_b91.c | 23 #define reg_gpio_en(pin) (*(volatile uint8_t *)((uint32_t)DT_INST_REG_ADDR_BY_NAME(0, gpio_en) + \ argument
24 ((pin >> 8) * 8)))
42 #define reg_pin_mux(pin) (*(volatile uint8_t *)((uint32_t)DT_INST_REG_ADDR_BY_NAME(0, pin_mux) + \ argument
43 (((pin >> 8) < 4) ? ((pin >> 8) * 2) : 0) + \
44 (((pin >> 8) == 4) ? 0x20 : 0) + \
45 (((pin >> 8) == 5) ? 0x26 : 0) + \
46 ((pin & 0x0f0) ? 1 : 0)))
64 #define reg_pull_up_en(pin) ((uint8_t)(DT_INST_REG_ADDR_BY_NAME(0, pull_up_en) + \ argument
65 ((pin >> 8) * 2) + \
66 ((pin & 0xf0) ? 1 : 0)))
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| D | pinmux_cc13xx_cc26xx.c | 16 static int pinmux_cc13xx_cc26xx_set(const struct device *dev, uint32_t pin, in pinmux_cc13xx_cc26xx_set() argument
21 __ASSERT_NO_MSG(pin < NUM_IO_MAX); in pinmux_cc13xx_cc26xx_set()
24 IOCIOPortIdSet(pin, func); in pinmux_cc13xx_cc26xx_set()
29 static int pinmux_cc13xx_cc26xx_get(const struct device *dev, uint32_t pin, in pinmux_cc13xx_cc26xx_get() argument
34 __ASSERT_NO_MSG(pin < NUM_IO_MAX); in pinmux_cc13xx_cc26xx_get()
36 *func = IOCPortConfigureGet(pin) & IOC_IOCFG0_PORT_ID_M; in pinmux_cc13xx_cc26xx_get()
41 static int pinmux_cc13xx_cc26xx_pullup(const struct device *dev, uint32_t pin, in pinmux_cc13xx_cc26xx_pullup() argument
46 __ASSERT_NO_MSG(pin < NUM_IO_MAX); in pinmux_cc13xx_cc26xx_pullup()
50 IOCIOPortPullSet(pin, IOC_IOPULL_UP); in pinmux_cc13xx_cc26xx_pullup()
53 IOCIOPortPullSet(pin, IOC_NO_IOPULL); in pinmux_cc13xx_cc26xx_pullup()
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| /Zephyr-Core-2.7.6/samples/boards/up_squared/gpio_counter/src/ |
| D | main.c | 22 * as a 4-bit value (bin 0, 1, 2, 3 -> HAT Pin 35, 37, 38, 40).
23 * The counter increments for each change from 0 to 1 on HAT Pin 16.
42 uint32_t pin; member
50 .pin = UP2_HAT_PIN_35,
55 .pin = UP2_HAT_PIN_37,
60 .pin = UP2_HAT_PIN_38,
65 .pin = UP2_HAT_PIN_40,
72 .pin = UP2_HAT_PIN_16,
86 uint32_t pin) in button_cb() argument
92 int get_gpio_dev(struct _pin *pin) in get_gpio_dev() argument
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| /Zephyr-Core-2.7.6/boards/arm/cc3235sf_launchxl/ |
| D | pinmux.c | 40 #include <driverlib/pin.h>
49 * Macros defining possible I2C signal pin mux options
51 * The bits in the pin mode macros are as follows:
52 * The lower 8 bits of the macro refer to the pin, offset by 1, to match
53 * driverlib pin defines. For example, I2C_CC32XX_PIN_01_I2C_SCL & 0xff = 0,
54 * which equals PIN_01 in driverlib pin.h. By matching the PIN_xx defines in
55 * driverlib pin.h, we can pass the pin directly to the driverlib functions.
56 * The upper 8 bits of the macro correspond to the pin mux confg mode
57 * value for the pin to operate in the I2C mode. For example, pin 1 is
60 #define I2C_CC32XX_PIN_01_I2C_SCL 0x100 /*!< PIN 1 is used for I2C_SCL */
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| /Zephyr-Core-2.7.6/include/drivers/ |
| D | gpio.h | 42 /** Enables pin as input. */
45 /** Enables pin as output, no change to the output state. */
48 /** Disables pin for both input and output. */
64 /** Configures GPIO pin as output and initializes it to a low state. */
66 /** Configures GPIO pin as output and initializes it to a high state. */
68 /** Configures GPIO pin as output and initializes it to a logic 0. */
72 /** Configures GPIO pin as output and initializes it to a logic 1. */
82 * interrupts. The interrupts can be sensitive to pin physical or logical level.
83 * Interrupts sensitive to pin logical level take into account GPIO_ACTIVE_LOW
84 * flag. If a pin was configured as Active Low, physical level low will be
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| /Zephyr-Core-2.7.6/dts/bindings/i2c/ |
| D | nordic,nrf-twi-common.yaml | 16 sda-pin:
20 The SDA pin to use.
22 For pins P0.0 through P0.31, use the pin number. For example,
25 sda-pin = <16>;
27 For pins P1.0 through P1.31, add 32 to the pin number. For
30 sda-pin = <34>; /* 32 + 2 */
32 scl-pin:
36 The SCL pin to use. The pin numbering scheme is the same as
37 the sda-pin property's.
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| /Zephyr-Core-2.7.6/include/drivers/gpio/ |
| D | gpio_sx1509b.h | 14 * @brief Configure a pin for LED intensity.
16 * Configure a pin to be controlled by SX1509B LED driver using
18 * To get back normal GPIO funcionality, configure the pin using
22 * @param pin Pin number.
26 * @retval -ERANGE if pin number is out of range.
30 gpio_pin_t pin);
33 * @brief Set LED intensity of selected pin.
36 * @param pin Pin number.
42 int sx1509b_led_intensity_pin_set(const struct device *dev, gpio_pin_t pin,
|
