Searched full:peripherals (Results 1 – 25 of 368) sorted by relevance
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/Zephyr-Core-3.6.0/doc/_scripts/ |
D | redirects.py | 130 ('reference/peripherals/adc', 'hardware/peripherals/adc'), 131 ('reference/peripherals/dac', 'hardware/peripherals/dac'), 132 ('reference/peripherals/dma', 'hardware/peripherals/dma'), 133 ('reference/peripherals/eeprom', 'hardware/peripherals/eeprom'), 134 ('reference/peripherals/espi', 'hardware/peripherals/espi'), 135 ('reference/peripherals/flash', 'hardware/peripherals/flash'), 136 ('reference/peripherals/gna', 'hardware/peripherals/gna'), 137 ('reference/peripherals/gpio', 'hardware/peripherals/gpio'), 138 ('reference/peripherals/hwinfo', 'hardware/peripherals/hwinfo'), 139 ('reference/peripherals/i2c', 'hardware/peripherals/i2c'), [all …]
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/Zephyr-Core-3.6.0/include/zephyr/dt-bindings/gpio/ |
D | digilent-pmod.h | 49 * Used with Pmod Interface Type 2 (SPI) peripherals. 55 * Used with Pmod Interface Type 2 (SPI) peripherals. 61 * Used with Pmod Interface Type 2 (SPI) peripherals. 67 * Used with Pmod Interface Type 2 (SPI) peripherals. 75 * Used with Pmod Interface Type 2A (expanded SPI) peripherals. 81 * Used with Pmod Interface Type 2A (expanded SPI) peripherals. 87 * Used with Pmod Interface Type 2A (expanded SPI) peripherals. 93 * Used with Pmod Interface Type 2A (expanded SPI) peripherals. 99 * Used with Pmod Interface Type 2A (expanded SPI) peripherals. 105 * Used with Pmod Interface Type 2A (expanded SPI) peripherals. [all …]
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/Zephyr-Core-3.6.0/include/zephyr/dt-bindings/reset/ |
D | gd32f3x0.h | 25 * @name Clock enable/disable definitions for peripherals 29 /* APB2 peripherals */ 39 /* APB1 peripherals */ 51 /* AHB peripherals */ 60 /* APB1 additional peripherals */
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D | gd32l23x.h | 24 * @name Clock enable/disable definitions for peripherals 28 /* AHB1 peripherals */ 36 /* AHB2 peripherals */ 40 /* APB1 peripherals */ 62 /* APB2 peripherals */
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D | gd32f4xx.h | 27 * @name Clock enable/disable definitions for peripherals 31 /* AHB1 peripherals */ 54 /* AHB2 peripherals */ 59 /* AHB3 peripherals */ 62 /* APB1 peripherals */ 90 /* APB2 peripherals */ 109 /* APB1 additional peripherals */
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D | gd32e10x.h | 25 * @name Clock enable/disable definitions for peripherals 29 /* APB2 peripherals */ 46 /* APB1 peripherals */ 71 /* AHB peripherals */ 74 /* APB1 additional peripherals */
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D | gd32f403.h | 25 * @name Clock enable/disable definitions for peripherals 29 /* APB2 peripherals */ 49 /* APB1 peripherals */ 72 /* AHB peripherals */ 75 /* APB1 additional peripherals */
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D | gd32e50x.h | 25 * @name Clock enable/disable definitions for peripherals 29 /* APB2 peripherals */ 52 /* APB1 peripherals */ 78 /* AHB peripherals */ 84 /* APB1 additional peripherals */
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D | gd32vf103.h | 24 * @name Clock enable/disable definitions for peripherals 28 /* APB2 peripherals */ 42 /* APB1 peripherals */ 64 /* AHB peripherals */
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D | gd32a50x.h | 24 * @name Clock enable/disable definitions for peripherals 29 /* AHB peripherals */ 44 /* APB1 peripherals */ 58 /* APB2 peripherals */
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/Zephyr-Core-3.6.0/include/zephyr/dt-bindings/clock/ |
D | gd32f3x0-clocks.h | 25 * @name Clock enable/disable definitions for peripherals 29 /* AHB peripherals */ 42 /* APB1 peripherals */ 56 /* APB2 peripherals */ 66 /* APB1 additional peripherals */
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D | gd32l23x-clocks.h | 24 * @name Clock enable/disable definitions for peripherals 28 /* AHB1 peripherals */ 40 /* AHB2 peripherals */ 44 /* APB1 peripherals */ 67 /* APB2 peripherals */
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D | gd32f4xx-clocks.h | 27 * @name Clock enable/disable definitions for peripherals 31 /* AHB1 peripherals */ 54 /* AHB2 peripherals */ 59 /* AHB3 peripherals */ 62 /* APB1 peripherals */ 90 /* APB2 peripherals */ 109 /* APB1 additional peripherals */
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D | gd32e10x-clocks.h | 25 * @name Clock enable/disable definitions for peripherals 29 /* AHB peripherals */ 38 /* APB1 peripherals */ 61 /* APB2 peripherals */ 78 /* APB1 additional peripherals */
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D | gd32f403-clocks.h | 25 * @name Clock enable/disable definitions for peripherals 29 /* AHB peripherals */ 39 /* APB1 peripherals */ 62 /* APB2 peripherals */ 82 /* APB1 additional peripherals */
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D | gd32a50x-clocks.h | 24 * @name Clock enable/disable definitions for peripherals 28 /* AHB peripherals */ 43 /* APB1 peripherals */ 57 /* APB2 peripherals */
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D | gd32vf103-clocks.h | 24 * @name Clock enable/disable definitions for peripherals 28 /* AHB peripherals */ 37 /* APB1 peripherals */ 59 /* APB2 peripherals */
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D | gd32e50x-clocks.h | 25 * @name Clock enable/disable definitions for peripherals 29 /* AHB peripherals */ 44 /* APB1 peripherals */ 70 /* APB2 peripherals */ 93 /* APB1 additional peripherals */
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/Zephyr-Core-3.6.0/soc/arm/nordic_nrf/ |
D | validate_enabled_instances.c | 21 * In most Nordic SoCs, SPI and TWI peripherals with the same instance number 23 * nRF53 and nRF91 Series this limitation concerns UART peripherals as well). 26 * these peripherals and they are arranged in a different way, so this 39 "Only one of the following peripherals can be enabled: " \ 56 "Only one of the following peripherals can be enabled: "
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/Zephyr-Core-3.6.0/dts/bindings/power/ |
D | atmel,sam-supc.yaml | 9 device from a low-power state using special peripherals as wake-up sources. 11 The dedicated peripherals that can wake-up the core supply domain are: RTC, 12 RTT, Supply Monitor and GPIOs. In the first three peripherals it is necessary
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/Zephyr-Core-3.6.0/dts/bindings/dma/ |
D | espressif,esp32-gdma.yaml | 14 Every channel can be connected to different peripherals. 16 ESP32C3's Peripherals with GDMA: 28 ESP32S3's Peripherals with GDMA:
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/Zephyr-Core-3.6.0/dts/bindings/i2c/ |
D | nordic,nrf-twi.yaml | 8 peripherals. When a single SoC peripheral ID corresponds to multiple 9 I2C peripherals (like TWI or TWIM), the corresponding devicetree 40 If your SoC only has TWIM and TWIS I2C peripherals, you cannot use
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/Zephyr-Core-3.6.0/doc/develop/optimizations/ |
D | footprint.rst | 30 Unused Peripherals 33 Some peripherals are enabled by default. You can disable unused 34 peripherals in your project configuration, for example::
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/Zephyr-Core-3.6.0/dts/arm/st/h7/ |
D | stm32h7b0.dtsi | 11 * STM32H7B0 line contains the same peripherals as STM32H7A3, 12 * with addition of CRYPTO/HASH and OTFDEC peripherals.
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/Zephyr-Core-3.6.0/soc/arm/atmel_sam/common/ |
D | soc_pmc.c | 31 /* Nothing to do, thes peripherals can't be enabled */ in soc_pmc_peripheral_enable() 48 /* Nothing to do, these peripherals can't be disabled */ in soc_pmc_peripheral_disable() 65 /* These peripherals are always enabled */ in soc_pmc_peripheral_is_enabled()
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