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/hal_atmel-3.7.0/asf/sam/include/samv71/pio/
Dsamv71q19.h144 #define PIN_PE1 (129) /**< Pin Number for PE1 */
261 #define PIO_PE1 (_U_(1) << 1) /**< PIO Mask for PE1 */
378 #define PIO_PE1_IDX (129) /**< PIO Index Number for PE1 */
1211 #define PIN_PE1A_SDRAMC_D9 _L_(129) /**< SDRAMC signal: D9 on PE1 mux A…
1484 #define PIN_PE1A_SMC_D9 _L_(129) /**< SMC signal: D9 on PE1 mux A*/
1843 #define PIN_PE1B_TC3_TIOB9 _L_(129) /**< TC3 signal: TIOB9 on PE1 mux B…
2215 #define PIN_PE1A_EBI_D9 _L_(129) /**< EBI signal: D9 on PE1 mux A*/
Dsamv71q20.h144 #define PIN_PE1 (129) /**< Pin Number for PE1 */
261 #define PIO_PE1 (_U_(1) << 1) /**< PIO Mask for PE1 */
378 #define PIO_PE1_IDX (129) /**< PIO Index Number for PE1 */
1211 #define PIN_PE1A_SDRAMC_D9 _L_(129) /**< SDRAMC signal: D9 on PE1 mux A…
1484 #define PIN_PE1A_SMC_D9 _L_(129) /**< SMC signal: D9 on PE1 mux A*/
1843 #define PIN_PE1B_TC3_TIOB9 _L_(129) /**< TC3 signal: TIOB9 on PE1 mux B…
2215 #define PIN_PE1A_EBI_D9 _L_(129) /**< EBI signal: D9 on PE1 mux A*/
Dsamv71q21.h144 #define PIN_PE1 (129) /**< Pin Number for PE1 */
261 #define PIO_PE1 (_U_(1) << 1) /**< PIO Mask for PE1 */
378 #define PIO_PE1_IDX (129) /**< PIO Index Number for PE1 */
1211 #define PIN_PE1A_SDRAMC_D9 _L_(129) /**< SDRAMC signal: D9 on PE1 mux A…
1484 #define PIN_PE1A_SMC_D9 _L_(129) /**< SMC signal: D9 on PE1 mux A*/
1843 #define PIN_PE1B_TC3_TIOB9 _L_(129) /**< TC3 signal: TIOB9 on PE1 mux B…
2215 #define PIN_PE1A_EBI_D9 _L_(129) /**< EBI signal: D9 on PE1 mux A*/
/hal_atmel-3.7.0/asf/sam/include/same70/pio/
Dsame70q19.h144 #define PIN_PE1 (129) /**< Pin Number for PE1 */
261 #define PIO_PE1 (_U_(1) << 1) /**< PIO Mask for PE1 */
378 #define PIO_PE1_IDX (129) /**< PIO Index Number for PE1 */
1198 #define PIN_PE1A_SDRAMC_D9 _L_(129) /**< SDRAMC signal: D9 on PE1 mux A…
1471 #define PIN_PE1A_SMC_D9 _L_(129) /**< SMC signal: D9 on PE1 mux A*/
1830 #define PIN_PE1B_TC3_TIOB9 _L_(129) /**< TC3 signal: TIOB9 on PE1 mux B…
2202 #define PIN_PE1A_EBI_D9 _L_(129) /**< EBI signal: D9 on PE1 mux A*/
Dsame70q20.h144 #define PIN_PE1 (129) /**< Pin Number for PE1 */
261 #define PIO_PE1 (_U_(1) << 1) /**< PIO Mask for PE1 */
378 #define PIO_PE1_IDX (129) /**< PIO Index Number for PE1 */
1198 #define PIN_PE1A_SDRAMC_D9 _L_(129) /**< SDRAMC signal: D9 on PE1 mux A…
1471 #define PIN_PE1A_SMC_D9 _L_(129) /**< SMC signal: D9 on PE1 mux A*/
1830 #define PIN_PE1B_TC3_TIOB9 _L_(129) /**< TC3 signal: TIOB9 on PE1 mux B…
2202 #define PIN_PE1A_EBI_D9 _L_(129) /**< EBI signal: D9 on PE1 mux A*/
Dsame70q21.h144 #define PIN_PE1 (129) /**< Pin Number for PE1 */
261 #define PIO_PE1 (_U_(1) << 1) /**< PIO Mask for PE1 */
378 #define PIO_PE1_IDX (129) /**< PIO Index Number for PE1 */
1198 #define PIN_PE1A_SDRAMC_D9 _L_(129) /**< SDRAMC signal: D9 on PE1 mux A…
1471 #define PIN_PE1A_SMC_D9 _L_(129) /**< SMC signal: D9 on PE1 mux A*/
1830 #define PIN_PE1B_TC3_TIOB9 _L_(129) /**< TC3 signal: TIOB9 on PE1 mux B…
2202 #define PIN_PE1A_EBI_D9 _L_(129) /**< EBI signal: D9 on PE1 mux A*/
/hal_atmel-3.7.0/asf/sam/include/same70b/pio/
Dsame70q21b.h144 #define PIN_PE1 (129) /**< Pin Number for PE1 */
261 #define PIO_PE1 (_U_(1) << 1) /**< PIO Mask for PE1 */
378 #define PIO_PE1_IDX (129) /**< PIO Index Number for PE1 */
607 #define PIN_PE1A_EBI_D9 _L_(129) /**< EBI signal: D9 on PE1 mux A*/
955 #define PIN_PE1C_I2SC1_DO0 _L_(129) /**< I2SC1 signal: DO0 on PE1 mux C…
1703 #define PIN_PE1B_TC3_TIOB9 _L_(129) /**< TC3 signal: TIOB9 on PE1 mux B…
Dsame70q19b.h144 #define PIN_PE1 (129) /**< Pin Number for PE1 */
261 #define PIO_PE1 (_U_(1) << 1) /**< PIO Mask for PE1 */
378 #define PIO_PE1_IDX (129) /**< PIO Index Number for PE1 */
607 #define PIN_PE1A_EBI_D9 _L_(129) /**< EBI signal: D9 on PE1 mux A*/
955 #define PIN_PE1C_I2SC1_DO0 _L_(129) /**< I2SC1 signal: DO0 on PE1 mux C…
1703 #define PIN_PE1B_TC3_TIOB9 _L_(129) /**< TC3 signal: TIOB9 on PE1 mux B…
Dsame70q20b.h144 #define PIN_PE1 (129) /**< Pin Number for PE1 */
261 #define PIO_PE1 (_U_(1) << 1) /**< PIO Mask for PE1 */
378 #define PIO_PE1_IDX (129) /**< PIO Index Number for PE1 */
607 #define PIN_PE1A_EBI_D9 _L_(129) /**< EBI signal: D9 on PE1 mux A*/
955 #define PIN_PE1C_I2SC1_DO0 _L_(129) /**< I2SC1 signal: DO0 on PE1 mux C…
1703 #define PIN_PE1B_TC3_TIOB9 _L_(129) /**< TC3 signal: TIOB9 on PE1 mux B…
/hal_atmel-3.7.0/asf/sam/include/samv71b/pio/
Dsamv71q19b.h144 #define PIN_PE1 (129) /**< Pin Number for PE1 */
261 #define PIO_PE1 (_U_(1) << 1) /**< PIO Mask for PE1 */
378 #define PIO_PE1_IDX (129) /**< PIO Index Number for PE1 */
607 #define PIN_PE1A_EBI_D9 _L_(129) /**< EBI signal: D9 on PE1 mux A*/
955 #define PIN_PE1C_I2SC1_DO0 _L_(129) /**< I2SC1 signal: DO0 on PE1 mux C…
1716 #define PIN_PE1B_TC3_TIOB9 _L_(129) /**< TC3 signal: TIOB9 on PE1 mux B…
Dsamv71q20b.h144 #define PIN_PE1 (129) /**< Pin Number for PE1 */
261 #define PIO_PE1 (_U_(1) << 1) /**< PIO Mask for PE1 */
378 #define PIO_PE1_IDX (129) /**< PIO Index Number for PE1 */
607 #define PIN_PE1A_EBI_D9 _L_(129) /**< EBI signal: D9 on PE1 mux A*/
955 #define PIN_PE1C_I2SC1_DO0 _L_(129) /**< I2SC1 signal: DO0 on PE1 mux C…
1716 #define PIN_PE1B_TC3_TIOB9 _L_(129) /**< TC3 signal: TIOB9 on PE1 mux B…
Dsamv71q21b.h144 #define PIN_PE1 (129) /**< Pin Number for PE1 */
261 #define PIO_PE1 (_U_(1) << 1) /**< PIO Mask for PE1 */
378 #define PIO_PE1_IDX (129) /**< PIO Index Number for PE1 */
607 #define PIN_PE1A_EBI_D9 _L_(129) /**< EBI signal: D9 on PE1 mux A*/
955 #define PIN_PE1C_I2SC1_DO0 _L_(129) /**< I2SC1 signal: DO0 on PE1 mux C…
1716 #define PIN_PE1B_TC3_TIOB9 _L_(129) /**< TC3 signal: TIOB9 on PE1 mux B…
/hal_atmel-3.7.0/pinconfigs/
Dsam-4e.yml670 pe1:
Dsam-3x.yml693 pe1:
Dsam-s70-e70-v7x.yml783 pe1:
/hal_atmel-3.7.0/asf/sam/include/sam4e/pio/
Dsam4e16c.h145 #define PIO_PE1 (1u << 1) /**< \brief Pin Controlled by PE1 */
Dsam4e8c.h145 #define PIO_PE1 (1u << 1) /**< \brief Pin Controlled by PE1 */
Dsam4e16e.h145 #define PIO_PE1 (1u << 1) /**< \brief Pin Controlled by PE1 */
Dsam4e8e.h145 #define PIO_PE1 (1u << 1) /**< \brief Pin Controlled by PE1 */
/hal_atmel-3.7.0/asf/sam/include/sam3x/pio/
Dsam3x8h.h160 #define PIO_PE1 (1u << 1) /**< \brief Pin Controlled by PE1 */