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/hal_atmel-3.5.0-3.4.0/scripts/tests/sampinctrl/data/
Dsam-pinctrl.yml34 pc0:
/hal_atmel-3.5.0-3.4.0/asf/sam/include/samv71/pio/
Dsamv71q19.h79 #define PIN_PC0 ( 64) /**< Pin Number for PC0 */
196 #define PIO_PC0 (_U_(1) << 0) /**< PIO Mask for PC0 */
313 #define PIO_PC0_IDX ( 64) /**< PIO Index Number for PC0 */
472 #define PIN_PC0X1_AFEC1_AD9 _L_(64) /**< AFEC1 signal: AD9 on PC0 mux X…
868 #define PIN_PC0B_PWM0_PWML0 _L_(64) /**< PWM0 signal: PWML0 on PC0 mux …
1175 #define PIN_PC0A_SDRAMC_D0 _L_(64) /**< SDRAMC signal: D0 on PC0 mux A…
1448 #define PIN_PC0A_SMC_D0 _L_(64) /**< SMC signal: D0 on PC0 mux A*/
2179 #define PIN_PC0A_EBI_D0 _L_(64) /**< EBI signal: D0 on PC0 mux A*/
Dsamv71q20.h79 #define PIN_PC0 ( 64) /**< Pin Number for PC0 */
196 #define PIO_PC0 (_U_(1) << 0) /**< PIO Mask for PC0 */
313 #define PIO_PC0_IDX ( 64) /**< PIO Index Number for PC0 */
472 #define PIN_PC0X1_AFEC1_AD9 _L_(64) /**< AFEC1 signal: AD9 on PC0 mux X…
868 #define PIN_PC0B_PWM0_PWML0 _L_(64) /**< PWM0 signal: PWML0 on PC0 mux …
1175 #define PIN_PC0A_SDRAMC_D0 _L_(64) /**< SDRAMC signal: D0 on PC0 mux A…
1448 #define PIN_PC0A_SMC_D0 _L_(64) /**< SMC signal: D0 on PC0 mux A*/
2179 #define PIN_PC0A_EBI_D0 _L_(64) /**< EBI signal: D0 on PC0 mux A*/
Dsamv71q21.h79 #define PIN_PC0 ( 64) /**< Pin Number for PC0 */
196 #define PIO_PC0 (_U_(1) << 0) /**< PIO Mask for PC0 */
313 #define PIO_PC0_IDX ( 64) /**< PIO Index Number for PC0 */
472 #define PIN_PC0X1_AFEC1_AD9 _L_(64) /**< AFEC1 signal: AD9 on PC0 mux X…
868 #define PIN_PC0B_PWM0_PWML0 _L_(64) /**< PWM0 signal: PWML0 on PC0 mux …
1175 #define PIN_PC0A_SDRAMC_D0 _L_(64) /**< SDRAMC signal: D0 on PC0 mux A…
1448 #define PIN_PC0A_SMC_D0 _L_(64) /**< SMC signal: D0 on PC0 mux A*/
2179 #define PIN_PC0A_EBI_D0 _L_(64) /**< EBI signal: D0 on PC0 mux A*/
/hal_atmel-3.5.0-3.4.0/asf/sam/include/same70/pio/
Dsame70q19.h79 #define PIN_PC0 ( 64) /**< Pin Number for PC0 */
196 #define PIO_PC0 (_U_(1) << 0) /**< PIO Mask for PC0 */
313 #define PIO_PC0_IDX ( 64) /**< PIO Index Number for PC0 */
472 #define PIN_PC0X1_AFEC1_AD9 _L_(64) /**< AFEC1 signal: AD9 on PC0 mux X…
855 #define PIN_PC0B_PWM0_PWML0 _L_(64) /**< PWM0 signal: PWML0 on PC0 mux …
1162 #define PIN_PC0A_SDRAMC_D0 _L_(64) /**< SDRAMC signal: D0 on PC0 mux A…
1435 #define PIN_PC0A_SMC_D0 _L_(64) /**< SMC signal: D0 on PC0 mux A*/
2166 #define PIN_PC0A_EBI_D0 _L_(64) /**< EBI signal: D0 on PC0 mux A*/
Dsame70q20.h79 #define PIN_PC0 ( 64) /**< Pin Number for PC0 */
196 #define PIO_PC0 (_U_(1) << 0) /**< PIO Mask for PC0 */
313 #define PIO_PC0_IDX ( 64) /**< PIO Index Number for PC0 */
472 #define PIN_PC0X1_AFEC1_AD9 _L_(64) /**< AFEC1 signal: AD9 on PC0 mux X…
855 #define PIN_PC0B_PWM0_PWML0 _L_(64) /**< PWM0 signal: PWML0 on PC0 mux …
1162 #define PIN_PC0A_SDRAMC_D0 _L_(64) /**< SDRAMC signal: D0 on PC0 mux A…
1435 #define PIN_PC0A_SMC_D0 _L_(64) /**< SMC signal: D0 on PC0 mux A*/
2166 #define PIN_PC0A_EBI_D0 _L_(64) /**< EBI signal: D0 on PC0 mux A*/
Dsame70q21.h79 #define PIN_PC0 ( 64) /**< Pin Number for PC0 */
196 #define PIO_PC0 (_U_(1) << 0) /**< PIO Mask for PC0 */
313 #define PIO_PC0_IDX ( 64) /**< PIO Index Number for PC0 */
472 #define PIN_PC0X1_AFEC1_AD9 _L_(64) /**< AFEC1 signal: AD9 on PC0 mux X…
855 #define PIN_PC0B_PWM0_PWML0 _L_(64) /**< PWM0 signal: PWML0 on PC0 mux …
1162 #define PIN_PC0A_SDRAMC_D0 _L_(64) /**< SDRAMC signal: D0 on PC0 mux A…
1435 #define PIN_PC0A_SMC_D0 _L_(64) /**< SMC signal: D0 on PC0 mux A*/
2166 #define PIN_PC0A_EBI_D0 _L_(64) /**< EBI signal: D0 on PC0 mux A*/
/hal_atmel-3.5.0-3.4.0/asf/sam/include/same70b/pio/
Dsame70q20b.h79 #define PIN_PC0 ( 64) /**< Pin Number for PC0 */
196 #define PIO_PC0 (_U_(1) << 0) /**< PIO Mask for PC0 */
313 #define PIO_PC0_IDX ( 64) /**< PIO Index Number for PC0 */
454 #define PIN_PC0X1_AFEC1_AD9 _L_(64) /**< AFEC1 signal: AD9 on PC0 mux X…
571 #define PIN_PC0A_EBI_D0 _L_(64) /**< EBI signal: D0 on PC0 mux A*/
1224 #define PIN_PC0B_PWM0_PWML0 _L_(64) /**< PWM0 signal: PWML0 on PC0 mux …
Dsame70q21b.h79 #define PIN_PC0 ( 64) /**< Pin Number for PC0 */
196 #define PIO_PC0 (_U_(1) << 0) /**< PIO Mask for PC0 */
313 #define PIO_PC0_IDX ( 64) /**< PIO Index Number for PC0 */
454 #define PIN_PC0X1_AFEC1_AD9 _L_(64) /**< AFEC1 signal: AD9 on PC0 mux X…
571 #define PIN_PC0A_EBI_D0 _L_(64) /**< EBI signal: D0 on PC0 mux A*/
1224 #define PIN_PC0B_PWM0_PWML0 _L_(64) /**< PWM0 signal: PWML0 on PC0 mux …
Dsame70q19b.h79 #define PIN_PC0 ( 64) /**< Pin Number for PC0 */
196 #define PIO_PC0 (_U_(1) << 0) /**< PIO Mask for PC0 */
313 #define PIO_PC0_IDX ( 64) /**< PIO Index Number for PC0 */
454 #define PIN_PC0X1_AFEC1_AD9 _L_(64) /**< AFEC1 signal: AD9 on PC0 mux X…
571 #define PIN_PC0A_EBI_D0 _L_(64) /**< EBI signal: D0 on PC0 mux A*/
1224 #define PIN_PC0B_PWM0_PWML0 _L_(64) /**< PWM0 signal: PWML0 on PC0 mux …
/hal_atmel-3.5.0-3.4.0/asf/sam/include/samv71b/pio/
Dsamv71q20b.h79 #define PIN_PC0 ( 64) /**< Pin Number for PC0 */
196 #define PIO_PC0 (_U_(1) << 0) /**< PIO Mask for PC0 */
313 #define PIO_PC0_IDX ( 64) /**< PIO Index Number for PC0 */
454 #define PIN_PC0X1_AFEC1_AD9 _L_(64) /**< AFEC1 signal: AD9 on PC0 mux X…
571 #define PIN_PC0A_EBI_D0 _L_(64) /**< EBI signal: D0 on PC0 mux A*/
1237 #define PIN_PC0B_PWM0_PWML0 _L_(64) /**< PWM0 signal: PWML0 on PC0 mux …
Dsamv71q19b.h79 #define PIN_PC0 ( 64) /**< Pin Number for PC0 */
196 #define PIO_PC0 (_U_(1) << 0) /**< PIO Mask for PC0 */
313 #define PIO_PC0_IDX ( 64) /**< PIO Index Number for PC0 */
454 #define PIN_PC0X1_AFEC1_AD9 _L_(64) /**< AFEC1 signal: AD9 on PC0 mux X…
571 #define PIN_PC0A_EBI_D0 _L_(64) /**< EBI signal: D0 on PC0 mux A*/
1237 #define PIN_PC0B_PWM0_PWML0 _L_(64) /**< PWM0 signal: PWML0 on PC0 mux …
Dsamv71q21b.h79 #define PIN_PC0 ( 64) /**< Pin Number for PC0 */
196 #define PIO_PC0 (_U_(1) << 0) /**< PIO Mask for PC0 */
313 #define PIO_PC0_IDX ( 64) /**< PIO Index Number for PC0 */
454 #define PIN_PC0X1_AFEC1_AD9 _L_(64) /**< AFEC1 signal: AD9 on PC0 mux X…
571 #define PIN_PC0A_EBI_D0 _L_(64) /**< EBI signal: D0 on PC0 mux A*/
1237 #define PIN_PC0B_PWM0_PWML0 _L_(64) /**< PWM0 signal: PWML0 on PC0 mux …
/hal_atmel-3.5.0-3.4.0/pinconfigs/
Dsam-4s-4sa-4sd.yml365 pc0:
Dsam-4e.yml356 pc0:
Dsam-3x.yml401 pc0:
Dsam-s70-e70-v7x.yml371 pc0:
/hal_atmel-3.5.0-3.4.0/asf/sam/include/sam3x/component/
Dmatrix.h271 #define CCFG_SYSIO_SYSIO12 (0x1u << 12) /**< \brief (CCFG_SYSIO) PC0 or ERASE Assignment */
/hal_atmel-3.5.0-3.4.0/asf/sam/include/sam4s/pio/
Dsam4s4c.h80 #define PIO_PC0 (1u << 0) /**< \brief Pin Controlled by PC0 */
Dsam4s8c.h80 #define PIO_PC0 (1u << 0) /**< \brief Pin Controlled by PC0 */
Dsam4s16c.h80 #define PIO_PC0 (1u << 0) /**< \brief Pin Controlled by PC0 */
Dsam4s2c.h80 #define PIO_PC0 (1u << 0) /**< \brief Pin Controlled by PC0 */
Dsam4sa16c.h80 #define PIO_PC0 (1u << 0) /**< \brief Pin Controlled by PC0 */
Dsam4sd16c.h80 #define PIO_PC0 (1u << 0) /**< \brief Pin Controlled by PC0 */
Dsam4sd32c.h80 #define PIO_PC0 (1u << 0) /**< \brief Pin Controlled by PC0 */

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