Searched full:pb02 (Results 1 – 25 of 105) sorted by relevance
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87 #define PIN_PB02 34 /**< \brief Pin Number for PB02 */88 #define PORT_PB02 (_UL_(1) << 2) /**< \brief PORT Mask for PB02 */135 #define PIN_PB02H_SUPC_OUT1 _L_(34) /**< \brief SUPC signal: OUT1 on PB02 mux H */253 #define PIN_PB02A_EIC_EXTINT2 _L_(34) /**< \brief EIC signal: EXTINT2 on PB02 mux A */736 #define PIN_PB02E_TC2_WO0 _L_(34) /**< \brief TC2 signal: WO0 on PB02 mux E */775 #define PIN_PB02D_SERCOM5_PAD0 _L_(34) /**< \brief SERCOM5 signal: PAD0 on PB02 mux D */861 #define PIN_PB02B_ADC_AIN10 _L_(34) /**< \brief ADC signal: AIN10 on PB02 mux B */999 #define PIN_PB02I_CCL_OUT0 _L_(34) /**< \brief CCL signal: OUT0 on PB02 mux I */
87 #define PIN_PB02 34 /**< \brief Pin Number for PB02 */88 #define PORT_PB02 (_UL_(1) << 2) /**< \brief PORT Mask for PB02 */135 #define PIN_PB02H_SUPC_OUT1 _L_(34) /**< \brief SUPC signal: OUT1 on PB02 mux H */253 #define PIN_PB02A_EIC_EXTINT2 _L_(34) /**< \brief EIC signal: EXTINT2 on PB02 mux A */723 #define PIN_PB02E_TC2_WO0 _L_(34) /**< \brief TC2 signal: WO0 on PB02 mux E */762 #define PIN_PB02D_SERCOM5_PAD0 _L_(34) /**< \brief SERCOM5 signal: PAD0 on PB02 mux D */848 #define PIN_PB02B_ADC_AIN10 _L_(34) /**< \brief ADC signal: AIN10 on PB02 mux B */986 #define PIN_PB02I_CCL_OUT0 _L_(34) /**< \brief CCL signal: OUT0 on PB02 mux I */
90 #define PIN_PB02 34 /**< \brief Pin Number for PB02 */91 #define GPIO_PB02 _UL_(1 << 2) /**< \brief GPIO Mask for PB02 */159 #define PIN_PB02D_IISC_ISCK _L_(34) /**< \brief IISC signal: ISCK on PB02 mux D */383 #define PIN_PB02B_USART1_RTS _L_(34) /**< \brief USART1 signal: RTS on PB02 mux B */470 #define PIN_PB02A_ADCIFE_AD3 _L_(34) /**< \brief ADCIFE signal: AD3 on PB02 mux A */508 #define PIN_PB02E_ACIFC_ACBN0 _L_(34) /**< \brief ACIFC signal: ACBN0 on PB02 mux E */578 #define PIN_PB02C_ABDACB_DAC0 _L_(34) /**< \brief ABDACB signal: DAC0 on PB02 mux C */780 #define PIN_PB02G_CATB_SENSE23 _L_(34) /**< \brief CATB signal: SENSE23 on PB02 mux G */
100 #define PIN_PB02 34 /**< \brief Pin Number for PB02 */101 #define GPIO_PB02 _UL_(1 << 2) /**< \brief GPIO Mask for PB02 */173 #define PIN_PB02D_IISC_ISCK _L_(34) /**< \brief IISC signal: ISCK on PB02 mux D */433 #define PIN_PB02B_USART1_RTS _L_(34) /**< \brief USART1 signal: RTS on PB02 mux B */540 #define PIN_PB02A_ADCIFE_AD3 _L_(34) /**< \brief ADCIFE signal: AD3 on PB02 mux A */578 #define PIN_PB02E_ACIFC_ACBN0 _L_(34) /**< \brief ACIFC signal: ACBN0 on PB02 mux E */676 #define PIN_PB02C_ABDACB_DAC0 _L_(34) /**< \brief ABDACB signal: DAC0 on PB02 mux C */910 #define PIN_PB02G_CATB_SENSE23 _L_(34) /**< \brief CATB signal: SENSE23 on PB02 mux G */
91 #define PIN_PB02 34 /**< \brief Pin Number for PB02 */92 #define PORT_PB02 (_UL_(1) << 2) /**< \brief PORT Mask for PB02 */205 #define PIN_PB02A_EIC_EXTINT2 _L_(34) /**< \brief EIC signal: EXTINT2 on PB02 mux A */759 #define PIN_PB02F_TCC2_WO2 _L_(34) /**< \brief TCC2 signal: WO2 on PB02 mux F */911 #define PIN_PB02N_CCL_OUT0 _L_(34) /**< \brief CCL signal: OUT0 on PB02 mux N */977 #define PIN_PB02D_SERCOM5_PAD0 _L_(34) /**< \brief SERCOM5 signal: PAD0 on PB02 mux D */1062 #define PIN_PB02B_ADC0_AIN14 _L_(34) /**< \brief ADC0 signal: AIN14 on PB02 mux B */1150 #define PIN_PB02O_ADC0_DRV20 _L_(34) /**< \brief ADC0 signal: DRV20 on PB02 mux O */1238 #define PIN_PB02B_ADC0_PTCXY20 _L_(34) /**< \brief ADC0 signal: PTCXY20 on PB02 mux B */
91 #define PIN_PB02 34 /**< \brief Pin Number for PB02 */92 #define PORT_PB02 (_UL_(1) << 2) /**< \brief PORT Mask for PB02 */141 #define PIN_PB02H_SUPC_OUT1 _L_(34) /**< \brief SUPC signal: OUT1 on PB02 mux H */245 #define PIN_PB02A_EIC_EXTINT2 _L_(34) /**< \brief EIC signal: EXTINT2 on PB02 mux A */784 #define PIN_PB02D_SERCOM5_PAD0 _L_(34) /**< \brief SERCOM5 signal: PAD0 on PB02 mux D */870 #define PIN_PB02B_ADC_AIN10 _L_(34) /**< \brief ADC signal: AIN10 on PB02 mux B */1033 #define PIN_PB02I_CCL_OUT0 _L_(34) /**< \brief CCL signal: OUT0 on PB02 mux I */
95 #define PIN_PB02 34 /**< \brief Pin Number for PB02 */96 #define PORT_PB02 (_UL_(1) << 2) /**< \brief PORT Mask for PB02 */173 #define PIN_PB02H_SUPC_OUT1 _L_(34) /**< \brief SUPC signal: OUT1 on PB02 mux H */325 #define PIN_PB02A_EIC_EXTINT2 _L_(34) /**< \brief EIC signal: EXTINT2 on PB02 mux A */961 #define PIN_PB02E_TC2_WO0 _L_(34) /**< \brief TC2 signal: WO0 on PB02 mux E */1020 #define PIN_PB02D_SERCOM5_PAD0 _L_(34) /**< \brief SERCOM5 signal: PAD0 on PB02 mux D */1138 #define PIN_PB02B_ADC_AIN10 _L_(34) /**< \brief ADC signal: AIN10 on PB02 mux B */1353 #define PIN_PB02I_CCL_OUT0 _L_(34) /**< \brief CCL signal: OUT0 on PB02 mux I */
92 #define PIN_PB02 34 /**< \brief Pin Number for PB02 */93 #define PORT_PB02 (_UL_(1) << 2) /**< \brief PORT Mask for PB02 */186 #define PIN_PB02A_EIC_EXTINT2 _L_(34) /**< \brief EIC signal: EXTINT2 on PB02 mux A */513 #define PIN_PB02D_SERCOM5_PAD0 _L_(34) /**< \brief SERCOM5 signal: PAD0 on PB02 mux D */724 #define PIN_PB02E_TC6_WO0 _L_(34) /**< \brief TC6 signal: WO0 on PB02 mux E */774 #define PIN_PB02B_ADC_AIN10 _L_(34) /**< \brief ADC signal: AIN10 on PB02 mux B */
93 #define PIN_PB02 34 /**< \brief Pin Number for PB02 */94 #define PORT_PB02 (_UL_(1) << 2) /**< \brief PORT Mask for PB02 */187 #define PIN_PB02A_EIC_EXTINT2 _L_(34) /**< \brief EIC signal: EXTINT2 on PB02 mux A */501 #define PIN_PB02D_SERCOM5_PAD0 _L_(34) /**< \brief SERCOM5 signal: PAD0 on PB02 mux D */672 #define PIN_PB02B_ADC_AIN10 _L_(34) /**< \brief ADC signal: AIN10 on PB02 mux B */
