Searched +full:output +full:- +full:high (Results 1 – 25 of 431) sorted by relevance
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| /Zephyr-Core-3.5.0/tests/drivers/gpio/gpio_basic_api/src/ |
| D | test_gpio_port.c | 4 * SPDX-License-Identifier: Apache-2.0
10 #define ALL_BITS ((gpio_port_value_t)-1)
14 /* Short-hand for a checked read of PIN_IN raw state */
25 /* Short-hand for a checked read of PIN_IN logical state */
36 /* Short-hand for a checked write of PIN_OUT raw state */
50 /* Short-hand for a checked write of PIN_OUT logic state */
72 TC_PRINT("Validate device %s\n", dev->name); in setup()
75 TC_PRINT("Check %s output %d connected to input %d\n", dev->name, in setup()
82 /* Test output low */ in setup()
85 "pin config output low failed"); in setup()
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| /Zephyr-Core-3.5.0/dts/bindings/i2c/ |
| D | atmel,sam-i2c-twim.yaml | 1 # Copyright (c) 2020-2023 Gerson Fernando Budke <nandojve@gmail.com>
2 # SPDX-License-Identifier: Apache-2.0
7 The Atmel Two-wire Master Interface (TWIM) interconnects components on a
8 unique two-wire bus, made up of one clock line and one data line with speeds
9 of up to 3.4 Mbit/s, based on a byte-oriented transfer format. The TWIM is
20 std-clk-slew-lim = <0>;
21 std-clk-strength-low = "0.5";
22 std-data-slew-lim = <0>;
23 std-data-strength-low = "0.5";
25 hs-clk-slew-lim = <0>;
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| /Zephyr-Core-3.5.0/dts/bindings/pinctrl/ |
| D | pincfg-node.yaml | 2 # SPDX-License-Identifier: Apache-2.0
16 https://www.kernel.org/doc/Documentation/devicetree/bindings/pinctrl/pincfg-node.yaml
19 bias-disable:
23 bias-high-impedance:
25 description: high impedance mode ("third-state", "floating")
27 bias-bus-hold:
31 bias-pull-up:
33 description: enable pull-up resistor
35 bias-pull-down:
37 description: enable pull-down resistor
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| D | st,stm32-pinctrl.yaml | 2 # SPDX-License-Identifier: Apache-2.0
6 Based on pincfg-node.yaml binding.
8 Note: `bias-disable` and `drive-push-pull` are default pin configurations.
9 They will be applied in case no `bias-foo` or `driver-bar` properties
12 compatible: "st,stm32-pinctrl"
20 remap-pa11:
25 remap-pa12:
30 remap-pa11-pa12:
35 child-binding:
40 - name: pincfg-node.yaml
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| D | microchip,xec-pinctrl.yaml | 3 # SPDX-License-Identifier: Apache-2.0
7 Based on pincfg-node.yaml binding.
23 pins, such as the 'bias-pull-up' property in group 2. Here is a list of
26 - bias-disable: Disable pull-up/down (default behavior, not required).
27 - bias-pull-down: Enable pull-down resistor.
28 - bias-pull-up: Enable pull-up resistor.
29 - drive-push-pull: Output driver is push-pull (default, not required).
30 - drive-open-drain: Output driver is open-drain.
31 - output-high: Set output state high when pin configured.
32 - output-low: Set output state low when pin configured.
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| D | st,stm32f1-pinctrl.yaml | 2 # SPDX-License-Identifier: Apache-2.0
6 Based on pincfg-node.yaml binding.
8 Note: `bias-disable` and `drive-push-pull` are default pin configurations.
9 They will be applied in case no `bias-foo` or `driver-bar` properties
12 compatible: "st,stm32f1-pinctrl"
20 swj-cfg:
24 - "full"
25 - "no-njtrst"
26 - "jtag-disable"
27 - "disable"
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| /Zephyr-Core-3.5.0/boards/xtensa/esp32s2_franzininho/ |
| D | esp32s2_franzininho-pinctrl.dtsi | 4 * SPDX-License-Identifier: Apache-2.0
7 #include <zephyr/dt-bindings/pinctrl/esp-pinctrl-common.h>
8 #include <dt-bindings/pinctrl/esp32s2-pinctrl.h>
9 #include <zephyr/dt-bindings/pinctrl/esp32s2-gpio-sigmap.h>
16 output-high;
20 bias-pull-up;
32 output-low;
44 output-low;
52 bias-pull-up;
53 drive-open-drain;
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| /Zephyr-Core-3.5.0/boards/xtensa/esp32s2_saola/ |
| D | esp32s2_saola-pinctrl.dtsi | 4 * SPDX-License-Identifier: Apache-2.0
7 #include <zephyr/dt-bindings/pinctrl/esp-pinctrl-common.h>
8 #include <dt-bindings/pinctrl/esp32s2-pinctrl.h>
9 #include <zephyr/dt-bindings/pinctrl/esp32s2-gpio-sigmap.h>
16 output-high;
20 bias-pull-up;
32 output-low;
44 output-low;
52 bias-pull-up;
53 drive-open-drain;
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| /Zephyr-Core-3.5.0/dts/bindings/gpio/ |
| D | gpio-controller.yaml | 2 # SPDX-License-Identifier: Apache-2.0
7 "gpio-controller":
11 "#gpio-cells":
19 This property indicates the number of in-use slots of available slots
28 gpio-reserved-ranges:
31 If not all the GPIOs at offsets 0...N-1 are usable for ngpios = <N>, then
36 For example, setting "gpio-reserved-ranges = <3 2>, <10 1>;" means that
38 gpio-line-names:
39 type: string-array
44 child-binding:
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| /Zephyr-Core-3.5.0/boards/xtensa/esp32s3_devkitm/ |
| D | esp32s3_devkitm-pinctrl.dtsi | 4 * SPDX-License-Identifier: Apache-2.0
7 #include <zephyr/dt-bindings/pinctrl/esp-pinctrl-common.h>
8 #include <dt-bindings/pinctrl/esp32s3-pinctrl.h>
9 #include <zephyr/dt-bindings/pinctrl/esp32s3-gpio-sigmap.h>
15 output-high;
19 bias-pull-up;
27 bias-pull-up;
28 drive-open-drain;
29 output-high;
37 bias-pull-up;
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| /Zephyr-Core-3.5.0/boards/xtensa/esp32s3_luatos_core/ |
| D | esp32s3_luatos_core-pinctrl.dtsi | 4 * SPDX-License-Identifier: Apache-2.0
7 #include <zephyr/dt-bindings/pinctrl/esp-pinctrl-common.h>
8 #include <dt-bindings/pinctrl/esp32s3-pinctrl.h>
9 #include <zephyr/dt-bindings/pinctrl/esp32s3-gpio-sigmap.h>
15 output-high;
19 bias-pull-up;
27 bias-pull-up;
28 drive-open-drain;
29 output-high;
37 bias-pull-up;
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| /Zephyr-Core-3.5.0/boards/xtensa/m5stickc_plus/ |
| D | m5stickc_plus-pinctrl.dtsi | 4 * SPDX-License-Identifier: Apache-2.0
7 #include <zephyr/dt-bindings/pinctrl/esp-pinctrl-common.h>
8 #include <dt-bindings/pinctrl/esp32-pinctrl.h>
9 #include <zephyr/dt-bindings/pinctrl/esp32-gpio-sigmap.h>
15 output-high;
20 bias-pull-up;
29 output-low;
46 output-low;
59 bias-pull-up;
60 drive-open-drain;
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| /Zephyr-Core-3.5.0/boards/arm/mec172xmodular_assy6930/ |
| D | mec172xmodular_assy6930.dts | 4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
10 #include <microchip/mec172x/mec172xnsz-pinctrl.dtsi>
28 pwm-0 = &pwm0;
32 compatible = "gpio-leds";
49 clock-frequency = <96000000>;
77 current-speed = <115200>;
78 pinctrl-0 = <&uart1_tx_gpio170 &uart1_rx_gpio171>;
79 pinctrl-names = "default";
84 pinctrl-0 = <&adc00_gpio200 &adc03_gpio203
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| /Zephyr-Core-3.5.0/tests/drivers/gpio/gpio_hogs/boards/ |
| D | mr_canhubk3.overlay | 4 * SPDX-License-Identifier: Apache-2.0
7 #include <zephyr/dt-bindings/gpio/gpio.h>
11 output-high-gpios = <&gpioa_h 0 GPIO_ACTIVE_LOW>;
12 output-low-gpios = <&gpioa_h 3 GPIO_ACTIVE_HIGH>;
13 input-gpios = <&gpioa_h 1 GPIO_ACTIVE_HIGH>;
19 gpio-hog;
21 output-high;
25 gpio-hog;
31 gpio-hog;
33 output-low;
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| D | mec172xevb_assy6906.overlay | 4 * SPDX-License-Identifier: Apache-2.0
7 #include <zephyr/dt-bindings/gpio/gpio.h>
11 output-high-gpios = <&gpio_000_036 13 GPIO_ACTIVE_LOW>;
12 output-low-gpios = <&gpio_000_036 14 GPIO_ACTIVE_HIGH>;
13 input-gpios = <&gpio_000_036 11 GPIO_ACTIVE_LOW>;
19 gpio-hog;
21 output-high;
25 gpio-hog;
27 output-low;
31 gpio-hog;
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| D | native_posix.overlay | 4 * SPDX-License-Identifier: Apache-2.0
7 #include <zephyr/dt-bindings/gpio/gpio.h>
11 output-high-gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
12 output-low-gpios = <&gpio0 2 GPIO_ACTIVE_HIGH>;
13 input-gpios = <&gpio0 3 GPIO_ACTIVE_HIGH>;
19 gpio-hog;
21 output-high;
25 gpio-hog;
27 output-low;
31 gpio-hog;
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| D | native_posix_64.overlay | 4 * SPDX-License-Identifier: Apache-2.0
7 #include <zephyr/dt-bindings/gpio/gpio.h>
11 output-high-gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
12 output-low-gpios = <&gpio0 2 GPIO_ACTIVE_HIGH>;
13 input-gpios = <&gpio0 3 GPIO_ACTIVE_HIGH>;
19 gpio-hog;
21 output-high;
25 gpio-hog;
27 output-low;
31 gpio-hog;
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| D | nrf52840dk_nrf52840.overlay | 4 * SPDX-License-Identifier: Apache-2.0
7 #include <zephyr/dt-bindings/gpio/gpio.h>
11 output-high-gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
12 output-low-gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>;
13 input-gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
19 gpio-hog;
21 output-high;
25 gpio-hog;
27 output-low;
31 gpio-hog;
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| D | s32z270dc2_rtu0_r52.overlay | 4 * SPDX-License-Identifier: Apache-2.0
7 #include <zephyr/dt-bindings/gpio/gpio.h>
11 output-high-gpios = <&gpioa 0 GPIO_ACTIVE_LOW>;
12 output-low-gpios = <&gpioa 2 GPIO_ACTIVE_HIGH>;
13 input-gpios = <&gpioa 1 GPIO_ACTIVE_HIGH>;
21 gpio-hog;
23 output-high;
27 gpio-hog;
33 gpio-hog;
35 output-low;
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| D | s32z270dc2_rtu1_r52.overlay | 4 * SPDX-License-Identifier: Apache-2.0
7 #include <zephyr/dt-bindings/gpio/gpio.h>
11 output-high-gpios = <&gpioa 0 GPIO_ACTIVE_LOW>;
12 output-low-gpios = <&gpioa 2 GPIO_ACTIVE_HIGH>;
13 input-gpios = <&gpioa 1 GPIO_ACTIVE_HIGH>;
21 gpio-hog;
23 output-high;
27 gpio-hog;
33 gpio-hog;
35 output-low;
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| D | nrf52_bsim.overlay | 4 * SPDX-License-Identifier: Apache-2.0
7 #include <zephyr/dt-bindings/gpio/gpio.h>
11 output-high-gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
12 output-low-gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>;
13 input-gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
19 gpio-hog;
21 output-high;
25 gpio-hog;
27 output-low;
31 gpio-hog;
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| D | frdm_k64f.overlay | 4 * SPDX-License-Identifier: Apache-2.0
7 #include <zephyr/dt-bindings/gpio/gpio.h>
11 output-high-gpios = <&gpioc 5 GPIO_ACTIVE_LOW>;
12 output-low-gpios = <&gpiob 20 GPIO_ACTIVE_HIGH>;
13 input-gpios = <&gpioc 7 GPIO_ACTIVE_HIGH>;
19 gpio-hog;
21 output-high;
25 gpio-hog;
33 gpio-hog;
35 output-low;
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| D | nucleo_g474re.overlay | 4 * SPDX-License-Identifier: Apache-2.0
7 #include <zephyr/dt-bindings/gpio/gpio.h>
11 output-high-gpios = <&gpioc 2 GPIO_ACTIVE_LOW>;
12 output-low-gpios = <&gpiof 1 GPIO_ACTIVE_HIGH>;
13 input-gpios = <&gpioc 3 GPIO_ACTIVE_HIGH>;
19 gpio-hog;
21 output-high;
25 gpio-hog;
33 gpio-hog;
35 output-low;
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| /Zephyr-Core-3.5.0/boards/arm/mec172xevb_assy6906/ |
| D | mec172xevb_assy6906.dts | 4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
10 #include <microchip/mec172x/mec172xnsz-pinctrl.dtsi>
26 i2c-0 = &i2c_smb_0;
29 pwm-0 = &pwm0;
34 compatible = "gpio-leds";
53 clock-frequency = <96000000>;
81 current-speed = <115200>;
82 pinctrl-0 = <&uart1_tx_gpio170 &uart1_rx_gpio171>;
83 pinctrl-names = "default";
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| /Zephyr-Core-3.5.0/boards/xtensa/esp_wrover_kit/ |
| D | esp_wrover_kit-pinctrl.dtsi | 4 * SPDX-License-Identifier: Apache-2.0
7 #include <zephyr/dt-bindings/pinctrl/esp-pinctrl-common.h>
8 #include <dt-bindings/pinctrl/esp32-pinctrl.h>
9 #include <zephyr/dt-bindings/pinctrl/esp32-gpio-sigmap.h>
16 output-high;
20 bias-pull-up;
32 output-low;
44 output-low;
52 bias-pull-up;
53 drive-open-drain;
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