Home
last modified time | relevance | path

Searched +full:num +full:- +full:irqs (Results 1 – 8 of 8) sorted by relevance

/Zephyr-Core-3.5.0/dts/bindings/interrupt-controller/
Dsnps,designware-intc.yaml3 compatible: "snps,designware-intc"
5 include: [interrupt-controller.yaml, base.yaml]
14 "#interrupt-cells":
17 num-irqs:
22 interrupt-cells:
23 - irq
24 - sense
25 - priority
Dintel,ace-intc.yaml3 compatible: "intel,ace-intc"
5 include: [interrupt-controller.yaml, base.yaml]
14 "#interrupt-cells":
17 num-irqs:
22 interrupt-cells:
23 - irq
24 - sense
25 - priority
/Zephyr-Core-3.5.0/drivers/interrupt_controller/
DKconfig.multilevel5 # SPDX-License-Identifier: Apache-2.0
8 bool "Multi-level interrupt support"
30 int "Max IRQs per interrupt aggregator"
39 bool "Second-level interrupt support"
72 prev-level-num = 1
73 cur-level-num = 2
74 cur-level = 2ND
93 bool "Third-level interrupt support"
126 prev-level-num = 2
127 cur-level-num = 3
[all …]
/Zephyr-Core-3.5.0/arch/arm64/core/cortex_r/
Darm_mpu.c5 * SPDX-License-Identifier: Apache-2.0
13 #include <zephyr/linker/linker-defs.h>
20 #include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
29 "`zephyr,memory-region-mpu` was deprecated in favor of `zephyr,memory-attr`");
49 #define MPU_DYNAMIC_REGIONS_AREA_SIZE ((size_t)((uintptr_t)&__kernel_ram_end - \
58 * Armv8, for Armv8-R AArch64 architecture profile, G1.3.7
124 * Configure the cache-ability attributes for all the
129 /* Device region(s): Attribute-0 in mpu_init()
130 * Flash region(s): Attribute-1 in mpu_init()
131 * SRAM region(s): Attribute-2 in mpu_init()
[all …]
/Zephyr-Core-3.5.0/tests/kernel/mem_protect/demand_paging/src/
Dmain.c4 * SPDX-License-Identifier: Apache-2.0
14 #define EXTRA_PAGES (CONFIG_BACKING_STORE_RAM_PAGES - 1)
68 printk("Caught system error -- reason %d\n", reason); in k_sys_fatal_error_handler()
101 printk(" - Total: %lu\n", stats->pagefaults.cnt); in print_paging_stats()
102 printk(" - IRQ locked: %lu\n", stats->pagefaults.irq_locked); in print_paging_stats()
103 printk(" - IRQ unlocked: %lu\n", stats->pagefaults.irq_unlocked); in print_paging_stats()
105 printk(" - in ISR: %lu\n", stats->pagefaults.in_isr); in print_paging_stats()
109 printk(" - Total pages evicted: %lu\n", in print_paging_stats()
110 stats->eviction.clean + stats->eviction.dirty); in print_paging_stats()
111 printk(" - Clean pages evicted: %lu\n", in print_paging_stats()
[all …]
/Zephyr-Core-3.5.0/dts/xtensa/intel/
Dintel_adsp_ace20_lnl.dtsi4 * SPDX-License-Identifier: Apache-2.0
12 #address-cells = <1>;
13 #size-cells = <0>;
17 compatible = "cdns,tensilica-xtensa-lx7";
19 cpu-power-states = <&d0i3 &d3>;
20 i-cache-line-size = <64>;
21 d-cache-line-size = <64>;
26 compatible = "cdns,tensilica-xtensa-lx7";
28 cpu-power-states = <&d0i3 &d3>;
33 compatible = "cdns,tensilica-xtensa-lx7";
[all …]
Dintel_adsp_ace15_mtpm.dtsi4 * SPDX-License-Identifier: Apache-2.0
12 #address-cells = <1>;
13 #size-cells = <0>;
17 compatible = "cdns,tensilica-xtensa-lx7";
19 cpu-power-states = <&d0i3 &d3>;
20 i-cache-line-size = <64>;
21 d-cache-line-size = <64>;
26 compatible = "cdns,tensilica-xtensa-lx7";
28 cpu-power-states = <&d0i3 &d3>;
33 compatible = "cdns,tensilica-xtensa-lx7";
[all …]
/Zephyr-Core-3.5.0/doc/hardware/arch/
Darm_cortex_m.rst3 Arm Cortex-M Developer Guide
9 This page contains detailed information about the status of the Arm Cortex-M
11 developing Zephyr applications for Arm Cortex-M-based platforms.
17 Arm Cortex-M implementation variants.
20 …---------------------------------+-----------------------------------+-----------------+---------+…
22 …---------------------------------+-----------------------------------+-----------------+---------+…
23 … | Arm v6-M | Arm v7-M | Arm v8-M …
24 …---------------------------------+-----------------------------------+-----------------+---------+…
26 …---------------------------------+-----------------------------------+-----------------+---------+…
28 …---------------------------------+-----------------------------------+-----------------+---------+…
[all …]