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/hal_telink-3.6.0-3.5.0-3.4.0/tlsr9/ble/common/
Dutility.h177 #define MYFIFO_INIT(name,size,n) u8 name##_b[size * n]={0};my_fifo_t name = {size,n,0,0, name##_… argument
179 …efine MYFIFO_INIT_IRAM(name,size,n) u8 name##_b[size * n]__attribute__((aligned(4)))/*={0}*/;my_… argument
/hal_telink-3.6.0-3.5.0-3.4.0/zephyr/
Dmodule.yml1 name: hal_telink
/hal_telink-3.6.0-3.5.0-3.4.0/tlsr9/ble/stack/ble/
Dble_common.h291 DT_SHORTENED_LOCAL_NAME = 0x08, // Shortened Local Name
292 DT_COMPLETE_LOCAL_NAME = 0x09, // Complete Local Name
/hal_telink-3.6.0-3.5.0-3.4.0/tlsr9/ble/stack/ble/hci/
Dhci_const.h26 #define HCI_MANUFACTURER_NAME VENDOR_ID //Manufacturer Name of the BR/EDR Controller