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/hal_silabs-3.6.0/zephyr/
Dmodule.yml5 - path: gecko/protocol/bluetooth/bgstack/ll/lib/libbluetooth_controller_efr32xg22_gcc_release.a
9 license-path: zephyr/blobs/license/MSLA.txt
12 doc-url: https://github.com/SiliconLabs/gecko_sdk
13 - path: gecko/protocol/bluetooth/bgstack/ll/lib/libbluetooth_controller_efr32xg24_gcc_release.a
17 license-path: zephyr/blobs/license/MSLA.txt
20 doc-url: https://github.com/SiliconLabs/gecko_sdk
21 - path: gecko/protocol/bluetooth/bgstack/ll/lib/libbluetooth_controller_efr32xg27_gcc_release.a
25 license-path: zephyr/blobs/license/MSLA.txt
28 doc-url: https://github.com/SiliconLabs/gecko_sdk
31 - path: gecko/protocol/bluetooth/bgcommon/lib/libbgcommon_efr32xg22_gcc_release.a
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/hal_silabs-3.6.0/gecko/platform/radio/rail_lib/chip/efr32/efr32xg1x/
Drail_chip_specific.h3 * @brief This file contains the type definitions for efr32xg1x chip-specific
6 * # License
10 * SPDX-License-Identifier: Zlib
14 * This software is provided 'as-is', without any express or implied
63 * @brief EFR32xG1-specific initialization data types
68 * A placeholder for a chip-specific RAIL handle. Using NULL as a RAIL handle is
69 * not recommended. As a result, another value that can't be de-referenced is used.
109 * on this platform for this radio. This compile-time size may be slightly
110 * larger than what \ref RAIL_GetStateBufferSize() determines at run-time.
200 // Self-referencing defines minimize compiler complaints when using RAIL_ENUM
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/hal_silabs-3.6.0/gecko/platform/radio/rail_lib/chip/efr32/efr32xg2x/
Drail_chip_specific.h6 * # License
10 * SPDX-License-Identifier: Zlib
14 * This software is provided 'as-is', without any express or implied
66 * @brief EFR32xG2-specific initialization data types
71 * A placeholder for a chip-specific RAIL handle. Using NULL as a RAIL handle is
72 * not recommended. As a result, another value that can't be de-referenced is used.
134 * on this platform for this radio. This compile-time size may be slightly
135 * larger than what \ref RAIL_GetStateBufferSize() determines at run-time.
229 RAIL_RAC_STATE_POR, /**< Radio power-on-reset state. */ in RAIL_ENUM()
234 // Self-referencing defines minimize compiler complaints when using RAIL_ENUM
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/hal_silabs-3.6.0/gecko/emlib/inc/
Dem_vdac.h5 * # License
9 * SPDX-License-Identifier: Zlib
13 * This software is provided 'as-is', without any express or implied
46 * @addtogroup vdac VDAC - Voltage DAC
51 * Labs' 32-bit MCUs and SoCs. VDAC converts digital values to analog
52 * signals at up to 500 ksps with 12-bit accuracy. VDAC is designed for
77 * @note The output stage of a VDAC channel consists of an on-chip operational
162 /** Selects between main and alternate output path calibration values. */
169 /** Warm-up mode, keep VDAC on (in idle) - or shutdown between conversions.*/
197 true, /* Use main output path calibration values. */ \
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Dem_opamp.h5 * # License
9 * SPDX-License-Identifier: Zlib
13 * This software is provided 'as-is', without any express or implied
99 opaNegSelUnityGain = DAC_OPA0MUX_NEGSEL_UG, /**< Unity gain feedback path. */
168 opaNegSelUnityGain = VDAC_OPA_MUX_NEGSEL_UG, /**< Unity gain feedback path. */
499 bool hcmDisable; /**< Disable input rail-to-rail capability. */
516 bool hcmDisable; /**< Disable input rail-to-rail capability. */
521 bool defaultOffsetP; /**< Use factory calibrated opamp non-inverting
523 uint32_t offsetP; /**< Opamp non-inverting input offset value when
539 _DAC_BIASPROG_HALFBIAS_DEFAULT, /* Default half-bias setting. */ \
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/hal_silabs-3.6.0/gecko/common/inc/
Dsl_assert.h5 * # License
9 * SPDX-License-Identifier: Zlib
13 * This software is provided 'as-is', without any express or implied
47 * @addtogroup assert ASSERT - Assert
78 * @param[in] file - path and file name of the assert.
80 * @param[in] line - line number, in the file.
/hal_silabs-3.6.0/gecko/
DREADME6 https://www.silabs.com/products/development-tools/software/simplicity-studio
37 https://www.silabs.com/products/development-tools/software/simplicity-studio
39 Maintained-by:
42 License:
50 * Install the 32-bit MCU SDK with the version you want to update to
51 * The installation directory is <Simplicity Studio Path>/developer/sdks/gecko_sdk_suite/<version>
74 …---------------------------------------------------+----------------------------------------------…
76 …---------------------------------------------------+----------------------------------------------…
77 … | modules/hal/silabs/gecko/Device | Contains the device-specific files in Sil…
79 …---------------------------------------------------+----------------------------------------------…
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/hal_silabs-3.6.0/gecko/platform/radio/rail_lib/common/
Drail_features.h6 * # License
10 * SPDX-License-Identifier: Zlib
14 * This software is provided 'as-is', without any express or implied
73 /// Backwards-compatible synonym of \ref RAIL_SUPPORTS_DUAL_BAND.
85 /// Backwards-compatible synonym of \ref RAIL_SUPPORTS_2P4GHZ_BAND.
97 /// Backwards-compatible synonym of \ref RAIL_SUPPORTS_SUBGHZ_BAND.
138 /// Backwards-compatible synonym of \ref RAIL_SUPPORTS_ALTERNATE_TX_POWER.
149 /// Backwards-compatible synonym of \ref RAIL_SUPPORTS_ANTENNA_DIVERSITY.
152 /// Boolean to indicate whether the selected chip supports path diversity.
166 /// Backwards-compatible synonym of \ref RAIL_SUPPORTS_CHANNEL_HOPPING.
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Drail.h6 * # License
10 * SPDX-License-Identifier: Zlib
14 * This software is provided 'as-is', without any express or implied
37 // Get the RAIL-specific structures and types
53 * @defgroup Chip_Specific Chip-Specific
54 * @brief Chip-Specific RAIL APIs, types, and information
58 * @defgroup Protocol_Specific Protocol-specific
59 * @brief Protocol-Specific RAIL APIs
90 * RAIL internally provides one statically-allocated RAM state buffer
103 * Get the run-time size of the radio's state buffer.
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/hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFR32MG12P/Include/
Defr32mg12p_devinfo.h5 * # License
9 * SPDX-License-Identifier: Zlib
13 * This software is provided 'as-is', without any express or implied
48 __IM uint32_t CAL; /**< CRC of DI-page and calibration temperature */
102 __IM uint32_t DCDCLNVCTRL0; /**< DCDC Low-noise VREF Trim Register 0 */
103 __IM uint32_t DCDCLPVCTRL0; /**< DCDC Low-power VREF Trim Register 0 */
104 __IM uint32_t DCDCLPVCTRL1; /**< DCDC Low-power VREF Trim Register 1 */
105 __IM uint32_t DCDCLPVCTRL2; /**< DCDC Low-power VREF Trim Register 2 */
106 __IM uint32_t DCDCLPVCTRL3; /**< DCDC Low-power VREF Trim Register 3 */
109 __IM uint32_t VDAC0MAINCAL; /**< VDAC0 Cals for Main Path */
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/hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFR32BG13P/Include/
Defr32bg13p_devinfo.h5 * # License
9 * SPDX-License-Identifier: Zlib
13 * This software is provided 'as-is', without any express or implied
48 __IM uint32_t CAL; /**< CRC of DI-page and calibration temperature */
102 __IM uint32_t DCDCLNVCTRL0; /**< DCDC Low-noise VREF Trim Register 0 */
103 __IM uint32_t DCDCLPVCTRL0; /**< DCDC Low-power VREF Trim Register 0 */
104 __IM uint32_t DCDCLPVCTRL1; /**< DCDC Low-power VREF Trim Register 1 */
105 __IM uint32_t DCDCLPVCTRL2; /**< DCDC Low-power VREF Trim Register 2 */
106 __IM uint32_t DCDCLPVCTRL3; /**< DCDC Low-power VREF Trim Register 3 */
109 __IM uint32_t VDAC0MAINCAL; /**< VDAC0 Cals for Main Path */
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/hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFR32FG13P/Include/
Defr32fg13p_devinfo.h5 * # License
9 * SPDX-License-Identifier: Zlib
13 * This software is provided 'as-is', without any express or implied
48 __IM uint32_t CAL; /**< CRC of DI-page and calibration temperature */
102 __IM uint32_t DCDCLNVCTRL0; /**< DCDC Low-noise VREF Trim Register 0 */
103 __IM uint32_t DCDCLPVCTRL0; /**< DCDC Low-power VREF Trim Register 0 */
104 __IM uint32_t DCDCLPVCTRL1; /**< DCDC Low-power VREF Trim Register 1 */
105 __IM uint32_t DCDCLPVCTRL2; /**< DCDC Low-power VREF Trim Register 2 */
106 __IM uint32_t DCDCLPVCTRL3; /**< DCDC Low-power VREF Trim Register 3 */
109 __IM uint32_t VDAC0MAINCAL; /**< VDAC0 Cals for Main Path */
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/hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFM32PG12B/Include/
Defm32pg12b_devinfo.h5 * # License
9 * SPDX-License-Identifier: Zlib
13 * This software is provided 'as-is', without any express or implied
48 __IM uint32_t CAL; /**< CRC of DI-page and calibration temperature */
98 __IM uint32_t DCDCLNVCTRL0; /**< DCDC Low-noise VREF Trim Register 0 */
99 __IM uint32_t DCDCLPVCTRL0; /**< DCDC Low-power VREF Trim Register 0 */
100 __IM uint32_t DCDCLPVCTRL1; /**< DCDC Low-power VREF Trim Register 1 */
101 __IM uint32_t DCDCLPVCTRL2; /**< DCDC Low-power VREF Trim Register 2 */
102 __IM uint32_t DCDCLPVCTRL3; /**< DCDC Low-power VREF Trim Register 3 */
105 __IM uint32_t VDAC0MAINCAL; /**< VDAC0 Cals for Main Path */
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/hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFM32JG12B/Include/
Defm32jg12b_devinfo.h5 * # License
9 * SPDX-License-Identifier: Zlib
13 * This software is provided 'as-is', without any express or implied
48 __IM uint32_t CAL; /**< CRC of DI-page and calibration temperature */
98 __IM uint32_t DCDCLNVCTRL0; /**< DCDC Low-noise VREF Trim Register 0 */
99 __IM uint32_t DCDCLPVCTRL0; /**< DCDC Low-power VREF Trim Register 0 */
100 __IM uint32_t DCDCLPVCTRL1; /**< DCDC Low-power VREF Trim Register 1 */
101 __IM uint32_t DCDCLPVCTRL2; /**< DCDC Low-power VREF Trim Register 2 */
102 __IM uint32_t DCDCLPVCTRL3; /**< DCDC Low-power VREF Trim Register 3 */
105 __IM uint32_t VDAC0MAINCAL; /**< VDAC0 Cals for Main Path */
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/hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFM32GG12B/Include/
Defm32gg12b_devinfo.h5 * # License
9 * SPDX-License-Identifier: Zlib
13 * This software is provided 'as-is', without any express or implied
48 __IM uint32_t CAL; /**< CRC of DI-page and calibration temperature */
111 __IM uint32_t DCDCLNVCTRL0; /**< DCDC Low-noise VREF Trim Register 0 */
112 __IM uint32_t DCDCLPVCTRL0; /**< DCDC Low-power VREF Trim Register 0 */
113 __IM uint32_t DCDCLPVCTRL1; /**< DCDC Low-power VREF Trim Register 1 */
114 __IM uint32_t DCDCLPVCTRL2; /**< DCDC Low-power VREF Trim Register 2 */
115 __IM uint32_t DCDCLPVCTRL3; /**< DCDC Low-power VREF Trim Register 3 */
118 __IM uint32_t VDAC0MAINCAL; /**< VDAC0 Cals for Main Path */
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Defm32gg12b_emu.h5 * # License
9 * SPDX-License-Identifier: Zlib
13 * This software is provided 'as-is', without any express or implied
1416 … (0x1UL << 31) /**< Disable MAIN-BU Comparator */
1435 … /**< Enable the Regulator Current Monitor for Selected Current Path to Either VREGI or …
Defm32gg12b390f1024gl112.h3 * @brief CMSIS Cortex-M Peripheral Access Layer Header File
6 * # License
10 * SPDX-License-Identifier: Zlib
14 * This software is provided 'as-is', without any express or implied
57 /****** Cortex-M4 Processor Exceptions Numbers *******************************************/
58 NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt */
59 HardFault_IRQn = -13, /*!< 3 Cortex-M4 Hard Fault Interrupt */
60 MemoryManagement_IRQn = -12, /*!< 4 Cortex-M4 Memory Management Interrupt */
61 BusFault_IRQn = -11, /*!< 5 Cortex-M4 Bus Fault Interrupt */
62 UsageFault_IRQn = -10, /*!< 6 Cortex-M4 Usage Fault Interrupt */
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Defm32gg12b390f512gl112.h3 * @brief CMSIS Cortex-M Peripheral Access Layer Header File
6 * # License
10 * SPDX-License-Identifier: Zlib
14 * This software is provided 'as-is', without any express or implied
57 /****** Cortex-M4 Processor Exceptions Numbers *******************************************/
58 NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt */
59 HardFault_IRQn = -13, /*!< 3 Cortex-M4 Hard Fault Interrupt */
60 MemoryManagement_IRQn = -12, /*!< 4 Cortex-M4 Memory Management Interrupt */
61 BusFault_IRQn = -11, /*!< 5 Cortex-M4 Bus Fault Interrupt */
62 UsageFault_IRQn = -10, /*!< 6 Cortex-M4 Usage Fault Interrupt */
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Defm32gg12b530f512il120.h3 * @brief CMSIS Cortex-M Peripheral Access Layer Header File
6 * # License
10 * SPDX-License-Identifier: Zlib
14 * This software is provided 'as-is', without any express or implied
57 /****** Cortex-M4 Processor Exceptions Numbers *******************************************/
58 NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt */
59 HardFault_IRQn = -13, /*!< 3 Cortex-M4 Hard Fault Interrupt */
60 MemoryManagement_IRQn = -12, /*!< 4 Cortex-M4 Memory Management Interrupt */
61 BusFault_IRQn = -11, /*!< 5 Cortex-M4 Bus Fault Interrupt */
62 UsageFault_IRQn = -10, /*!< 6 Cortex-M4 Usage Fault Interrupt */
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Defm32gg12b530f512im64.h3 * @brief CMSIS Cortex-M Peripheral Access Layer Header File
6 * # License
10 * SPDX-License-Identifier: Zlib
14 * This software is provided 'as-is', without any express or implied
57 /****** Cortex-M4 Processor Exceptions Numbers *******************************************/
58 NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt */
59 HardFault_IRQn = -13, /*!< 3 Cortex-M4 Hard Fault Interrupt */
60 MemoryManagement_IRQn = -12, /*!< 4 Cortex-M4 Memory Management Interrupt */
61 BusFault_IRQn = -11, /*!< 5 Cortex-M4 Bus Fault Interrupt */
62 UsageFault_IRQn = -10, /*!< 6 Cortex-M4 Usage Fault Interrupt */
[all …]
Defm32gg12b530f512iq100.h3 * @brief CMSIS Cortex-M Peripheral Access Layer Header File
6 * # License
10 * SPDX-License-Identifier: Zlib
14 * This software is provided 'as-is', without any express or implied
57 /****** Cortex-M4 Processor Exceptions Numbers *******************************************/
58 NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt */
59 HardFault_IRQn = -13, /*!< 3 Cortex-M4 Hard Fault Interrupt */
60 MemoryManagement_IRQn = -12, /*!< 4 Cortex-M4 Memory Management Interrupt */
61 BusFault_IRQn = -11, /*!< 5 Cortex-M4 Bus Fault Interrupt */
62 UsageFault_IRQn = -10, /*!< 6 Cortex-M4 Usage Fault Interrupt */
[all …]
Defm32gg12b530f512iq64.h3 * @brief CMSIS Cortex-M Peripheral Access Layer Header File
6 * # License
10 * SPDX-License-Identifier: Zlib
14 * This software is provided 'as-is', without any express or implied
57 /****** Cortex-M4 Processor Exceptions Numbers *******************************************/
58 NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt */
59 HardFault_IRQn = -13, /*!< 3 Cortex-M4 Hard Fault Interrupt */
60 MemoryManagement_IRQn = -12, /*!< 4 Cortex-M4 Memory Management Interrupt */
61 BusFault_IRQn = -11, /*!< 5 Cortex-M4 Bus Fault Interrupt */
62 UsageFault_IRQn = -10, /*!< 6 Cortex-M4 Usage Fault Interrupt */
[all …]
/hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFM32GG11B/Include/
Defm32gg11b_devinfo.h5 * # License
9 * SPDX-License-Identifier: Zlib
13 * This software is provided 'as-is', without any express or implied
48 __IM uint32_t CAL; /**< CRC of DI-page and calibration temperature */
111 __IM uint32_t DCDCLNVCTRL0; /**< DCDC Low-noise VREF Trim Register 0 */
112 __IM uint32_t DCDCLPVCTRL0; /**< DCDC Low-power VREF Trim Register 0 */
113 __IM uint32_t DCDCLPVCTRL1; /**< DCDC Low-power VREF Trim Register 1 */
114 __IM uint32_t DCDCLPVCTRL2; /**< DCDC Low-power VREF Trim Register 2 */
115 __IM uint32_t DCDCLPVCTRL3; /**< DCDC Low-power VREF Trim Register 3 */
118 __IM uint32_t VDAC0MAINCAL; /**< VDAC0 Cals for Main Path */
[all …]
Defm32gg11b_emu.h5 * # License
9 * SPDX-License-Identifier: Zlib
13 * This software is provided 'as-is', without any express or implied
1432 … (0x1UL << 31) /**< Disable MAIN-BU Comparator */
1451 … /**< Enable the Regulator Current Monitor for Selected Current Path to Either VREGI or …
/hal_silabs-3.6.0/gecko/emlib/src/
Dem_cmu.c5 * # License
9 * SPDX-License-Identifier: Zlib
13 * This software is provided 'as-is', without any express or implied
50 * @addtogroup cmu CMU - Clock Management Unit
53 * This module contains functions for the CMU peripheral of Silicon Labs 32-bit
55 * multiplexers, pre-scalers, calibration modules and wait-states.
67 // Maximum allowed core frequency vs. wait-states on flash accesses.
72 // Maximum allowed core frequency vs. wait-states on sram accesses.
85 // Maximum allowed core frequency vs. wait-states and vscale on flash accesses.
105 #define VSCALE_DEFAULT (2 - (int)EMU_VScaleGet())
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