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/Zephyr-latest/doc/_extensions/zephyr/
Ddoxybridge.py61 """Mapping between Doxygen memberdef kind and Sphinx kinds"""
122 kind = KIND_D2S.get(memberdef.get_kind())
123 if not kind:
132 cache.setdefault(kind, {})[name] = id
148 for kind, data in members.items():
149 cache.setdefault(kind, {}).update(data)
162 kind = None
164 kind = "struct"
166 kind = "union"
168 kind = "group"
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/Zephyr-latest/samples/modules/tflite-micro/magic_wand/src/
Doutput_handler.cpp12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
19 void HandleOutput(int kind) in HandleOutput() argument
22 if (kind == 0) { in HandleOutput()
27 } else if (kind == 1) { in HandleOutput()
32 } else if (kind == 2) { in HandleOutput()
Doutput_handler.hpp12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
23 void HandleOutput(int kind);
Dgesture_predictor.hpp12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
Dassert.cpp12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
/Zephyr-latest/tests/net/lib/lwm2m/interop/pytest/
Dleshan.py105 kind = 'singleResource'
107 kind = 'resourceInstance'
109 return self.put(f'/clients/{endpoint}/{path}', self._define_resource(rid, value, kind))
177 "kind": "instance",
183 kind = 'multiResource'
185 kind = 'singleResource'
186 data['resources'].append(cls._define_resource(key, value, kind))
190 def _define_resource(cls, rid, value, kind='singleResource'): argument
192 if kind in ('singleResource', 'resourceInstance'):
195 "kind": kind,
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/Zephyr-latest/soc/altr/zephyr_nios2f/cpu/
Dghrd_10m50da.qsys334 kind="altera_16550_uart"
348 <module name="altpll_0" kind="altpll" version="17.0" enabled="1">
515 <module name="clk_0" kind="clock_source" version="17.0" enabled="1">
523 kind="altera_generic_quad_spi_controller2"
535 <module name="i2c_0" kind="altera_avalon_i2c" version="17.0" enabled="1">
542 kind="altera_avalon_jtag_uart"
559 <module name="led" kind="altera_avalon_pio" version="17.0" enabled="1">
573 <module name="msgdma_0" kind="altera_msgdma" version="17.0" enabled="1">
618 kind="altera_nios2_gen2"
800 kind="altera_onchip_flash"
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/Zephyr-latest/scripts/build/
Dgen_relocate_app.py75 Return the kind of section that includes a section with the given name.
302 Region names can be like RAM_RODATA_TEXT or just RAM; a section kind may
312 for kind in SectionKind:
313 specifier = f"_{kind}"
315 out.add(kind)
336 kind: SectionKind,
351 if full_list_of_sections[kind]:
354 tmp = print_linker_sections(full_list_of_sections[kind])
355 if region_is_default_ram(memory_type) and kind in (SectionKind.DATA, SectionKind.BSS):
358 if not region_is_default_ram(memory_type) and kind is SectionKind.RODATA:
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/Zephyr-latest/arch/nios2/core/
Dcpu_idle.c14 * caller. This CPU does not have any kind of power saving instruction. in arch_cpu_idle()
24 * kind of power saving instruction. in arch_cpu_atomic_idle()
/Zephyr-latest/tests/drivers/dma/chan_blen_transfer/src/
Dtest_buffers.c11 __aligned(32) char tx_data[TEST_BUF_SIZE] = "It is harder to be kind than to be wise........";
/Zephyr-latest/boards/snps/nsim/arc_v/support/
Drmx100.props5 nsim_mem-dev=uart0,kind=16550,base=0x10000000,irq=24
/Zephyr-latest/boards/telink/tlsr9518adk80d/
DKconfig.defconfig18 # maximum image writer buffer size for such kind of boards.
/Zephyr-latest/doc/kernel/usermode/
Dmpu_stack_objects.rst23 to memory. Memory protection units can provide this kind of support.
54 start and end addresses require 32 byte alignment. An example of this kind of
/Zephyr-latest/boards/snps/nsim/arc_classic/support/
Dmdb_hs_flash_xip.args37 -prop=nsim_mem-dev=uart0,kind=dwuart,base=0xf0000000,irq=24
Dmdb_hs_sram.args37 -prop=nsim_mem-dev=uart0,kind=dwuart,base=0xf0000000,irq=24
Dnsim_hs_flash_xip.props41 nsim_mem-dev=uart0,kind=dwuart,base=0xf0000000,irq=24
Dnsim_hs_sram.props41 nsim_mem-dev=uart0,kind=dwuart,base=0xf0000000,irq=24
Dmdb_hs.args44 -prop=nsim_mem-dev=uart0,kind=dwuart,base=0xf0000000,irq=24
Dmdb_hs_mpuv6.args44 -prop=nsim_mem-dev=uart0,kind=dwuart,base=0xf0000000,irq=24
Dnsim_hs.props48 nsim_mem-dev=uart0,kind=dwuart,base=0xf0000000,irq=24
Dnsim_hs_mpuv6.props48 nsim_mem-dev=uart0,kind=dwuart,base=0xf0000000,irq=24
/Zephyr-latest/samples/modules/tflite-micro/hello_world/src/
Dassert.cpp12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
Dconstants.c12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
Doutput_handler.cpp12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
/Zephyr-latest/boards/native/native_sim/
Dboard_soc.h17 * to define that kind of SOC related snippets

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