Searched +full:inter +full:- +full:domain (Results 1 – 16 of 16) sorted by relevance
/Zephyr-latest/dts/bindings/mbox/ |
D | nordic,nrf-vevif-task-tx.yaml | 2 # SPDX-License-Identifier: Apache-2.0 5 Nordic VEVIF (VPR Event Interface) - TASK TX MODE 7 VEVIF is an event interface for VPR, allowing connection to the domain's DPPI 10 VEVIF provides support for inter-domain software signaling. It implements a set of tasks 19 compatible = "nordic,nrf-vevif-task-tx"; 21 #mbox-cells = <1>; 23 nordic,tasks-mask = <0xfffffff0>; 27 compatible: "nordic,nrf-vevif-task-tx" 29 include: [base.yaml, mailbox-controller.yaml] 37 nordic,tasks-mask: [all …]
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D | nordic,nrf-bellboard-tx.yaml | 2 # SPDX-License-Identifier: Apache-2.0 7 BELLBOARD provides support for inter-domain software signaling. It implements 15 compatible = "nordic,nrf-bellboard-tx"; 17 #mbox-cells = <1>; 20 compatible: "nordic,nrf-bellboard-tx" 22 include: "nordic,nrf-bellboard-common.yaml"
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D | nordic,nrf-vevif-task-rx.yaml | 2 # SPDX-License-Identifier: Apache-2.0 5 Nordic VEVIF (VPR Event Interface) - TASK RX MODE 7 VEVIF is an event interface for VPR, allowing connection to the domain's DPPI 10 VEVIF provides support for inter-domain software signaling. It implements a set of tasks 19 compatible = "nordic,nrf-vevif-task-rx"; 24 #mbox-cells = <1>; 26 nordic,tasks-mask = <0xfffffff0>; 30 compatible: "nordic,nrf-vevif-task-rx" 32 include: [base.yaml, mailbox-controller.yaml] 40 nordic,tasks-mask: [all …]
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D | nordic,nrf-vevif-event-tx.yaml | 2 # SPDX-License-Identifier: Apache-2.0 5 Nordic VEVIF (VPR Event Interface) - EVENT TX MODE 7 VEVIF provides support for inter-domain software signaling. It implements a set of events 17 compatible = "nordic,nrf-vevif-event-tx"; 18 #mbox-cells = <1>; 20 nordic,events-mask = <0x00008000>; 24 compatible: "nordic,nrf-vevif-event-tx" 26 include: [base.yaml, mailbox-controller.yaml] 34 nordic,events-mask: 39 mbox-cells: [all …]
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D | nordic,nrf-vevif-event-rx.yaml | 2 # SPDX-License-Identifier: Apache-2.0 5 Nordic VEVIF (VPR Event Interface) - EVENT RX MODE 7 VEVIF provides support for inter-domain software signaling. It implements a set of events 17 compatible = "nordic,nrf-vevif-event-rx"; 20 #mbox-cells = <1>; 22 nordic,events-mask = <0x00008000>; 26 compatible: "nordic,nrf-vevif-event-rx" 28 include: [base.yaml, mailbox-controller.yaml] 36 nordic,events-mask: 47 mbox-cells: [all …]
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D | nordic,nrf-bellboard-rx.yaml | 2 # SPDX-License-Identifier: Apache-2.0 7 BELLBOARD provides support for inter-domain software signaling. It implements 15 compatible = "nordic,nrf-bellboard-rx"; 19 interrupt-names = "irq2", "irq3"; 20 nordic,interrupt-mapping = <0x0000000f 2>, <0x000000f0 3>; 21 #mbox-cells = <1>; 24 compatible: "nordic,nrf-bellboard-rx" 26 include: "nordic,nrf-bellboard-common.yaml" 32 interrupt-names: 35 nordic,interrupt-mapping:
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/Zephyr-latest/doc/services/ipc/ipc_service/backends/ |
D | ipc_service_icmsg.rst | 6 The inter core messaging backend (ICMsg) is a lighter alternative to the 27 * If at least one of the cores uses data cache on shared memory, set the ``dcache-alignment`` value. 28 …This must be the largest value of the invalidation or the write-back size for both sides of the co… 30 * Define two memory regions and assign them to ``tx-region`` and ``rx-region`` 35 domain (or CPU) that data has been written. Ensure that the other domain 40 Make sure that you set correct value of the ``dcache-alignment``. 46 .. code-block:: devicetree 48 reserved-memory { 60 compatible = "zephyr,ipc-icmsg"; 61 dcache-alignment = <32>; [all …]
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/Zephyr-latest/include/zephyr/xen/public/ |
D | xen.h | 1 /* SPDX-License-Identifier: MIT */ 33 #include "arch-arm.h" 157 * For the hardware domain, all the characters in the buffer will 171 /* Domain ids >= DOMID_FIRST_RESERVED cannot be used for ordinary domains. */ 178 * DOMID_IO is used to restrict page-table updates to mapping I/O memory. 179 * Although no Foreign Domain need be specified to map I/O pages, DOMID_IO 182 * aren't adjusted on the I/O-mapping code path). 185 * HYPERVISOR_mmu_update() context it can be specified by any calling domain, 194 * - HYPERVISOR_mmu_update()'s, HYPERVISOR_mmuext_op()'s, or 196 * - with XENMAPSPACE_gmfn_foreign, [all …]
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/Zephyr-latest/modules/openthread/ |
D | Kconfig.thread | 4 # SPDX-License-Identifier: Apache-2.0 48 bool "FTD - Full Thread Device" 50 bool "MTD - Minimal Thread Device" 54 bool "SED - Sleepy End Device" 73 string "The platform-specific string to insert into the OpenThread version string" 88 Defines how many microseconds ahead should MAC deliver a CSL frame to the sub-MAC layer. 150 default -65 187 default -100 193 range -40 20 if NRF_802154_RADIO_DRIVER 222 Set the IPv4 CIDR (Classless Inter-Domain Routing) used by NAT64 [all …]
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/Zephyr-latest/arch/x86/include/ |
D | x86_mmu.h | 2 * Copyright (c) 2011-2014 Wind River Systems, Inc. 3 * Copyright (c) 2017-2020 Intel Corporation 5 * SPDX-License-Identifier: Apache-2.0 8 * None of these are application-facing, use only if you know what you are 38 #define MMU_RW BITL(1) /** Read-Write */ 39 #define MMU_US BITL(2) /** User-Supervisor */ 61 #define PF_P BIT(0) /* 0 Non-present page 1 Protection violation */ 66 #define PF_PK BIT(5) /* 1 protection-key violation */ 67 #define PF_SGX BIT(15) /* 1 SGX-specific access control requirements */ 103 * . - not present [all …]
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/Zephyr-latest/doc/releases/ |
D | release-notes-1.10.rst | 12 * Initial alpha-quality thread-level memory protection on x86, userspace and memory 27 * Initial alpha-quality thread-level memory protection on x86, userspace and memory 35 * Memory domain APIs for fine-tuning memory region permissions 38 * Add the following application-facing memory domain APIs: 40 * k_mem_domain_init() - to initialize a memory domain 41 * k_mem_domain_destroy() - to destroy a memory domain 42 * k_mem_domain_add_partition() - to add a partition into a domain 43 * k_mem_domain_remove_partition() - to remove a partition from a domain 44 * k_mem_domain_add_thread() - to add a thread into a domain 45 * k_mem_domain_remove_thread() - to remove a thread from a domain [all …]
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D | release-notes-2.5.rst | 27 * CVE-2021-3323: Under embargo until 2021-04-14 28 * CVE-2021-3321: Under embargo until 2021-04-14 29 * CVE-2021-3320: Under embargo until 2021-04-14 39 <https://github.com/zephyrproject-rtos/zephyr/issues?q=is%3Aissue+is%3Aopen+label%3Abug>`_. 56 * Changed vcnl4040 dts binding default for property 'proximity-trigger'. 63 * The :c:func:`mqtt_keepalive_time_left` function now returns -1 if keep alive 67 timeout usage must use the new-style k_timeout_t type and not the 87 GPIO-only regulators a devicetree property ``supply-gpios`` is defined as a 101 * ARM Musca-A board and SoC support deprecated and planned to be removed in 2.6.0. 146 sys_heap/k_heaps. Note that the new-style heap is a general [all …]
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D | release-notes-3.1.rst | 61 * Split CAN classic and CAN-FD APIs: 90 was moved from Kconfig to :ref:`devicetree <dt-guide>`. 91 See the :dtcompatible:`st,stm32f1-pinctrl` devicetree binding for more information. 182 * MIPI-DSI 184 * Added a :ref:`MIPI-DSI api <mipi_dsi_api>`. This is an experimental API, 196 * Added support for enabling/disabling CAN-FD mode at runtime using :c:macro:`CAN_MODE_FD`. 220 * Added support for Provisioners over PB-GATT 231 * Implemented ISO-AL TX unframed fragmentation 232 * Added support for back-to-back receiving of PDUs on nRF5x platforms 249 newly created informational-only callback struct :c:struct:`bt_conn_auth_info_cb`. [all …]
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/Zephyr-latest/include/zephyr/net/ |
D | net_ip.h | 10 * SPDX-License-Identifier: Apache-2.0 50 #define PF_LOCAL 6 /**< Inter-process communication */ 51 #define PF_UNIX PF_LOCAL /**< Inter-process communication */ 60 #define AF_LOCAL PF_LOCAL /**< Inter-process communication */ 61 #define AF_UNIX PF_UNIX /**< Inter-process communication */ 65 IPPROTO_IP = 0, /**< IP protocol (pseudo-val for setsockopt() */ 94 /** @brief Convert 16-bit value from network to host byte order. 102 /** @brief Convert 32-bit value from network to host byte order. 110 /** @brief Convert 64-bit value from network to host byte order. 118 /** @brief Convert 16-bit value from host to network byte order. [all …]
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/Zephyr-latest/subsys/llext/ |
D | llext_load.c | 5 * SPDX-License-Identifier: Apache-2.0 31 * - The input `struct llext` and fields in `struct loader` are zero-filled 34 * - If some function called by do_llext_load allocates memory, it does so by 36 * - do_llext_load() will clean up the memory allocated by the functions it 44 enum llext_mem mem_idx = ldr->sect_map[sh_ndx].mem_idx; in llext_loaded_sect_ptr() 50 return (const uint8_t *)ext->mem[mem_idx] + ldr->sect_map[sh_ndx].offset; in llext_loaded_sect_ptr() 69 ret = llext_read(ldr, &ldr->hdr, sizeof(ldr->hdr)); in llext_load_elf_data() 76 if (memcmp(ldr->hdr.e_ident, ELF_MAGIC, sizeof(ELF_MAGIC)) != 0) { in llext_load_elf_data() 77 LOG_HEXDUMP_ERR(ldr->hdr.e_ident, 16, "Invalid ELF, magic does not match"); in llext_load_elf_data() 78 return -ENOEXEC; in llext_load_elf_data() [all …]
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/Zephyr-latest/soc/nuvoton/npcx/common/reg/ |
D | reg_def.h | 4 * SPDX-License-Identifier: Apache-2.0 20 * must meet the alignment requirement of cortex-m4. 44 __ASSERT(reg == val, "16-bit reg access failed!"); \ 50 __ASSERT(reg == val, "32-bit reg access failed!"); \ 54 * Core Domain Clock Generator (CDCG) device registers 90 /* 0x102: High-Frequency Reference Divisor I */ 92 /* 0x104: High-Frequency Reference Divisor F */ 127 /* 0x008 - 0D: Power-Down Control 1 - 6 */ 130 /* 0x020 - 21: Power-Down Control 1 - 2 */ 133 /* 0x024: Power-Down Control 7 */ [all …]
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