| /Zephyr-Core-3.5.0/dts/bindings/spi/ |
| D | nxp,s32-spi.yaml | 44 This value will affect to all inner CS signals of SPI module when active.
54 This value will affect to all inner CS signals of SPI module when active.
65 This value will affect to all inner CS signals of SPI module when active.
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| /Zephyr-Core-3.5.0/tests/net/virtual/src/ |
| D | main.c | 127 uint8_t outer, inner; in eth_tx() local
143 ret = net_pkt_read_u8(pkt, &inner); in eth_tx()
144 zassert_equal(ret, 0, "Cannot read inner protocol type"); in eth_tx()
145 zassert_equal(inner, expecting_inner, in eth_tx()
146 "Unexpected inner protocol 0x%02x, " in eth_tx()
148 inner, expecting_inner); in eth_tx()
925 struct net_pkt *outer, *inner; in test_virtual_recv_data_from_tunnel() local
977 inner = create_inner(iface, AF_INET, IPPROTO_IP, in test_virtual_recv_data_from_tunnel()
981 zassert_not_null(inner, "Cannot allocate %s pkt", inner); in test_virtual_recv_data_from_tunnel()
983 ret = net_ipv4_create(inner, &net_sin(&inner_src)->sin_addr, in test_virtual_recv_data_from_tunnel()
[all …]
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| /Zephyr-Core-3.5.0/dts/bindings/gpio/ |
| D | ti,boosterpack-header.yaml | 14 numbered 1 through 20. The inner rows of the 40 pin variant are numbered 21
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| /Zephyr-Core-3.5.0/include/zephyr/arch/arm64/cortex_r/ |
| D | arm_mpu.h | 99 #define NORMAL_I_WT_NT 0x08U /* Normal, Inner Write-through non-transient */
100 #define NORMAL_I_WB_NT 0x0CU /* Normal, Inner Write-back non-transient */
101 #define NORMAL_I_NON_C 0x04U /* Normal, Inner Non-Cacheable */
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| /Zephyr-Core-3.5.0/subsys/net/ip/ |
| D | Kconfig.mgmt | 23 int "Stack size for the inner thread handling event callbacks"
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| /Zephyr-Core-3.5.0/subsys/testsuite/include/zephyr/ |
| D | fff_extensions.h | 37 * requires no familiarity with the inner workings of FFF.
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| /Zephyr-Core-3.5.0/doc/connectivity/networking/ |
| D | network_monitoring.rst | 99 The IP address above is the inner tunnel endpoint, and can be changed and
141 <local> is the (inner) local IP address
142 <peer> is the (inner) peer IP address
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| /Zephyr-Core-3.5.0/include/zephyr/net/ |
| D | capture.h | 64 * @param my_local_addr The local/inner IP address of the tunnel. Can contain
66 * @param peer_addr The peer/inner IP address of the tunnel. Can contain
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| /Zephyr-Core-3.5.0/include/zephyr/arch/arm/mmu/ |
| D | arm_mmu.h | 19 * Outer / inner cache attributes for cacheable memory:
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| /Zephyr-Core-3.5.0/drivers/interrupt_controller/ |
| D | intc_gicv3_priv.h | 16 #define GIC_BASER_CACHE_INNERLIKE 0x0UL /* Same as Inner Cacheability. */
25 #define GIC_BASER_SHARE_INNER 0x1UL /* Inner Shareable */
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| /Zephyr-Core-3.5.0/include/zephyr/arch/arm/mpu/ |
| D | arm_mpu_v8.h | 121 #define NORMAL_I_WT_NT 0x08 /* Normal, Inner Write-through non-transient */
122 #define NORMAL_I_WB_NT 0x0C /* Normal, Inner Write-back non-transient */
123 #define NORMAL_I_NON_C 0x04 /* Normal, Inner Non-Cacheable */
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| /Zephyr-Core-3.5.0/lib/os/ |
| D | Kconfig.heap | 17 int "Number of tries in the inner heap allocation loop"
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| D | rb.c | 271 struct rbnode *c0, *c1, *inner, *outer; in fix_missing_black() local
333 inner = get_child(sib, n_side); in fix_missing_black()
336 stack[stacksz++] = inner; in fix_missing_black()
339 set_color(inner, BLACK); in fix_missing_black()
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| /Zephyr-Core-3.5.0/include/zephyr/xen/public/ |
| D | memory.h | 118 * Normal Memory Inner/Outer Write-Back Cacheable memory attribute.
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| D | arch-arm.h | 68 * which is mapped as Normal Inner Write-Back Outer Write-Back Inner-Shareable.
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| /Zephyr-Core-3.5.0/drivers/spi/ |
| D | spi_mcux_dspi.c | 269 /* only used when use inner buffer to translate tx format */ in mcux_spi_context_data_update()
272 /* inner buffer can not hold all transferred data */ in mcux_spi_context_data_update()
273 LOG_ERR("inner buffer is too small to hold all data esp %d, act %d", in mcux_spi_context_data_update()
505 /* setup the inner tx buffer */ in dma_callback()
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| D | spi_nxp_s32.c | 361 /* Use inner CS signal from SPI module */ in spi_nxp_s32_configure()
540 * applied for all inner CS signals of SPI module. in spi_nxp_s32_init()
651 * support, all inner module Chip Selects are active low.
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| /Zephyr-Core-3.5.0/tests/subsys/mgmt/mcumgr/zcbor_bulk/src/ |
| D | main.c | 384 zassert_equal(imdd.ret, 0, "Expected successful decoding of inner map"); in ZTEST()
385 zassert_equal(imdd.decoded, 2, "Expected two items in inner map"); in ZTEST()
457 zassert_equal(imdd.ret, -ENOMSG, "Expected failure in decoding of inner map"); in ZTEST()
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| /Zephyr-Core-3.5.0/boards/posix/native_sim/doc/ |
| D | index.rst | 93 If you are interested on the inner workigns of the native simulator itself, you can check
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| /Zephyr-Core-3.5.0/soc/arm/atmel_sam0/common/ |
| D | soc_saml2x.c | 168 * ... I couldn't find details on the inner workings of the DFLL, or any in dfll48m_init()
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| /Zephyr-Core-3.5.0/samples/kernel/metairq_dispatch/src/ |
| D | main.c | 193 * Note the inner loop: hammering on k_cycle_get_32() in thread_fn()
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| /Zephyr-Core-3.5.0/arch/arm64/core/ |
| D | mmu.c | 816 * Translation table walk is cacheable, inner/outer WBWA and in get_tcr()
817 * inner shareable. Due to Cortex-A57 erratum #822227 we must in get_tcr()
930 * (Normal memory Outer WB + Inner WB) in __arch_mem_map()
932 * (Normal memory Outer WT + Inner WT) in __arch_mem_map()
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| /Zephyr-Core-3.5.0/subsys/net/lib/capture/ |
| D | capture.c | 73 * Peer (inner) tunnel IP address.
78 * Local (inner) tunnel IP address. This will be set
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| /Zephyr-Core-3.5.0/doc/services/device_mgmt/ |
| D | mcumgr_callbacks.rst | 333 :inner:
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| /Zephyr-Core-3.5.0/scripts/build/ |
| D | gen_kobject_list.py | 43 - The inner cases of a switch/case C statement, included by
48 - The inner cases of a switch/case C statement, included by
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