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/hal_nxp-latest/mcux/mcux-sdk/drivers/common/
Dfsl_common.h42 /*! @brief Construct a status code value from a group and code number. */
43 #define MAKE_STATUS(group, code) ((((group)*100L) + (code))) argument
80 /*! @brief Status group numbers. */
83 kStatusGroup_Generic = 0, /*!< Group number for generic status codes. */
84 kStatusGroup_FLASH = 1, /*!< Group number for FLASH status codes. */
85 kStatusGroup_LPSPI = 4, /*!< Group number for LPSPI status codes. */
86 kStatusGroup_FLEXIO_SPI = 5, /*!< Group number for FLEXIO SPI status codes. */
87 kStatusGroup_DSPI = 6, /*!< Group number for DSPI status codes. */
88 kStatusGroup_FLEXIO_UART = 7, /*!< Group number for FLEXIO UART status codes. */
89 kStatusGroup_FLEXIO_I2C = 8, /*!< Group number for FLEXIO I2C status codes. */
[all …]
/hal_nxp-latest/s32/drivers/s32k3/Pwm/include/
DEmios_Pwm_Ip.h122 * @param[in] Instance The eMIOS group id
132 * @param[in] Instance The eMIOS group id
133 * @param[in] Channel The Channel in this eMIOS group
143 * @param[in] Instance The eMIOS group id
144 * @param[in] Channel The Channel in this eMIOS group
156 * @param[in] Instance The eMIOS group id
157 * @param[in] Channel The Channel in this eMIOS group
168 * @param[in] Instance The eMIOS group id
169 * @param[in] Channel The Channel in this eMIOS group
179 * @param[in] Instance The eMIOS group id
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/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UD5/drivers/upower/
Dupower_api.h84 * Each Service Group has a set of related functions, named upwr_XXX_,
85 * where XXX is a 3-letter service group mnemonic. The service groups are:
86 * - Exception Service Group - upwr_xcp_*
89 * - Power Management Service Group - upwr_pwm_*
91 * - Delay Measurement Service Group - upwr_dlm_*
93 * - Voltage Measurement Service Group - upwr_vtm_*
95 * - Temperature Measurement Service Group - upwr_tpm_*
97 * - Current Measurement Service Group - upwr_crm_*
99 * - Diagnostic Service Group - upwr_dgn_*
103 * *** No two requests run simultaneously for the same service group,
[all …]
Dupower_api.c68 /* tests Service Group busy */
79 /* installs a user callback for the Service Group */
103 /* service group shared mem buffer pointers */
106 /* Callbacks registered for each service group :
109 * for sgrp_callback, it also means the service group is free to
116 /* request data structures for each service group */
126 /* tx pending status for each (1 bit per service group) */
128 /* serv.group of current ongoing Tx, if any */
131 /* service group busy status, only for this domain (MU index 0) */
132 /* SG bit = 1 if group is busy with a request */
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UD3/drivers/upower/
Dupower_api.h84 * Each Service Group has a set of related functions, named upwr_XXX_,
85 * where XXX is a 3-letter service group mnemonic. The service groups are:
86 * - Exception Service Group - upwr_xcp_*
89 * - Power Management Service Group - upwr_pwm_*
91 * - Delay Measurement Service Group - upwr_dlm_*
93 * - Voltage Measurement Service Group - upwr_vtm_*
95 * - Temperature Measurement Service Group - upwr_tpm_*
97 * - Current Measurement Service Group - upwr_crm_*
99 * - Diagnostic Service Group - upwr_dgn_*
103 * *** No two requests run simultaneously for the same service group,
[all …]
Dupower_api.c68 /* tests Service Group busy */
79 /* installs a user callback for the Service Group */
103 /* service group shared mem buffer pointers */
106 /* Callbacks registered for each service group :
109 * for sgrp_callback, it also means the service group is free to
116 /* request data structures for each service group */
126 /* tx pending status for each (1 bit per service group) */
128 /* serv.group of current ongoing Tx, if any */
131 /* service group busy status, only for this domain (MU index 0) */
132 /* SG bit = 1 if group is busy with a request */
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UD7/drivers/upower/
Dupower_api.h84 * Each Service Group has a set of related functions, named upwr_XXX_,
85 * where XXX is a 3-letter service group mnemonic. The service groups are:
86 * - Exception Service Group - upwr_xcp_*
89 * - Power Management Service Group - upwr_pwm_*
91 * - Delay Measurement Service Group - upwr_dlm_*
93 * - Voltage Measurement Service Group - upwr_vtm_*
95 * - Temperature Measurement Service Group - upwr_tpm_*
97 * - Current Measurement Service Group - upwr_crm_*
99 * - Diagnostic Service Group - upwr_dgn_*
103 * *** No two requests run simultaneously for the same service group,
[all …]
Dupower_api.c68 /* tests Service Group busy */
79 /* installs a user callback for the Service Group */
103 /* service group shared mem buffer pointers */
106 /* Callbacks registered for each service group :
109 * for sgrp_callback, it also means the service group is free to
116 /* request data structures for each service group */
126 /* tx pending status for each (1 bit per service group) */
128 /* serv.group of current ongoing Tx, if any */
131 /* service group busy status, only for this domain (MU index 0) */
132 /* SG bit = 1 if group is busy with a request */
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8US3/drivers/upower/
Dupower_api.h84 * Each Service Group has a set of related functions, named upwr_XXX_,
85 * where XXX is a 3-letter service group mnemonic. The service groups are:
86 * - Exception Service Group - upwr_xcp_*
89 * - Power Management Service Group - upwr_pwm_*
91 * - Delay Measurement Service Group - upwr_dlm_*
93 * - Voltage Measurement Service Group - upwr_vtm_*
95 * - Temperature Measurement Service Group - upwr_tpm_*
97 * - Current Measurement Service Group - upwr_crm_*
99 * - Diagnostic Service Group - upwr_dgn_*
103 * *** No two requests run simultaneously for the same service group,
[all …]
Dupower_api.c68 /* tests Service Group busy */
79 /* installs a user callback for the Service Group */
103 /* service group shared mem buffer pointers */
106 /* Callbacks registered for each service group :
109 * for sgrp_callback, it also means the service group is free to
116 /* request data structures for each service group */
126 /* tx pending status for each (1 bit per service group) */
128 /* serv.group of current ongoing Tx, if any */
131 /* service group busy status, only for this domain (MU index 0) */
132 /* SG bit = 1 if group is busy with a request */
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8US5/drivers/upower/
Dupower_api.h84 * Each Service Group has a set of related functions, named upwr_XXX_,
85 * where XXX is a 3-letter service group mnemonic. The service groups are:
86 * - Exception Service Group - upwr_xcp_*
89 * - Power Management Service Group - upwr_pwm_*
91 * - Delay Measurement Service Group - upwr_dlm_*
93 * - Voltage Measurement Service Group - upwr_vtm_*
95 * - Temperature Measurement Service Group - upwr_tpm_*
97 * - Current Measurement Service Group - upwr_crm_*
99 * - Diagnostic Service Group - upwr_dgn_*
103 * *** No two requests run simultaneously for the same service group,
[all …]
Dupower_api.c68 /* tests Service Group busy */
79 /* installs a user callback for the Service Group */
103 /* service group shared mem buffer pointers */
106 /* Callbacks registered for each service group :
109 * for sgrp_callback, it also means the service group is free to
116 /* request data structures for each service group */
126 /* tx pending status for each (1 bit per service group) */
128 /* serv.group of current ongoing Tx, if any */
131 /* service group busy status, only for this domain (MU index 0) */
132 /* SG bit = 1 if group is busy with a request */
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/hal_nxp-latest/s32/drivers/s32ze/BaseNXP/header/
DS32Z2_CAN_HUB.h100 …__IO uint32_t CAN0GRPCTL; /**< CAN0 Module Group Control Register, offset: …
101 …__IO uint32_t CAN1GRPCTL; /**< CAN1 Module Group Control Register, offset: …
102 …__IO uint32_t CAN2GRPCTL; /**< CAN2 Module Group Control Register, offset: …
103 …__IO uint32_t CAN3GRPCTL; /**< CAN3 Module Group Control Register, offset: …
104 …__IO uint32_t CAN4GRPCTL; /**< CAN4 Module Group Control Register, offset: …
105 …__IO uint32_t CAN5GRPCTL; /**< CAN5 Module Group Control Register, offset: …
106 …__IO uint32_t CAN6GRPCTL; /**< CAN6 Module Group Control Register, offset: …
107 …__IO uint32_t CAN7GRPCTL; /**< CAN7 Module Group Control Register, offset: …
108 …__IO uint32_t CAN8GRPCTL; /**< CAN8 Module Group Control Register, offset: …
109 …__IO uint32_t CAN9GRPCTL; /**< CAN9 Module Group Control Register, offset: …
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/hal_nxp-latest/mcux/mcux-sdk/drivers/ssarc/
Dfsl_ssarc.h44 …lag = SSARC_LP_INT_STATUS_TIMEOUT_MASK, /*!< If processing of a group has exceeded the
46 kSSARC_GroupConflictFlag = SSARC_LP_INT_STATUS_GROUP_CONFLICT_MASK, /*!< Group conflict. */
93 …kSSARC_ProcessFromStartToEnd = 0U, /*!< Descriptors within the group are processed from start to e…
94 …kSSARC_ProcessFromEndToStart = 1U, /*!< Descriptors within the group are processed from end to sta…
122 * @brief The configuration of the group.
126 ssarc_cpu_domain_name_t cpuDomain; /*!< CPU domain, define the ownership of this group. */
127 uint32_t startIndex; /*!< The index of the first descriptor of the group. */
128 uint32_t endIndex; /*!< The index of the last descriptor of the group. */
131 uint8_t restorePriority; /*!< Restore priority of current group.
133 uint8_t savePriority; /*!< Save priority of current group.
[all …]
Dfsl_ssarc.c34 * @brief Maps the descriptors to the selected group.
36 * @note One descriptor can be mapped to different group, but please make sure
40 * @param groupID The index of the group. Range from 0 to 15.
41 * @param startIndex The index of the first descriptor of the group.
42 * @param endIndex The index of the last descriptor of the group.
53 …* @brief Set the order of descriptors within the group are processed when restoring register value…
56 * @param groupID The index of the group. Range from 0 to 15.
74 * @brief Set the order of descriptors within the group are processed when saving register values.
77 * @param groupID The index of the group. Range from 0 to 15.
127 * brief Init the selected group.
[all …]
/hal_nxp-latest/mcux/scripts/pinctrl/kinetis/
Dkinetis_cfg_utils.py64 self._name += f"_PT{match.group(1)}{match.group(2)}"
67 self._name += f"_PIO{match.group(1)}_{match.group(2)}"
70 self._name += f"_P{match.group(1)}_{match.group(2)}"
71 self._port = match.group(1)
72 self._pin = int(match.group(2))
184 self._port = pin_regex.group(1)
185 self._pin = pin_regex.group(2)
310 Internal class representing pin group
314 Creates a pin group
327 # group pins based on shared configuration
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/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QM6/drivers/
Dfsl_sc_event.c219 uint8_t group = (uint8_t)SC_EVENT_GET_IRQ_GROUP(event); in SCEvent_Config() local
223 * group, clear the group's pending IRQ status in case some IRQ has already pending. in SCEvent_Config()
225 if ((s_irqEnabled[group] == 0U) && enable) in SCEvent_Config()
227 err = sc_irq_status(ipc, IPC_MU_RSRC, group, &status); in SCEvent_Config()
236 err = sc_irq_enable(ipc, IPC_MU_RSRC, group, (0x1UL << pt), enable); in SCEvent_Config()
244 s_irqEnabled[group] |= 0x1UL << pt; in SCEvent_Config()
249 s_irqEnabled[group] &= (~(0x1UL << pt)) & SC_EVENT_IRQ_DUMMY; in SCEvent_Config()
254 err = sc_irq_enable(ipc, IPC_MU_RSRC, group, mask, enable); in SCEvent_Config()
261 s_irqEnabled[group] |= mask; in SCEvent_Config()
265 s_irqEnabled[group] &= ~mask; in SCEvent_Config()
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/hal_nxp-latest/mcux/mcux-sdk/drivers/irqsteer/
Dfsl_irqsteer.h77 kIRQSTEER_InterruptGroup0, /*!< Interrupt Group 0: interrupt source 31 - 0 */
78 kIRQSTEER_InterruptGroup1, /*!< Interrupt Group 1: interrupt source 63 - 32 */
79 kIRQSTEER_InterruptGroup2, /*!< Interrupt Group 2: interrupt source 95 - 64 */
80 kIRQSTEER_InterruptGroup3, /*!< Interrupt Group 3: interrupt source 127 - 96 */
81 kIRQSTEER_InterruptGroup4, /*!< Interrupt Group 4: interrupt source 159 - 128 */
82 kIRQSTEER_InterruptGroup5, /*!< Interrupt Group 5: interrupt source 191 - 160 */
83 kIRQSTEER_InterruptGroup6, /*!< Interrupt Group 6: interrupt source 223 - 192 */
84 kIRQSTEER_InterruptGroup7, /*!< Interrupt Group 7: interrupt source 255 - 224 */
85 kIRQSTEER_InterruptGroup8, /*!< Interrupt Group 8: interrupt source 287 - 256 */
86 kIRQSTEER_InterruptGroup9, /*!< Interrupt Group 9: interrupt source 319 - 288 */
[all …]
/hal_nxp-latest/mcux/mcux-sdk/CMSIS/
DCMSIS.yml30 group: CORE
56 group: DSP
82 group: CORE
108 group: CORE
133 group: CORE
159 group: CORE
185 group: CORE
209 group: CORE
233 group: CORE
261 group: CORE
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/hal_nxp-latest/mcux/mcux-sdk/drivers/dpu/
Dfsl_dpu.c450 #define DPU_INT_GROUP_NUM 2U /* Interrupt group number. */
1249 * param group Interrupt group index.
1252 * note Only the members in the same group could be OR'ed, at the same time,
1253 * the parameter p group should be passed in correctly.
1255 void DPU_EnableInterrupts(IRIS_MVPL_Type *base, uint8_t group, uint32_t mask) in DPU_EnableInterrupts() argument
1257 assert(group < DPU_INT_GROUP_NUM); in DPU_EnableInterrupts()
1259 ((DPU_COMCTRL_Type *)((uint32_t)base + DPU_COMCTRL_OFFSET))->INTERRUPTENABLE[group] |= mask; in DPU_EnableInterrupts()
1274 * param group Interrupt group index.
1277 * note Only the members in the same group could be OR'ed, at the same time,
1278 * the parameter p group should be passed in correctly.
[all …]
/hal_nxp-latest/mcux/mcux-sdk/drivers/adc16/
Dfsl_adc16.h79 /* This group of enumeration is for internal use which is related to register setting. */
84 /* This group of enumeration is for a public user. */
481 * Note that the "Channel Group" has a detailed description.
483 …* group of status and control registers, one for each conversion. The channel group parameter indi…
484 …* registers are used, for example, channel group 0 is for Group A registers and channel group 1 is…
487 …* the channel groups is actively controlling ADC conversions. The channel group 0 is used for both…
489 * trigger modes. Channel group 1 and greater indicates multiple channel group registers for
492 …* number of SC1n registers (channel groups) specific to this device. Channel group 1 or greater a…
494 …* Updating the channel group 0 while a different channel group is actively controlling a conversio…
495 …* vice versa. Writing any of the channel group registers while that specific channel group is acti…
[all …]
/hal_nxp-latest/mcux/mcux-sdk/drivers/sdu/
Dfsl_sdioslv_sdu.c23 sdioslv_scratch_group_t group,
357 * Call this API to read scratch register of SDU (based on group and offset).
360 * @param group Specify which scratch group.
361 * @param offset Specify offset of the scratch group.
367 sdioslv_scratch_group_t group, in SDIOSLV_ReadScratchRegister() argument
374 ret = SDIOSLV_GetScratchRegisterAddr(fun_num, group, offset, &reg_addr); in SDIOSLV_ReadScratchRegister()
387 * Call this API to write value to scratch register of SDU (based on group and offset).
390 * @param group Specify which scratch group.
391 * @param offset Specify offset of the scratch group.
397 sdioslv_scratch_group_t group, in SDIOSLV_WriteScratchRegister() argument
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/hal_nxp-latest/mcux/mcux-sdk/drivers/adc_12b1msps_sar/
Dfsl_adc.h49 /* This group of enumeration is for internal use which is related to register setting. */
54 /* This group of enumeration is for a public user. */
244 * Note that the "Channel Group" has a detailed description.
246 …* group of status and control registers, one for each conversion. The channel group parameter indi…
247 …* registers are used, for example channel group 0 is for Group A registers and channel group 1 is …
250 …* the channel groups is actively controlling ADC conversions. The channel group 0 is used for both…
252 …* trigger modes. Channel groups 1 and greater indicate potentially multiple channel group register…
257 …* Updating the channel group 0 while a different channel group is actively controlling a conversio…
258 …* vice versa. Writing any of the channel group registers while that specific channel group is acti…
262 * @param channelGroup Channel group index.
[all …]
/hal_nxp-latest/mcux/scripts/pinctrl/lpc/
Dlpc_cfg_utils.py63 self._name += f"_PIO{match.group(1)}_{match.group(2)}"
64 port = int(match.group(1))
65 pin = int(match.group(2))
226 self._port = int(pin_regex.group(1))
227 self._pin = int(pin_regex.group(2))
354 Internal class representing pin group
358 Creates a pin group
371 # group pins based on shared configuration
386 # Do not add pinmux option to group
413 return true if two objects have the same pin group name
[all …]
/hal_nxp-latest/mcux/mcux-sdk/drivers/adc12/
Dfsl_adc12.h200 * Note that the "Channel Group" has a detailed description.
202 …* group of status and control register, one for each conversion. The channel group parameter indic…
203 …* registers are used, channel group 0 is for Group A registers and channel group 1 is for Group B …
205 …* channel groups is actively controlling ADC conversions. Channel group 0 is used for both softwar…
206 …f operation. Channel groups 1 and greater indicate potentially multiple channel group registers for
210 …* Updating channel group 0 while a different channel group is actively controlling a conversion is…
211 …* vice versa. Writing any of the channel group registers while that specific channel group is acti…
215 * @param channelGroup Channel group index.
224 * @param channelGroup Channel group index.
239 * @param channelGroup Channel group index.

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