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/Zephyr-latest/boards/seeed/wio_terminal/
Dgrove_connectors.dtsi3 * SPDX-License-Identifier: Apache-2.0
8 compatible = "grove-header";
9 #gpio-cells = <2>;
10 gpio-map-mask = <0xffffffff 0xffffffc0>;
11 gpio-map-pass-thru = <0 0x3f>;
12 gpio-map = <0 0 &portb 8 0>, /* A0/D0 */
16 compatible = "grove-header";
17 #gpio-cells = <2>;
18 gpio-map-mask = <0xffffffff 0xffffffc0>;
19 gpio-map-pass-thru = <0 0x3f>;
[all …]
/Zephyr-latest/drivers/gpio/
Dgpio_cc13xx_cc26xx.c4 * SPDX-License-Identifier: Apache-2.0
13 #include <zephyr/drivers/gpio.h>
14 #include <zephyr/dt-bindings/gpio/ti-cc13xx-cc26xx-gpio.h>
16 #include <driverlib/gpio.h>
27 #include <zephyr/drivers/gpio/gpio_utils.h>
29 /* bits 16-18 in iocfg registers correspond to interrupt settings */
32 /* the rest are for general (non-interrupt) config */
48 uint32_t mask);
50 uint32_t mask);
72 return -ENOTSUP; in gpio_cc13xx_cc26xx_config()
[all …]
Dgpio_emul.c4 * SPDX-License-Identifier: Apache-2.0
10 #include <zephyr/drivers/gpio.h>
11 #include <zephyr/drivers/gpio/gpio_emul.h>
16 #include <zephyr/drivers/gpio/gpio_utils.h>
27 * @brief GPIO Emulator interrupt capabilities
29 * These enumerations are used as a bitmask and allow the GPIO Emulator to
30 * model GPIO interrupt controllers with varying interrupt trigger support.
46 * @brief Emulated GPIO controller configuration data
48 * This structure contains all of the state for a given emulated GPIO
63 /** Number of pins available in the given GPIO controller instance */
[all …]
/Zephyr-latest/dts/bindings/gpio/
Dgpio-nexus.yaml2 # SPDX-License-Identifier: Apache-2.0
4 # Common fields for GPIO nexus nodes
7 gpio-map:
11 gpio-map-mask:
14 gpio-map-pass-thru:
17 "#gpio-cells":
20 description: Number of items to expect in a GPIO specifier
/Zephyr-latest/boards/m5stack/m5stack_atoms3/
Dgrove_connectors.dtsi3 * SPDX-License-Identifier: Apache-2.0
8 compatible = "grove-header";
9 #gpio-cells = <2>;
10 gpio-map-mask = <0xffffffff 0xffffffc0>;
11 gpio-map-pass-thru = <0 0x3f>;
12 gpio-map = <0 0 &gpio0 1 0>,
/Zephyr-latest/boards/m5stack/m5stack_cores3/
Dgrove_connectors.dtsi3 * SPDX-License-Identifier: Apache-2.0
8 compatible = "grove-header";
9 #gpio-cells = <2>;
10 gpio-map-mask = <0xffffffff 0xffffffc0>;
11 gpio-map-pass-thru = <0 0x3f>;
12 gpio-map = <0 0 &gpio0 1 0>,
/Zephyr-latest/boards/m5stack/m5stack_atom_lite/
Dgrove_connectors.dtsi4 * SPDX-License-Identifier: Apache-2.0
9 compatible = "grove-header";
10 #gpio-cells = <2>;
11 gpio-map-mask = <0xffffffff 0xffffffc0>;
12 gpio-map-pass-thru = <0 0x3f>;
13 gpio-map = <0 0 &gpio0 26 0>,
/Zephyr-latest/boards/m5stack/m5stack_atoms3_lite/
Dgrove_connectors.dtsi4 * SPDX-License-Identifier: Apache-2.0
9 compatible = "grove-header";
10 #gpio-cells = <2>;
11 gpio-map-mask = <0xffffffff 0xffffffc0>;
12 gpio-map-pass-thru = <0 0x3f>;
13 gpio-map = <0 0 &gpio0 1 0>,
/Zephyr-latest/boards/adi/sdp_k1/
Dadi_sdp_120pin_connector.dtsi5 * SPDX-License-Identifier: Apache-2.0
8 #include <dt-bindings/gpio/adi-sdp-120.h>
12 compatible = "adi,sdp-120";
13 #gpio-cells = <2>;
14 gpio-map-mask = <0xffffffff 0xffffffc0>;
15 gpio-map-pass-thru = <0 0x3f>;
16 gpio-map =
17 /* pin map */ /* sdp-120 */
52 <81 0 &gpioh 6 0>, /* SPI_CLK - spi5_sck_ph6 */
53 <82 0 &gpiof 8 0>, /* SPI_MISO - spi5_miso_pf8 */
[all …]
/Zephyr-latest/boards/m5stack/m5stack_core2/
Dgrove_connectors.dtsi4 * SPDX-License-Identifier: Apache-2.0
9 compatible = "grove-header";
10 #gpio-cells = <2>;
11 gpio-map-mask = <0xffffffff 0xffffffc0>;
12 gpio-map-pass-thru = <0 0x3f>;
13 gpio-map = <0 0 &gpio1 1 0>, /* D0/SCL/RX */
/Zephyr-latest/boards/atmel/sam/sam4s_xplained/
Dsam4s_xplained.dts3 * SPDX-License-Identifier: Apache-2.0
6 /dts-v1/;
9 #include "sam4s_xplained-pinctrl.dtsi"
10 #include <zephyr/dt-bindings/input/input-event-codes.h>
17 i2c-0 = &twi0;
18 i2c-1 = &twi1;
19 pwm-0 = &pwm0;
28 zephyr,shell-uart = &uart0;
34 compatible = "zephyr,memory-region", "mmio-sram";
37 zephyr,memory-region = "SRAM1";
[all …]
/Zephyr-latest/boards/shields/arduino_uno_click/
Darduino_uno_click.overlay4 * SPDX-License-Identifier: Apache-2.0
8 mikrobus_header_1: mikrobus-connector-1 {
9 compatible = "mikro-bus";
10 #gpio-cells = <2>;
11 gpio-map-mask = <0xffffffff 0xffffffc0>;
12 gpio-map-pass-thru = <0 0x3f>;
13 gpio-map = <0 0 &arduino_header 0 0>, /* AN -> A0 */
14 <1 0 &arduino_header 3 0>, /* RST -> A3 */
15 <2 0 &arduino_header 16 0>, /* CS -> D10 */
16 <3 0 &arduino_header 19 0>, /* SCK -> D13 */
[all …]
/Zephyr-latest/boards/96boards/wistrio/
D96b_lscon.dtsi4 * SPDX-License-Identifier: Apache-2.0
9 compatible = "linaro,96b-lscon-3v3";
10 #gpio-cells = <2>;
11 gpio-map-mask = <0xffffffff 0xffffffc0>;
12 gpio-map-pass-thru = <0 0x3f>;
13 gpio-map = <13 0 &gpioa 8 0>, /* GPIO-A */
14 <14 0 &gpiob 3 0>, /* GPIO-B */
15 /* GPIO-C not connected */
16 <16 0 &gpiob 5 0>, /* GPIO-D */
17 <17 0 &gpioa 13 0>, /* GPIO-E */
[all …]
/Zephyr-latest/boards/st/stm32h735g_disco/
Dpmod_connector.dtsi4 * SPDX-License-Identifier: Apache-2.0
8 pmod0: pmod-connector {
10 #gpio-cells = <2>;
11 gpio-map-mask = <0xffffffff 0xffffffc0>;
12 gpio-map-pass-thru = <0 0x3f>;
13 gpio-map = <0 0 &gpiof 9 0>, /* IO1 */
19 /* IO7 - not connected */
20 /* IO8 - not connected */
/Zephyr-latest/boards/st/stm32h747i_disco/
Dpmod_connector.dtsi4 * SPDX-License-Identifier: Apache-2.0
8 pmod0: pmod-connector {
10 #gpio-cells = <2>;
11 gpio-map-mask = <0xffffffff 0xffffffc0>;
12 gpio-map-pass-thru = <0 0x3f>;
13 gpio-map = <0 0 &gpioa 11 0>, /* IO1 */
19 /* IO7 - not connected */
20 /* IO8 - not connected */
/Zephyr-latest/boards/shields/adafruit_2_8_tft_touch_v2/
Dadafruit_2_8_tft_touch_v2_nano.overlay4 * SPDX-License-Identifier: Apache-2.0
15 compatible = "arduino-header-r3";
16 #gpio-cells = <2>;
17 gpio-map-mask = <0xffffffff 0xffffffc0>;
18 gpio-map-pass-thru = <0 0x3f>;
19 gpio-map = <10 0 &arduino_nano_header 4 0>, /* D4 */
/Zephyr-latest/boards/96boards/carbon/
D96b_lscon.dtsi4 * SPDX-License-Identifier: Apache-2.0
9 compatible = "linaro,96b-lscon-3v3";
10 #gpio-cells = <2>;
11 gpio-map-mask = <0xffffffff 0xffffffc0>;
12 gpio-map-pass-thru = <0 0x3f>;
13 gpio-map = <13 0 &gpioc 2 0>, /* GPIO-A */
14 <14 0 &gpioc 3 0>, /* GPIO-B */
15 <15 0 &gpioc 4 0>, /* GPIO-C */
16 <16 0 &gpioc 5 0>, /* GPIO-D */
17 <17 0 &gpioc 6 0>, /* GPIO-E */
[all …]
/Zephyr-latest/boards/96boards/nitrogen/
D96b_lscon.dtsi4 * SPDX-License-Identifier: Apache-2.0
9 compatible = "linaro,96b-lscon-1v8";
10 #gpio-cells = <2>;
11 gpio-map-mask = <0xffffffff 0xffffffc0>;
12 gpio-map-pass-thru = <0 0x3f>;
13 gpio-map = <23 0 &gpio0 2 0>, /* GPIO-A */
14 <24 0 &gpio0 3 0>, /* GPIO-B */
15 <25 0 &gpio0 4 0>, /* GPIO-C */
16 <26 0 &gpio0 5 0>, /* GPIO-D */
17 <27 0 &gpio0 6 0>, /* GPIO-E */
[all …]
/Zephyr-latest/boards/st/nucleo_wb05kz/
Darduino_r3_connector.dtsi4 * SPDX-License-Identifier: Apache-2.0
9 compatible = "arduino-header-r3";
10 #gpio-cells = <2>;
11 gpio-map-mask = <0xffffffff 0xffffffc0>;
12 gpio-map-pass-thru = <0 0x3f>;
18 gpio-map = <14 0 &gpiob 15 0>, /* D8 */
/Zephyr-latest/boards/st/nucleo_wb09ke/
Darduino_r3_connector.dtsi4 * SPDX-License-Identifier: Apache-2.0
9 compatible = "arduino-header-r3";
10 #gpio-cells = <2>;
11 gpio-map-mask = <0xffffffff 0xffffffc0>;
12 gpio-map-pass-thru = <0 0x3f>;
18 gpio-map = <14 0 &gpiob 15 0>, /* D8 */
/Zephyr-latest/dts/riscv/
Dneorv32.dtsi4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
10 #include <zephyr/dt-bindings/gpio/gpio.h>
18 #address-cells = <1>;
19 #size-cells = <0>;
22 compatible = "neorv32-cpu", "riscv";
27 intc: interrupt-controller {
28 compatible = "riscv,cpu-intc";
29 interrupt-controller;
30 #address-cells = <1>;
[all …]
/Zephyr-latest/boards/seeed/xiao_esp32c3/
Dseeed_xiao_connector.dtsi4 * SPDX-License-Identifier: Apache-2.0
9 compatible = "seeed,xiao-gpio";
10 #gpio-cells = <2>;
11 gpio-map-mask = <0xffffffff 0xffffffc0>;
12 gpio-map-pass-thru = <0 0x3f>;
13 gpio-map = <0 0 &gpio0 2 0>, /* D0 */
/Zephyr-latest/boards/seeed/xiao_esp32c6/
Dseeed_xiao_connector.dtsi4 * SPDX-License-Identifier: Apache-2.0
9 compatible = "seeed,xiao-gpio";
10 #gpio-cells = <2>;
11 gpio-map-mask = <0xffffffff 0xffffffc0>;
12 gpio-map-pass-thru = <0 0x3f>;
13 gpio-map = <0 0 &gpio0 0 0>, /* D0 */
/Zephyr-latest/boards/seeed/xiao_rp2040/
Dseeed_xiao_connector.dtsi4 * SPDX-License-Identifier: Apache-2.0
9 compatible = "seeed,xiao-gpio";
10 #gpio-cells = <2>;
11 gpio-map-mask = <0xffffffff 0xffffffc0>;
12 gpio-map-pass-thru = <0 0x3f>;
13 gpio-map
/Zephyr-latest/boards/adafruit/qt_py_esp32s3/
Dseeed_xiao_connector.dtsi4 * SPDX-License-Identifier: Apache-2.0
9 compatible = "seeed,xiao-gpio";
10 #gpio-cells = <2>;
11 gpio-map-mask = <0xffffffff 0xffffffc0>;
12 gpio-map-pass-thru = <0 0x3f>;
13 gpio-map = <0 0 &gpio0 18 0>, /* D0 */

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