1# Copyright 2023 NXP 2# SPDX-License-Identifier: Apache-2.0 3 4description: | 5 Quadrature Decoder driver which processes encoder signals to determine motor revs 6 with the cooperation of S32 IP blocks- eMIOS, TRGMUX and LCU. 7 The sensor qdec application can be used for testing this driver. 8 The following example uses TRGMUX IN2 and IN3 to connect to LCU1 LC0 I0 and I1. 9 LCU1 LC0 O2 and O3 connect to eMIOS0 CH6(Clockwise rotation) and 10 CH7(Counter Clockwise rotation) via TRGMUX_INT_OUT37 and TRGMUX_INT_OUT38 11 micro-ticks-per-rev is set as per vehicle gearbox reduction. 12 lcu output filters are set to capture maximum speed sensitivity and avoid channel noise. 13 14 qdec0 { 15 compatible = "nxp,qdec-s32"; 16 pinctrl-0 = <&qdec_s32>; 17 pinctrl-names = "default"; 18 micro-ticks-per-rev = <685440000>; 19 status = "okay"; 20 trgmux = <&trgmux>; 21 trgmux-io-config = 22 <0 TRGMUX_IP_OUTPUT_EMIOS0_CH5_9_IPP_IND_CH6 TRGMUX_IP_INPUT_LCU1_LC0_OUT_I2>, 23 <1 TRGMUX_IP_OUTPUT_EMIOS0_CH5_9_IPP_IND_CH7 TRGMUX_IP_INPUT_LCU1_LC0_OUT_I3>, 24 <2 TRGMUX_IP_OUTPUT_LCU1_0_INP_I0 TRGMUX_IP_INPUT_SIUL2_IN2>, 25 <3 TRGMUX_IP_OUTPUT_LCU1_0_INP_I1 TRGMUX_IP_INPUT_SIUL2_IN3>; 26 lcu = <&lcu1>; 27 lcu-input-idx = <1>; 28 <LCU_IP_IN_0 LCU_IP_IN_1 29 LCU_IP_IN_2 LCU_IP_IN_3>; 30 lcu-mux-sel = 31 <LCU_IP_MUX_SEL_LU_IN_0 LCU_IP_MUX_SEL_LU_IN_1 32 LCU_IP_MUX_SEL_LU_OUT_0 LCU_IP_MUX_SEL_LU_OUT_1>; 33 lcu-output-filter-config = 34 /* LCU Out HW ID, Rise Filter, Fall Filter */ 35 <0 5 5>, /* LCU O0 */ 36 <1 5 5>, /* LCU O1 */ 37 <2 2 2>, /* LCU O2 */ 38 <3 2 2>; /* LCU O3 */ 39 emios = <&emios0>; 40 emios-channels = <6 7>; 41 }; 42 43compatible: "nxp,qdec-s32" 44 45include: [pinctrl-device.yaml, sensor-device.yaml] 46 47properties: 48 micro-ticks-per-rev: 49 type: int 50 description: | 51 This is a number that is used to determine how many revolutions * 1000000 52 were done based on the current counter's value. 53 54 trgmux: 55 type: phandle 56 description: | 57 phandle to the TRGMUX node. 58 59 trgmux-io-config: 60 type: array 61 description: | 62 This gives the logic triggers configuration of TRGMUX module. 63 It contains 3 values for each of the 4 logic triggers used: 64 logic trigger number, output, input. 65 Hence, it's length should be '12'. 66 Ex: 67 trgmux-io-config = 68 <0 TRGMUX_IP_OUTPUT_EMIOS0_CH5_9_IPP_IND_CH6 TRGMUX_IP_INPUT_LCU1_LC0_OUT_I2>, 69 <1 TRGMUX_IP_OUTPUT_EMIOS0_CH5_9_IPP_IND_CH7 TRGMUX_IP_INPUT_LCU1_LC0_OUT_I3>, 70 <2 TRGMUX_IP_OUTPUT_LCU1_0_INP_I0 TRGMUX_IP_INPUT_SIUL2_IN2>, 71 <3 TRGMUX_IP_OUTPUT_LCU1_0_INP_I1 TRGMUX_IP_INPUT_SIUL2_IN3>; 72 73 lcu: 74 type: phandle 75 description: | 76 phandle to the LCU node. 77 78 emios: 79 type: phandle 80 description: | 81 phandle to the eMIOS node. 82 83 lcu-output-filter-config: 84 type: array 85 description: | 86 This array gives the configuration for each of the four outputs of LCU module. 87 It contains the following for each output: hardware output id, rise filter and fall filter. 88 The filters specify the delay in terms of CORE_CLK between the input and output line of LC. 89 We use this delay to generate short pulses at the rising and falling edges of input pulse. 90 It's length should be '12' - 3 entries for each of the four LCU outputs. 91 Ex: lcu-output-filter-config = 92 /* LCU Out HW ID, Rise Filter, Fall Filter */ 93 <0 5 5>, /* LCU O0 */ 94 <1 5 5>, /* LCU O1 */ 95 <2 2 2>, /* LCU O2 */ 96 <3 2 2>; /* LCU O3 */ 97 98 lcu-mux-sel: 99 type: array 100 description: | 101 This array configures the sources of input to the LCU module by programming the muxsel. 102 103 lcu-input-idx: 104 type: array 105 description: | 106 This array configures the input indices to the LCU module which help to determine the 107 Logic Cell number used inside an LCU instance. 108 109 emios-channels: 110 type: array 111 description: | 112 This is the array containing 2 emios channel TypeG numbers used by the qdec. 113