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/Zephyr-Core-3.5.0/dts/bindings/display/panel/
Dpanel-timing.yaml2 # SPDX-License-Identifier: Apache-2.0
9 a panel under display-timings node. For example:
12 display-timings {
13 compatible = "zephyr,panel-timing";
14 hsync-len = <8>;
15 hfront-porch = <32>;
16 hback-porch = <32>;
17 vsync-len = <2>;
18 vfront-porch = <16>;
19 vback-porch = <14>;
[all …]
/Zephyr-Core-3.5.0/dts/bindings/gpio/
Dzephyr,gpio-emul.yaml2 # SPDX-License-Identifier: Apache-2.0
6 compatible: "zephyr,gpio-emul"
8 include: [gpio-controller.yaml, base.yaml]
14 rising-edge:
15 description: Enables support for rising edge interrupt detection
18 falling-edge:
19 description: Enables support for falling edge interrupt detection
22 high-level:
26 low-level:
30 "#gpio-cells":
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/Zephyr-Core-3.5.0/include/zephyr/drivers/interrupt_controller/
Dgd32_exti.h4 * SPDX-License-Identifier: Apache-2.0
22 /** Trigger on rising edge */
24 /** Trigger on falling edge */
26 /** Trigger on rising and falling edge */
64 * @retval -EALREADY If callback is already set and @p cb is not NULL.
Dexti_stm32.h2 * Copyright (c) 2016 Open-RnD Sp. z o.o.
4 * SPDX-License-Identifier: Apache-2.0
12 * and STM32F107xx advanced ARM(r)-based 32-bit MCUs
15 * advanced ARM(r)-based 32-bit MCUs
48 /* trigger on rising edge */
50 /* trigger on falling edge */
52 /* trigger on falling edge */
Dintc_xmc4xxx.h4 * SPDX-License-Identifier: Apache-2.0
15 * @param mode Level or edge interrupt
16 * @param trig Trigger edge type (falling, rising or both)
21 * @retval -ENOTSUP If the specific port_id/pin combination is not supported or
23 * @retval -EBUSY If the interrupt line is already used by a different port_id/pin
24 * @retval -EINVAL If the trigger combination is invalid
37 * @retval -EINVAL If the specific port_id and pin combination has no interrupt
Dnxp_pint.h4 * SPDX-License-Identifier: Apache-2.0
32 /* Generate Pin Interrupt on rising edge */
34 /* Generate Pin Interrupt on falling edge */
51 * 0-64, corresponding to GPIO0 pin 1 - GPIO1 pin 31)
Dsam0_eic.h4 * SPDX-License-Identifier: Apache-2.0
20 /* Rising edge */
22 /* Falling edge */
/Zephyr-Core-3.5.0/include/zephyr/dt-bindings/interrupt-controller/
Dit8xxx2-wuc.h4 * SPDX-License-Identifier: Apache-2.0
10 #include <zephyr/dt-bindings/dt-util.h>
19 /** WUC rising edge trigger mode */
21 /** WUC falling edge trigger mode */
23 /** WUC both edge trigger mode */
/Zephyr-Core-3.5.0/dts/bindings/pinctrl/
Dnuvoton,npcx-pinctrl.yaml2 # SPDX-License-Identifier: Apache-2.0
10 - bias-pull-down: Enable pull-down resistor.
11 - bias-pull-up: Enable pull-up resistor.
12 - drive-open-drain: Output driver is open-drain.
15 - pinmux-locked: Lock pinmux configuration for peripheral device
16 - pinmux-gpio: Inverse pinmux back to gpio
17 - psl-in-mode: Select the assertion detection mode of PSL input
18 - psl-in-pol: Select the assertion detection polarity of PSL input
23 #include <nuvoton/npcx/npcx7/npcx7-pinctrl.dtsi>
26 internal 3.3V pull-up if its i2c frequency won't exceed 400kHz.
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Dti,cc13xx-cc26xx-pinctrl.yaml2 # SPDX-License-Identifier: Apache-2.0
24 - bias-disable: Disable pull-up/down.
25 - bias-pull-down: Enable pull-down resistor.
26 - bias-pull-up: Enable pull-up resistor.
27 - drive-open-drain: Output driver is open-drain.
28 - drive-open-drain: Output driver is open-source.
29 - drive-strength: Minimum current that can be sourced from the pin.
30 - input-enable: enable input.
31 - input-schmitt-enable: enable input schmitt circuit.
32 - ti,input-edge-detect: enable and configure edge detection interrupts
[all …]
/Zephyr-Core-3.5.0/dts/bindings/watchdog/
Dti,tps382x.yaml10 wdi-gpios:
11 type: phandle-array
17 when WDI sees a rising edge or a falling edge. If unused, the WDI
21 timeout-period:
25 Time-out period in milliseconds. Typical for TPS3823/4/8 and TPS3823A is
/Zephyr-Core-3.5.0/soc/arm/microchip_mec/mec172x/reg/
Dmec172x_qspi.h4 * SPDX-License-Identifier: Apache-2.0
24 /* Mode 0: Clock idle = Low. Data change falling edge, sample rising edge */
26 /* Mode 1: Clock idle = Low. Data change rising edge, sample falling edge */
28 /* Mode 2: Clock idle = High. Data change rising edge, sample falling edge */
30 /* Mode 3: Clock idle = High. Data change falling edge, sample rising edge */
140 /* MOSI data changes on first clock edge of clock pulse */
142 /* MOSI data changes on second clock edge of clock pulse */
146 /* MISO data capture on first clock edge of clock pulse */
148 /* MISO data capture on second clock edge of clock pulse */
368 /* Each Local DMA channel implements 4 32-bit registers.
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/Zephyr-Core-3.5.0/dts/bindings/display/
Dftdi,ft800.yaml2 # SPDX-License-Identifier: Apache-2.0
8 include: spi-device.yaml
11 irq-gpios:
12 type: phandle-array
28 the rising edge. If it is set to one, PCLK polarity is on
29 the falling edge.
36 edge. When set to 0, R[7:2],G[7:2] and B[7:2] signals change
37 following the active edge of PCLK. When set to 1, R[7:2]
/Zephyr-Core-3.5.0/dts/bindings/dsa/
Dmicrochip_dsa.yaml2 # SPDX-License-Identifier: Apache-2.0
7 include: [spi-device.yaml]
9 dsa-master-port:
12 dsa-slave-ports:
15 spi-cpha:
18 Set to indicate phase starts with asserted half-phase (CPHA=1).
20 spi-cpol:
23 Set to indicate clock leading edge is falling (CPOL=1).
25 reset-gpios:
26 type: phandle-array
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/Zephyr-Core-3.5.0/include/zephyr/dt-bindings/pinctrl/
Dcc13xx_cc26xx-pinctrl.h2 * Copyright (c) 2015 - 2017, Texas Instruments Incorporated
4 * SPDX-License-Identifier: Apache-2.0
60 /* Edge Detection */
61 #define IOC_NO_EDGE 0x00000000 /* No edge detection */
62 #define IOC_FALLING_EDGE 0x00010000 /* Edge detection on falling edge */
63 #define IOC_RISING_EDGE 0x00020000 /* Edge detection on rising edge */
64 #define IOC_BOTH_EDGES 0x00030000 /* Edge detection on both edges */
/Zephyr-Core-3.5.0/tests/drivers/gpio/gpio_basic_api/src/
Dtest_callback_trigger.c4 * SPDX-License-Identifier: Apache-2.0
25 && (dd->mode == GPIO_INT_EDGE_BOTH)) { in callback()
63 drv_data->mode = mode; in test_callback()
64 gpio_init_callback(&drv_data->gpio_cb, callback, BIT(PIN_IN)); in test_callback()
65 rc = gpio_add_callback(dev, &drv_data->gpio_cb); in test_callback()
66 if (rc == -ENOTSUP) { in test_callback()
77 if (rc == -ENOTSUP) { in test_callback()
93 TC_ERROR("double edge not detected\n"); in test_callback()
100 TC_ERROR("edge not trigger callback correctly\n"); in test_callback()
112 gpio_remove_callback(dev, &drv_data->gpio_cb); in test_callback()
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/Zephyr-Core-3.5.0/dts/bindings/mtd/
Dnordic,qspi-nor.yaml2 # SPDX-License-Identifier: Apache-2.0
7 compatible: "nordic,qspi-nor"
9 include: [base.yaml, "jedec,spi-nor-common.yaml"]
11 on-bus: qspi
17 jedec-id:
23 The size in bits. Set this or size-in-bytes, but not both.
25 size-in-bytes:
31 quad-enable-requirements:
37 - "fastread" # Single data line SPI, FAST_READ (0x0B)
38 - "read2o" # Dual data line SPI, READ2O (0x3B)
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/Zephyr-Core-3.5.0/drivers/adc/
Dadc_ads7052.c5 * SPDX-License-Identifier: Apache-2.0
43 const struct ads7052_config *config = dev->config; in adc_ads7052_channel_setup()
45 if (channel_cfg->gain != ADC_GAIN_1) { in adc_ads7052_channel_setup()
46 LOG_ERR("unsupported channel gain '%d'", channel_cfg->gain); in adc_ads7052_channel_setup()
47 return -ENOTSUP; in adc_ads7052_channel_setup()
50 if (channel_cfg->reference != ADC_REF_VDD_1) { in adc_ads7052_channel_setup()
51 LOG_ERR("unsupported channel reference '%d'", channel_cfg->reference); in adc_ads7052_channel_setup()
52 return -ENOTSUP; in adc_ads7052_channel_setup()
55 if (channel_cfg->acquisition_time != ADC_ACQ_TIME_DEFAULT) { in adc_ads7052_channel_setup()
56 LOG_ERR("unsupported acquisition_time '%d'", channel_cfg->acquisition_time); in adc_ads7052_channel_setup()
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/Zephyr-Core-3.5.0/drivers/gpio/
Dgpio_xlnx_ps_bank.c6 * SPDX-License-Identifier: Apache-2.0
31 * - Pull up
32 * - Pull down
33 * - Open drain
34 * - Open source.
42 * -EINVAL if the specified pin index is out of range,
43 * -ENOTSUP if the pin configuration data contains a flag
50 const struct gpio_xlnx_ps_bank_dev_cfg *dev_conf = dev->config; in gpio_xlnx_ps_pin_configure()
60 return -ENOTSUP; in gpio_xlnx_ps_pin_configure()
84 * -> Write the initial output value into the data register. in gpio_xlnx_ps_pin_configure()
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Dgpio_pca953x.c9 * SPDX-License-Identifier: Apache-2.0
46 uint8_t falling; member
83 const struct pca953x_config *cfg = dev->config; in update_input()
84 struct pca953x_drv_data *drv_data = dev->data; in update_input()
88 rc = i2c_reg_read_byte_dt(&cfg->i2c, PCA953X_INPUT_PORT, &input_states); in update_input()
91 drv_data->pin_state.input = input_states; in update_input()
107 struct pca953x_drv_data *drv_data = dev->data; in gpio_pca953x_handle_interrupt()
108 struct pca953x_irq_state *irq_state = &drv_data->irq_state; in gpio_pca953x_handle_interrupt()
115 k_sem_take(&drv_data->lock, K_FOREVER); in gpio_pca953x_handle_interrupt()
118 if (!irq_state->rising && !irq_state->falling) { in gpio_pca953x_handle_interrupt()
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Dgpio_ifx_cat1.c5 * SPDX-License-Identifier: Apache-2.0
12 * - Trigger detection on pin rising or falling edge (GPIO_INT_TRIG_BOTH)
55 (dev)->config)->regs - CY_GPIO_BASE) / GPIO_PRT_SECTION_SIZE)
113 return -ENOTSUP; in gpio_cat1_configure()
130 return (status == CY_RSLT_SUCCESS) ? 0 : -EIO; in gpio_cat1_configure()
137 const struct gpio_cat1_config *const cfg = dev->config; in gpio_cat1_port_get_raw()
138 GPIO_PRT_Type *const base = cfg->regs; in gpio_cat1_port_get_raw()
148 const struct gpio_cat1_config *const cfg = dev->config; in gpio_cat1_port_set_masked_raw()
149 GPIO_PRT_Type *const base = cfg->regs; in gpio_cat1_port_set_masked_raw()
159 const struct gpio_cat1_config *const cfg = dev->config; in gpio_cat1_port_set_bits_raw()
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/Zephyr-Core-3.5.0/dts/bindings/sensor/
Dst,stm32-qdec.yaml2 # SPDX-License-Identifier: Apache-2.0
6 compatible: "st,stm32-qdec"
9 - name: base.yaml
10 - name: pinctrl-device.yaml
13 pinctrl-0:
16 pinctrl-names:
19 st,input-polarity-inverted:
21 description: Encoder is triggered by a falling edge on the input pin
23 st,input-filter-level:
50 - 0 # No filter
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Despressif,esp32-pcnt.yaml2 # SPDX-License-Identifier: Apache-2.0
9 rising and/or falling edges of an input signal.
14 Each pulse counter unit has a 16-bit signed counter register.
29 Example: Use PCNT to read a rotary-enconder
38 bias-pull-up;
43 Note: Check espressif,esp32-pinctrl.yaml for complete documentation regarding pinctrl.
48 pinctrl-0 = <&pcnt_default>;
49 pinctrl-names = "default";
51 #address-cells = <1>;
52 #size-cells = <0>;
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/Zephyr-Core-3.5.0/drivers/sensor/nuvoton_tach_npcx/
Dtach_nuvoton_npcx.c4 * SPDX-License-Identifier: Apache-2.0
19 * | | +-----------+ TA Pin
20 * +-----------+ | +-----+-----+ | _ _ | |
21 * APB_CLK-->| Prescaler |--->|---+--->| Counter 1 |<--| _| |_| |_ |<--+
22 * +-----------+ | | +-----------+ +-----------+
23 * | CLK_SEL Edge Detection
25 * LFCLK--------------------->| | +-----------+ TB Pin
26 * | +-----+-----+ | _ _ | |
27 * |---+--->| Counter 2 |<--| _| |_| |_ |<--+
28 * | | +-----------+ +-----------+
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/Zephyr-Core-3.5.0/soc/arm/atmel_sam/common/
Dsoc_sam4l_gpio.c3 * SPDX-License-Identifier: Apache-2.0
7 * @brief Atmel SAM MCU family General-Purpose Input/Output Controller (GPIO)
20 gpio->IERC = mask; in configure_common_attr()
22 /* Configure pull-up(s) */ in configure_common_attr()
24 gpio->PUERS = mask; in configure_common_attr()
26 gpio->PUERC = mask; in configure_common_attr()
29 /* Configure pull-down(s) */ in configure_common_attr()
31 gpio->PDERS = mask; in configure_common_attr()
33 gpio->PDERC = mask; in configure_common_attr()
36 /* Configure open drain (multi-drive) */ in configure_common_attr()
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