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/Zephyr-Core-3.6.0/dts/bindings/lora/
Dsemtech,sx127x-base.yaml3 # SPDX-License-Identifier: Apache-2.0
5 include: spi-device.yaml
8 reset-gpios:
9 type: phandle-array
14 This signal is open-drain, active-high (SX1272/3) or
15 active-low (SX1276/7/8/9) as interpreted by the modem.
17 dio-gpios:
18 type: phandle-array
23 These signals are normally active-high.
25 power-amplifier-output:
[all …]
Dsemtech,sx126x-base.yaml3 # SPDX-License-Identifier: Apache-2.0
5 include: spi-device.yaml
8 reset-gpios:
9 type: phandle-array
13 This signal is open-drain, active-low as interpreted by the
16 busy-gpios:
17 type: phandle-array
21 antenna-enable-gpios:
22 type: phandle-array
24 Antenna power enable pin.
[all …]
/Zephyr-Core-3.6.0/tests/subsys/pm/device_driver_init/
Dapp.overlay3 compatible = "power-domain-gpio";
4 enable-gpios = <&gpio0 0 0>;
8 compatible = "power-domain-gpio";
9 enable-gpios = <&gpio0 1 0>;
10 power-domain = <&test_reg>;
14 compatible = "power-domain-gpio";
15 enable-gpios = <&gpio0 2 0>;
16 power-domain = <&test_reg>;
17 zephyr,pm-device-runtime-auto;
21 compatible = "power-domain-gpio";
[all …]
/Zephyr-Core-3.6.0/samples/shields/npm1300_ek/
Dnrf52dk_nrf52832.overlay3 * SPDX-License-Identifier: Apache-2.0
7 bias-pull-up;
12 dvs-gpios = <&gpio0 17 GPIO_ACTIVE_LOW>,
17 regulator-init-microvolt = <2000000>;
21 regulator-init-microvolt = <3300000>;
22 retention-microvolt = <2500000>;
23 enable-gpios = <&npm1300_ek_gpio 1 GPIO_ACTIVE_LOW>;
24 retention-gpios = <&npm1300_ek_gpio 2 GPIO_ACTIVE_HIGH>;
25 pwm-gpios = <&npm1300_ek_gpio 2 GPIO_ACTIVE_LOW>;
29 regulator-initial-mode = <NPM1300_LDSW_MODE_LDO>;
[all …]
/Zephyr-Core-3.6.0/dts/bindings/regulator/
Dnordic,npm1300-regulator.yaml2 # SPDX -License-Identifier: Apache-2.0
16 compatible = "nordic,npm1300-regulator";
33 compatible: "nordic,npm1300-regulator"
38 dvs-gpios:
39 type: phandle-array
41 List of SOC GPIOs connected to PMIC GPIOs.
43 DVS mode 1 will enable the first pin
44 DVS mode 2 will enable the second pin
47 The effect of the mode change is defined by the enable-gpios
50 child-binding:
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Dregulator-gpio.yaml2 # SPDX-License-Identifier: Apache-2.0
5 GPIO-controlled voltage of regulators
8 vccq_sd0: regulator-vccq-sd0 {
9 compatible = "regulator-gpio";
11 regulator-name = "SD0 VccQ";
12 regulator-min-microvolt = <1800000>;
13 regulator-max-microvolt = <3300000>;
15 enable-gpios = <&gpio5 3 GPIO_ACTIVE_HIGH>;
17 gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>, <&gpio5 2 GPIO_ACTIVE_HIGH>;
20 regulator-boot-on;
[all …]
/Zephyr-Core-3.6.0/dts/bindings/auxdisplay/
Dhit,hd44780.yaml4 # SPDX-License-Identifier: Apache-2.0
11 include: [auxdisplay-device.yaml]
17 description: Operating mode of display, 8-bit or 4 for 4-bit mode
19 - 4
20 - 8
22 register-select-gpios:
23 type: phandle-array
27 read-write-gpios:
28 type: phandle-array
31 enable-gpios:
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/Zephyr-Core-3.6.0/drivers/regulator/
Dregulator_gpio.c3 * SPDX-License-Identifier: Apache-2.0
19 const struct gpio_dt_spec *gpios; member
25 const struct gpio_dt_spec enable; member
35 const struct regulator_gpio_config *cfg = dev->config; in regulator_gpio_apply_state()
37 for (unsigned int gpio_idx = 0; gpio_idx < cfg->num_gpios; gpio_idx++) { in regulator_gpio_apply_state()
41 ret = gpio_pin_get_dt(&cfg->gpios[gpio_idx]); in regulator_gpio_apply_state()
43 LOG_ERR("%s: can't get pin state", dev->name); in regulator_gpio_apply_state()
48 ret = gpio_pin_set_dt(&cfg->gpios[gpio_idx], new_state_of_gpio); in regulator_gpio_apply_state()
50 LOG_ERR("%s: can't set pin state", dev->name); in regulator_gpio_apply_state()
61 const struct regulator_gpio_config *cfg = dev->config; in regulator_gpio_enable()
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/Zephyr-Core-3.6.0/boards/shields/semtech_sx1262mb2das/
Dsemtech_sx1262mb2das.overlay3 * SPDX-License-Identifier: Apache-2.0
15 cs-gpios = <&arduino_header 13 GPIO_ACTIVE_LOW>;
20 spi-max-frequency = <16000000>;
22 reset-gpios = <&arduino_header 0 GPIO_ACTIVE_LOW>;
23 busy-gpios = <&arduino_header 9 GPIO_ACTIVE_HIGH>;
24 antenna-enable-gpios = <&arduino_header 14 GPIO_ACTIVE_HIGH>;
25 dio1-gpios = <&arduino_header 11 GPIO_ACTIVE_HIGH>;
26 dio2-tx-enable;
27 tcxo-power-startup-delay-ms = <5>;
/Zephyr-Core-3.6.0/tests/subsys/pm/device_power_domains/
Dapp.overlay3 compatible = "power-domain-gpio";
4 enable-gpios = <&gpio0 0 0>;
8 compatible = "power-domain-gpio";
9 enable-gpios = <&gpio0 1 0>;
13 compatible = "power-domain-gpio";
14 enable-gpios = <&gpio0 2 0>;
15 power-domain = <&test_reg_0>;
19 compatible = "test-device-pm";
21 power-domain = <&test_reg_1>;
22 alternate-domain = <&test_reg_chained>;
/Zephyr-Core-3.6.0/boards/arm/hexiwear_k64/
Dhexiwear_k64.dts1 /* SPDX-License-Identifier: Apache-2.0 */
3 /dts-v1/;
6 #include <zephyr/dt-bindings/pwm/pwm.h>
7 #include "hexiwear_k64-pinctrl.dtsi"
17 pwm-led0 = &green_pwm_led;
18 red-pwm-led = &red_pwm_led;
19 green-pwm-led = &green_pwm_led;
20 blue-pwm-led = &blue_pwm_led;
28 zephyr,code-partition = &slot0_partition;
30 zephyr,shell-uart = &uart0;
[all …]
/Zephyr-Core-3.6.0/boards/arm/efr32_thunderboard/
Defr32bg22_brd4184b.dts5 * SPDX-License-Identifier: Apache-2.0
8 /dts-v1/;
10 #include <silabs/efr32bg2x-pinctrl.dtsi>
20 gpios = <&gpiob GECKO_PIN(3) GPIO_ACTIVE_LOW>;
24 gpios = <&gpioa GECKO_PIN(4) GPIO_ACTIVE_HIGH>;
28 enable-gpios = <&gpioc GECKO_PIN(6) GPIO_ACTIVE_HIGH>;
32 enable-gpios = <&gpioc GECKO_PIN(7) GPIO_ACTIVE_HIGH>;
Defr32bg27_brd2602a.dts4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
9 #include <silabs/efr32bg2x-pinctrl.dtsi>
13 model = "Silicon Labs EFR32BG27C140F768IM40 Thunderboard-style board";
21 spi-flash0 = &mx25r80;
25 mcuboot-led0 = &led0;
26 mcuboot-button0 = &button0;
30 zephyr,code-partition = &slot0_partition;
40 read-only;
45 label = "image-0";
[all …]
/Zephyr-Core-3.6.0/boards/arm/96b_wistrio/
D96b_wistrio.dts4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
8 #include <st/l1/stm32l151Xb-a.dtsi>
9 #include <st/l1/stm32l151c(6-8-b)uxa-pinctrl.dtsi>
18 zephyr,shell-uart = &usart1;
24 compatible = "gpio-leds";
26 gpios = <&gpioa 12 GPIO_ACTIVE_LOW>;
30 gpios = <&gpiob 4 GPIO_ACTIVE_LOW>;
37 eeprom-0 = &eeprom;
42 rf_switch: rf-switch {
[all …]
/Zephyr-Core-3.6.0/boards/shields/g1120b0mipi/
Dg1120b0mipi.overlay4 * SPDX-License-Identifier: Apache-2.0
12 en_mipi_display_g1120b0mipi: enable-mipi-display {
13 compatible = "regulator-fixed";
14 regulator-name = "en_mipi_display";
15 enable-gpios = <&nxp_mipi_connector 32 GPIO_ACTIVE_HIGH>;
16 regulator-boot-on;
20 compatible = "zephyr,lvgl-pointer-input";
22 invert-y;
30 * Note- the actual controller present on this IC is a FT3267,
35 int-gpios = <&nxp_mipi_connector 29 GPIO_ACTIVE_LOW>;
[all …]
/Zephyr-Core-3.6.0/dts/bindings/misc/
Dzephyr,modbus-serial.yaml2 # SPDX-License-Identifier: Apache-2.0
6 compatible: "zephyr,modbus-serial"
8 include: uart-device.yaml
11 de-gpios:
12 type: phandle-array
13 description: Driver enable pin.
15 Driver enable pin (DE) of the RS-485 transceiver.
19 re-gpios:
20 type: phandle-array
21 description: Receiver enable pin.
[all …]
/Zephyr-Core-3.6.0/boards/arm/thingy52_nrf52832/
Dthingy52_nrf52832.dts6 * SPDX-License-Identifier: Apache-2.0
9 /dts-v1/;
11 #include "thingy52_nrf52832-pinctrl.dtsi"
12 #include <zephyr/dt-bindings/input/input-event-codes.h>
16 compatible = "nordic,thingy52-nrf52832";
20 zephyr,shell-uart = &uart0;
21 zephyr,bt-mon-uart = &uart0;
22 zephyr,bt-c2h-uart = &uart0;
25 zephyr,code-partition = &slot0_partition;
39 compatible = "gpio-leds";
[all …]
/Zephyr-Core-3.6.0/tests/drivers/regulator/fixed/dts/bindings/
Dtest-regulator-fixed.yaml2 # SPDX-License-Identifier: Apache-2.0
8 compatible: "test-regulator-fixed"
11 check-gpios:
12 type: phandle-array
16 regulator enable-gpios property. This is used to confirm that signal's
20 of the flags cell in the regulator's enable-gpios property, and the
/Zephyr-Core-3.6.0/tests/drivers/build_all/adc/boards/
Dnative_sim.overlay4 * SPDX-License-Identifier: Apache-2.0
9 * with real-world devicetree nodes, to allow these tests to run on
15 #address-cells = <1>;
16 #size-cells = <1>;
19 compatible = "zephyr,adc-emul";
21 ref-internal-mv = <3300>;
22 ref-external1-mv = <5000>;
23 #io-channel-cells = <1>;
29 gpio-controller;
31 #gpio-cells = <0x2>;
[all …]
/Zephyr-Core-3.6.0/boards/arm/qomu/
Dqomu.dts4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
9 #include <zephyr/dt-bindings/pinctrl/quicklogic-eos-s3-pinctrl.h>
10 #include <zephyr/dt-bindings/input/input-event-codes.h>
19 zephyr,shell-uart = &uart1;
20 zephyr,uart-pipe = &uart1;
31 compatible = "gpio-leds";
33 gpios = <&gpio 3 GPIO_ACTIVE_HIGH>;
38 gpios = <&gpio 0 GPIO_ACTIVE_HIGH>;
43 gpios = <&gpio 0 GPIO_ACTIVE_HIGH>;
[all …]
/Zephyr-Core-3.6.0/boards/arm/vmu_rt1170/
Dvmu_rt1170.dts4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
10 #include <zephyr/dt-bindings/led/led.h>
30 zephyr,shell-uart = &lpuart1;
32 zephyr,flash-controller = &mx25um51345g;
34 zephyr,code-partition = &slot0_partition;
38 reg-3v3-sdcard {
39 compatible = "regulator-fixed";
40 regulator-name = "reg-3v3-sdcard";
41 enable-gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;
[all …]
/Zephyr-Core-3.6.0/samples/net/wifi/boards/
Dreel_board.overlay4 * SPDX-License-Identifier: Apache-2.0
21 low-power-enable;
28 cs-gpios = <&gpio1 3 GPIO_ACTIVE_LOW>;
29 pinctrl-0 = <&spi3_default_alt>;
30 pinctrl-1 = <&spi3_sleep_alt>;
31 pinctrl-names = "default", "sleep";
37 spi-max-frequency = <4000000>;
38 irq-gpios = <&gpio1 7 1>;
39 reset-gpios = <&gpio1 8 1>;
40 enable-gpios = <&gpio1 12 0>;
/Zephyr-Core-3.6.0/boards/arm/bt610/
Dbt610.dts4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
9 #include "bt610-pinctrl.dtsi"
10 #include <zephyr/dt-bindings/input/input-event-codes.h>
18 zephyr,shell-uart = &uart0;
19 zephyr,uart-mcumgr = &uart0;
20 zephyr,bt-mon-uart = &uart0;
21 zephyr,bt-c2h-uart = &uart0;
24 zephyr,code-partition = &slot0_partition;
29 compatible = "gpio-leds";
[all …]
/Zephyr-Core-3.6.0/dts/bindings/gpio/
Dinfineon,tle9104.yaml4 # SPDX-License-Identifier: Apache-2.0
7 description: Infineon TLE9104 4-channel powertrain switch
11 include: [gpio-controller.yaml, spi-device.yaml]
14 "#gpio-cells":
21 description: Number of GPIOs supported
23 en-gpios:
24 type: phandle-array
25 description: "GPIO for enable"
27 resn-gpios:
28 type: phandle-array
[all …]
/Zephyr-Core-3.6.0/boards/arm/particle_boron/
Dparticle_boron.dts4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
9 #include <zephyr/dt-bindings/gpio/gpio.h>
11 #include "particle_boron-pinctrl.dtsi"
19 vctl1-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
21 * single inverter gate -- requires a definition below,
23 vctl2-gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>;
27 en_buff_pwr: enable-buff-pwr {
28 compatible = "regulator-fixed";
29 regulator-name = "en_buff_pwr";
[all …]

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