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/Zephyr-Core-3.5.0/drivers/dai/intel/dmic/
Ddmic.c24 #include "dmic.h"
30 /* global data shared between all dmic instances */
37 int dai_dmic_set_config_nhlt(struct dai_intel_dmic *dmic, const void *spec_config);
115 static void dai_dmic_update_bits(const struct dai_intel_dmic *dmic, in dai_dmic_update_bits() argument
118 uint32_t dest = dmic->reg_base + reg; in dai_dmic_update_bits()
121 dmic->reg_base, reg, mask, val); in dai_dmic_update_bits()
126 static inline void dai_dmic_write(const struct dai_intel_dmic *dmic, in dai_dmic_write() argument
129 sys_write32(val, dmic->reg_base + reg); in dai_dmic_write()
132 static inline uint32_t dai_dmic_read(const struct dai_intel_dmic *dmic, in dai_dmic_read() argument
135 return sys_read32(dmic->reg_base + reg); in dai_dmic_read()
[all …]
Ddmic_nhlt.c17 #include "dmic.h"
26 static inline void dai_dmic_write(const struct dai_intel_dmic *dmic, in dai_dmic_write() argument
29 sys_write32(val, dmic->reg_base + reg); in dai_dmic_write()
32 static inline uint32_t dai_dmic_read(const struct dai_intel_dmic *dmic, uint32_t reg) in dai_dmic_read() argument
34 return sys_read32(dmic->reg_base + reg); in dai_dmic_read()
57 static void dai_dmic_write_coeff(const struct dai_intel_dmic *dmic, uint32_t base, in dai_dmic_write_coeff() argument
65 dai_dmic_write(dmic, base, *coeff++); in dai_dmic_write_coeff()
76 dai_dmic_write(dmic, base, coeff_val); in dai_dmic_write_coeff()
89 static const uint32_t *dai_dmic_configure_coeff(const struct dai_intel_dmic *dmic, in dai_dmic_configure_coeff() argument
118 if (dmic->dai_config_params.dai_index == 0) { in dai_dmic_configure_coeff()
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DKconfig.dmic1 # SOF DMIC configuration options
26 bool "Use NHLT DMIC blob"
45 bool "Use DMIC ownership claim/release"
49 dmic ownership must be claimed before use of dmic
52 bool "Use DMIC sync for multiple lines"
56 dmic sync registers must be set before use of dmic
63 int "Number of stream FIFOs in DMIC controller"
67 int "IO Clock value for DMIC"
74 DMIC sync period used for:
DCMakeLists.txt4 zephyr_library_sources_ifdef(CONFIG_DAI_INTEL_DMIC dmic.c)
Ddmic.h145 /* Common data for all DMIC DAI instances */
167 struct dai_dmic_plat_fifo_data fifo; /* dmic capture fifo stream */
Ddmic_nhlt.h11 /* For NHLT DMIC configuration parsing */
/Zephyr-Core-3.5.0/samples/drivers/audio/dmic/
Dsample.yaml2 name: DMIC sample
4 sample.drivers.audio.dmic:
5 tags: dmic
15 - "DMIC sample"
DREADME.rst1 .. zephyr:code-sample:: dmic
2 :name: Digital Microphone (DMIC)
10 This is a very simple application intended to show how to use the :ref:`Audio DMIC
27 The code can be found in :zephyr_file:`samples/drivers/audio/dmic`.
32 :zephyr-app: samples/drivers/audio/dmic
DCMakeLists.txt6 project(dmic) project
/Zephyr-Core-3.5.0/dts/bindings/dai/
Dintel,adsp-dmic-vss.yaml5 description: Intel DMIC Vendor SHIM controller
7 compatible: "intel,adsp-dmic-vss"
Dintel,dai-dmic.yaml4 description: Intel Digital PDM Microphone (DMIC) node
6 compatible: "intel,dai-dmic"
/Zephyr-Core-3.5.0/dts/bindings/dma/
Dintel,adsp-hda-dmic-cap.yaml5 description: Intel HDA DMIC Capabilities controller
7 compatible: "intel,adsp-hda-dmic-cap"
/Zephyr-Core-3.5.0/include/zephyr/audio/
Ddmic.h43 * DMIC driver states
54 * DMIC driver trigger commands
120 /** SLAB for DMIC driver to allocate buffers for stream */
173 * Input configuration structure for the DMIC configuration API
186 * Function pointers for the DMIC driver operations
255 * Configure the DMIC driver and controller(s)
257 * Configures the DMIC driver device according to the number of channels,
260 * @param dev Pointer to the device structure for DMIC driver instance
261 * @param cfg Pointer to the structure containing the DMIC configuration
275 * Send a command to the DMIC driver
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/Zephyr-Core-3.5.0/doc/hardware/peripherals/audio/
Ddmic.rst3 Digital Microphone (DMIC)
9 The audio DMIC interface provides access to digital microphones.
Dindex.rst10 dmic.rst
/Zephyr-Core-3.5.0/drivers/dai/
DKconfig30 source "drivers/dai/intel/dmic/Kconfig.dmic"
DCMakeLists.txt5 add_subdirectory_ifdef(CONFIG_DAI_INTEL_DMIC intel/dmic)
/Zephyr-Core-3.5.0/soc/xtensa/intel_adsp/ace/include/intel_ace20_lnl/
Ddmic_regs_ace2x.h11 /* DMIC Link Synchronization */
27 /* DMIC Link Control */
/Zephyr-Core-3.5.0/soc/xtensa/intel_adsp/ace/include/intel_ace15_mtpm/
Ddmic_regs_ace1x.h54 /* DMIC Sync Period */
130 /* DMIC Link Control
/Zephyr-Core-3.5.0/samples/drivers/audio/dmic/src/
Dmain.c8 #include <zephyr/audio/dmic.h>
81 LOG_INF("DMIC sample"); in main()
/Zephyr-Core-3.5.0/drivers/audio/
Dmpxxdtyy.h10 #include <zephyr/audio/dmic.h>
/Zephyr-Core-3.5.0/soc/xtensa/intel_adsp/ace/include/
Ddmic_regs.h11 /* DMIC timestamping registers */
64 /* DMIC register offsets */
254 /* Indicates the PDM DMIC clock for the decimator will be sourced from external component instead
255 * of using the PDM DMIC clock generator output
/Zephyr-Core-3.5.0/soc/xtensa/intel_adsp/cavs/include/intel_tgl_adsp/
Ddmic_regs.h11 /* DMIC timestamping registers */
61 /* DMIC register offsets */
331 /* DMIC Link Control
/Zephyr-Core-3.5.0/include/zephyr/drivers/
Ddai.h21 * It supports also DMIC, HDA and SDW backends. The API has a config function
48 DAI_INTEL_DMIC, /**< Intel DMIC */
55 DAI_AMD_DMIC, /**< Amd DMIC */
222 /** Type of the DAI (SSP, DMIC, HDA, etc.). */
/Zephyr-Core-3.5.0/samples/shields/x_nucleo_iks02a1/microphone/src/
Dmain.c11 #include <zephyr/audio/dmic.h>

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