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/Zephyr-Core-3.5.0/drivers/dma/
Ddmamux_stm32.c116 #if defined(CONFIG_DMA_STM32_BDMA) && DT_NODE_HAS_STATUS(DT_NODELABEL(dmamux2), okay)
117 static const struct dmamux_stm32_dma_fops dmamux2 = { variable
134 #if DT_NODE_HAS_STATUS(DT_NODELABEL(dmamux2), okay) in get_dma_fops()
135 if (dev_config->base == DT_REG_ADDR(DT_NODELABEL(dmamux2))) { in get_dma_fops()
136 return &dmamux2; in get_dma_fops()
138 #endif /* DT_NODE_HAS_STATUS(DT_NODELABEL(dmamux2), okay) */ in get_dma_fops()
297 /* DMA 1 and DMA2 for DMAMUX1, BDMA for DMAMUX2 */ in dmamux_stm32_init()
313 #if DT_NODE_HAS_STATUS(DT_NODELABEL(dmamux2), okay) && DT_NODE_HAS_STATUS(DT_NODELABEL(bdma1), okay) in dmamux_stm32_init()
314 if (config->base == DT_REG_ADDR(DT_NODELABEL(dmamux2))) { in dmamux_stm32_init()
375 * H7 series implements DMAMUX1 and DMAMUX2
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/Zephyr-Core-3.5.0/tests/drivers/dma/loop_transfer/boards/
Dnucleo_h743zi.overlay28 test_dma1: &dmamux2 {
/Zephyr-Core-3.5.0/tests/drivers/dma/chan_blen_transfer/boards/
Dnucleo_h743zi.overlay30 test_dma1: &dmamux2 {
/Zephyr-Core-3.5.0/dts/bindings/dma/
Dst,stm32-bdma.yaml57 using dmamux2
60 dmas = < &dmamux2 0 17 0x2C80 >;
/Zephyr-Core-3.5.0/dts/arm/st/h7/
Dstm32h743.dtsi28 dmamux2: dmamux@58025800 { label
Dstm32h750.dtsi28 dmamux2: dmamux@58025800 { label
Dstm32h745.dtsi35 dmamux2: dmamux@58025800 { label
Dstm32h7a3.dtsi31 dmamux2: dmamux@58025800 { label
Dstm32h723.dtsi62 dmamux2: dmamux@58025800 { label
Dstm32h7.dtsi928 dmamux2: dmamux@58025800 { label
933 /* dmamux2 has no dedicated clock, so we enable bdma clock */