Searched full:dma1 (Results 1 – 25 of 148) sorted by relevance
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| /Zephyr-Core-3.5.0/tests/drivers/uart/uart_async_api/boards/ |
| D | nucleo_f103rb.overlay | 5 dmas = <&dma1 4 (STM32_DMA_PERIPH_TX | STM32_DMA_PRIORITY_HIGH)>,
6 <&dma1 5 (STM32_DMA_PERIPH_RX | STM32_DMA_PRIORITY_HIGH)>;
10 &dma1 {
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| D | stm32f3_disco.overlay | 4 dmas = <&dma1 7 STM32_DMA_PERIPH_TX>,
5 <&dma1 6 STM32_DMA_PERIPH_RX>;
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| D | xmc45_relax_kit.overlay | 13 dmas = <&dma1 1 0 XMC4XXX_SET_CONFIG(10,6)>, <&dma1 2 0 XMC4XXX_SET_CONFIG(11,6)>;
32 &dma1 {
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| D | nucleo_l152re.overlay | 7 dmas = <&dma1 2 (STM32_DMA_PERIPH_TX | STM32_DMA_PRIORITY_HIGH)>,
8 <&dma1 3 (STM32_DMA_PERIPH_RX | STM32_DMA_PRIORITY_HIGH)>;
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| /Zephyr-Core-3.5.0/tests/drivers/spi/spi_loopback/boards/ |
| D | nucleo_l476rg.overlay | 8 dmas = <&dma1 3 1 (STM32_DMA_PERIPH_TX | STM32_DMA_PRIORITY_HIGH)
9 &dma1 2 1 (STM32_DMA_PERIPH_RX | STM32_DMA_PRIORITY_HIGH)>;
23 &dma1 {
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| D | nucleo_l152re.overlay | 11 dmas = <&dma1 3 (STM32_DMA_PERIPH_TX | STM32_DMA_PRIORITY_HIGH)
12 &dma1 2 (STM32_DMA_PERIPH_RX | STM32_DMA_PRIORITY_HIGH)>;
27 &dma1 {
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| D | gd32f407v_start.overlay | 9 &dma1 {
29 dmas = <&dma1 0 3 0 0>, <&dma1 5 3 0 0>;
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| D | gd32f450i_eval.overlay | 9 &dma1 {
29 dmas = <&dma1 0 3 0 0>, <&dma1 5 3 0 0>;
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| D | gd32f450v_start.overlay | 9 &dma1 {
29 dmas = <&dma1 0 3 0 0>, <&dma1 5 3 0 0>;
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| D | gd32f450z_eval.overlay | 9 &dma1 {
29 dmas = <&dma1 0 3 0 0>, <&dma1 5 3 0 0>;
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| D | gd32f470i_eval.overlay | 9 &dma1 {
29 dmas = <&dma1 0 3 0 0>, <&dma1 5 3 0 0>;
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| /Zephyr-Core-3.5.0/samples/drivers/led_ws2812/boards/ |
| D | nucleo_f070rb.overlay | 12 dmas = <&dma1 3 (STM32_DMA_PERIPH_TX | STM32_DMA_PRIORITY_HIGH)>,
13 <&dma1 2 (STM32_DMA_PERIPH_RX | STM32_DMA_PRIORITY_HIGH)>;
37 &dma1 {
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| /Zephyr-Core-3.5.0/dts/arm/st/f4/ |
| D | stm32f401.dtsi | 58 dmas = <&dma1 4 0 0x400 0x3
59 &dma1 3 0 0x400 0x3>;
71 dmas = <&dma1 5 0 0x400 0x3
72 &dma1 0 0 0x400 0x3>;
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| /Zephyr-Core-3.5.0/samples/drivers/spi_flash/boards/ |
| D | stm32l562e_dk.overlay | 8 dmas = <&dma1 0 41 0x480>; /* request 41 for OCTOSPI1 */
12 &dma1 {
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| /Zephyr-Core-3.5.0/include/zephyr/devicetree/ |
| D | dma.h | 31 * dma1: dma@... { ... };
36 * dmas = <&dma1 1 2 0x400 0x3>,
42 * DT_DMAS_CTLR_BY_IDX(DT_NODELABEL(n), 0) // DT_NODELABEL(dma1)
59 * dma1: dma@... { ... };
64 * dmas = <&dma1 1 2 0x400 0x3>,
71 * DT_DMAS_CTLR_BY_NAME(DT_NODELABEL(n), tx) // DT_NODELABEL(dma1)
131 * dma1: dma@... {
142 * dmas = <&dma1 1 0x400>,
184 * dma1: dma@... {
195 * dmas = <&dma1 1 0x400>,
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| /Zephyr-Core-3.5.0/dts/bindings/ospi/ |
| D | st,stm32-ospi.yaml | 15 dmas = <&dma1 5 41 0x10000>;
47 dmas = <&dma1 5 41 0x10000>;
50 - &dma1: dma controller phandle
64 dmas = <&dma1 5 41 0x10000>;
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| /Zephyr-Core-3.5.0/dts/bindings/dma/ |
| D | st,stm32-dma-v2bis.yaml | 53 dma1: dma-controller@40020400 {
60 For the client part, example for stm32f103 on DMA1 instance
65 dmas = <&dma1 3 (STM32_DMA_PERIPH_TX | STM32_DMA_PRIORITY_HIGH)>,
66 <&dma1 2 (STM32_DMA_PERIPH_RX | STM32_DMA_PRIORITY_HIGH)>;
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| D | gd,gd32-dma-v1.yaml | 64 dmas = <&dma1 0 3 0 0>, <&dma1 5 3 GD32_DMA_PRIORITY_HIGH 0>
68 "spi0" uses dma1 for transmitting and receiving in the example.
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| /Zephyr-Core-3.5.0/dts/bindings/spi/ |
| D | infineon,xmc4xxx-spi.yaml | 46 dmas = <&dma1 1 0 XMC4XXX_SET_CONFIG(10,6)>, <&dma1 2 0 XMC4XXX_SET_CONFIG(11,6)>;
55 dma1 can connect to lines [8, 11].
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| /Zephyr-Core-3.5.0/tests/drivers/dma/chan_blen_transfer/boards/ |
| D | nucleo_f070rb.overlay | 7 test_dma0: &dma1 {
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| D | nucleo_l152re.overlay | 7 test_dma0: &dma1 { };
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| D | disco_l475_iot1.overlay | 7 test_dma0: &dma1 { };
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| /Zephyr-Core-3.5.0/tests/drivers/dma/loop_transfer/boards/ |
| D | nucleo_f070rb.overlay | 7 test_dma0: &dma1 {
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| D | nucleo_l152re.overlay | 7 test_dma0: &dma1 { };
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| D | stm32f3_disco.overlay | 7 test_dma0: &dma1 { };
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