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Searched +full:dma +full:- +full:clk (Results 1 – 25 of 81) sorted by relevance

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/Zephyr-Core-3.5.0/dts/arm/st/f1/
Dstm32f107.dtsi2 * Copyright (c) 2017 I-SENSE group of ICCS
4 * SPDX-License-Identifier: Apache-2.0
11 compatible = "st,stm32f107", "st,stm32f1", "simple-bus";
13 dma2: dma@40020400 {
14 compatible = "st,stm32-dma-v2bis";
15 #dma-cells = <2>;
23 compatible = "st,stm32-ethernet";
26 clock-names = "stmmaceth", "mac-clk-tx",
27 "mac-clk-rx";
/Zephyr-Core-3.5.0/dts/bindings/spi/
Despressif,esp32-spi.yaml3 compatible: "espressif,esp32-spi"
5 include: [spi-controller.yaml, pinctrl-device.yaml]
11 pinctrl-0:
14 pinctrl-names:
17 half-duplex:
20 Enable half-duplex communication mode.
24 dummy-comp:
31 Enable 3-wire mode
35 dma-enabled:
37 description: Enable SPI DMA support
[all …]
/Zephyr-Core-3.5.0/dts/arm/nxp/
Dnxp_lpc55S6x_common.dtsi4 * SPDX-License-Identifier: Apache-2.0
8 #include <zephyr/dt-bindings/adc/adc.h>
9 #include <zephyr/dt-bindings/clock/mcux_lpc_syscon_clock.h>
10 #include <zephyr/dt-bindings/gpio/gpio.h>
11 #include <zephyr/dt-bindings/i2c/i2c.h>
12 #include <zephyr/dt-bindings/inputmux/inputmux_trigger_ports.h>
13 #include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
14 #include <arm/armv8-m.dtsi>
22 zephyr,flash-controller = &iap;
26 #address-cells = <1>;
[all …]
Dnxp_rt5xx_common.dtsi2 * Copyright 2022-2023, NXP
4 * SPDX-License-Identifier: Apache-2.0
8 #include <arm/armv8-m.dtsi>
9 #include <zephyr/dt-bindings/adc/adc.h>
10 #include <zephyr/dt-bindings/clock/mcux_lpc_syscon_clock.h>
11 #include <zephyr/dt-bindings/gpio/gpio.h>
12 #include <zephyr/dt-bindings/i2c/i2c.h>
13 #include <zephyr/dt-bindings/mipi_dsi/mipi_dsi.h>
14 #include <zephyr/dt-bindings/inputmux/inputmux_trigger_ports.h>
15 #include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
[all …]
Dnxp_rt6xx_common.dtsi4 * SPDX-License-Identifier: Apache-2.0
8 #include <arm/armv8-m.dtsi>
9 #include <zephyr/dt-bindings/adc/adc.h>
10 #include <zephyr/dt-bindings/clock/mcux_lpc_syscon_clock.h>
11 #include <zephyr/dt-bindings/gpio/gpio.h>
12 #include <zephyr/dt-bindings/i2c/i2c.h>
13 #include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
21 #address-cells = <1>;
22 #size-cells = <0>;
25 compatible = "arm,cortex-m33f";
[all …]
Dnxp_ke1xf.dtsi2 * Copyright (c) 2019-2021 Vestas Wind Systems A/S
4 * SPDX-License-Identifier: Apache-2.0
7 #include <arm/armv7-m.dtsi>
8 #include <zephyr/dt-bindings/adc/adc.h>
9 #include <zephyr/dt-bindings/clock/kinetis_pcc.h>
10 #include <zephyr/dt-bindings/clock/kinetis_scg.h>
11 #include <zephyr/dt-bindings/gpio/gpio.h>
12 #include <zephyr/dt-bindings/i2c/i2c.h>
20 zephyr,flash-controller = &ftfe;
24 #address-cells = <1>;
[all …]
Dnxp_lpc55S2x_common.dtsi4 * SPDX-License-Identifier: Apache-2.0
7 #include <arm/armv8-m.dtsi>
8 #include <zephyr/dt-bindings/adc/adc.h>
9 #include <zephyr/dt-bindings/clock/mcux_lpc_syscon_clock.h>
10 #include <zephyr/dt-bindings/gpio/gpio.h>
11 #include <zephyr/dt-bindings/i2c/i2c.h>
12 #include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
21 zephyr,flash-controller = &iap;
25 #address-cells = <1>;
26 #size-cells = <0>;
[all …]
Dnxp_k66.dtsi4 * SPDX-License-Identifier: Apache-2.0
17 compatible = "nxp,kinetis-lpuart";
22 dma-names = "rx", "tx";
30 interrupt-names = "mb-0-15", "bus-off", "error", "tx-warning",
31 "rx-warning", "wake-up";
33 clk-source = <1>;
34 sample-point = <875>;
/Zephyr-Core-3.5.0/dts/bindings/mmc/
Dst,stm32-sdmmc.yaml3 compatible: "st,stm32-sdmmc"
5 include: [mmc.yaml, pinctrl-device.yaml, reset-device.yaml]
17 pinctrl-0:
20 pinctrl-names:
23 cd-gpios:
24 type: phandle-array
27 pwr-gpios:
28 type: phandle-array
31 bus-width:
38 - 1
[all …]
/Zephyr-Core-3.5.0/tests/drivers/adc/adc_dma/boards/
Dfrdm_k64f.overlay4 * SPDX-License-Identifier: Apache-2.0
7 clk-source = <0>;
8 hw-trigger-src = <4>;
9 continuous-convert;
10 high-speed;
11 periodic-trigger;
15 dma-buf-addr-alignment = <4>;
Dfrdm_k82f.overlay4 * SPDX-License-Identifier: Apache-2.0
7 clk-source = <0>;
8 hw-trigger-src = <4>;
9 continuous-convert;
10 high-speed;
11 periodic-trigger;
15 dma-buf-addr-alignment = <4>;
/Zephyr-Core-3.5.0/dts/arm/st/wb/
Dstm32wb.dtsi5 * SPDX-License-Identifier: Apache-2.0
8 #include <arm/armv7-m.dtsi>
9 #include <zephyr/dt-bindings/clock/stm32wb_clock.h>
10 #include <zephyr/dt-bindings/gpio/gpio.h>
11 #include <zephyr/dt-bindings/i2c/i2c.h>
12 #include <zephyr/dt-bindings/pwm/pwm.h>
13 #include <zephyr/dt-bindings/adc/adc.h>
14 #include <zephyr/dt-bindings/pwm/stm32_pwm.h>
15 #include <zephyr/dt-bindings/dma/stm32_dma.h>
16 #include <zephyr/dt-bindings/adc/stm32l4_adc.h>
[all …]
/Zephyr-Core-3.5.0/dts/arm/st/h5/
Dstm32h5.dtsi4 * SPDX-License-Identifier: Apache-2.0
8 #include <arm/armv8-m.dtsi>
9 #include <zephyr/dt-bindings/adc/adc.h>
10 #include <zephyr/dt-bindings/clock/stm32h5_clock.h>
11 #include <zephyr/dt-bindings/gpio/gpio.h>
12 #include <zephyr/dt-bindings/i2c/i2c.h>
13 #include <zephyr/dt-bindings/reset/stm32h5_reset.h>
14 #include <zephyr/dt-bindings/dma/stm32_dma.h>
15 #include <zephyr/dt-bindings/pwm/pwm.h>
16 #include <zephyr/dt-bindings/adc/stm32l4_adc.h>
[all …]
/Zephyr-Core-3.5.0/dts/arm/st/c0/
Dstm32c0.dtsi4 * SPDX-License-Identifier: Apache-2.0
7 #include <arm/armv6-m.dtsi>
8 #include <zephyr/dt-bindings/adc/adc.h>
9 #include <zephyr/dt-bindings/clock/stm32c0_clock.h>
10 #include <zephyr/dt-bindings/gpio/gpio.h>
11 #include <zephyr/dt-bindings/i2c/i2c.h>
12 #include <zephyr/dt-bindings/pwm/pwm.h>
13 #include <zephyr/dt-bindings/pwm/stm32_pwm.h>
14 #include <zephyr/dt-bindings/adc/stm32l4_adc.h>
15 #include <zephyr/dt-bindings/reset/stm32c0_reset.h>
[all …]
/Zephyr-Core-3.5.0/dts/arm/st/wl/
Dstm32wl.dtsi4 * SPDX-License-Identifier: Apache-2.0
7 #include <arm/armv7-m.dtsi>
8 #include <zephyr/dt-bindings/clock/stm32wl_clock.h>
9 #include <zephyr/dt-bindings/gpio/gpio.h>
10 #include <zephyr/dt-bindings/i2c/i2c.h>
11 #include <zephyr/dt-bindings/lora/sx126x.h>
12 #include <zephyr/dt-bindings/pwm/pwm.h>
13 #include <zephyr/dt-bindings/adc/adc.h>
14 #include <zephyr/dt-bindings/pwm/stm32_pwm.h>
15 #include <zephyr/dt-bindings/dma/stm32_dma.h>
[all …]
/Zephyr-Core-3.5.0/dts/xtensa/intel/
Dintel_adsp_cavs15.dtsi4 * SPDX-License-Identifier: Apache-2.0
12 #address-cells = <1>;
13 #size-cells = <0>;
17 compatible = "cdns,tensilica-xtensa-lx4";
19 i-cache-line-size = <64>;
20 d-cache-line-size = <64>;
25 compatible = "cdns,tensilica-xtensa-lx4";
31 compatible = "mmio-sram";
36 compatible = "mmio-sram";
40 sysclk: system-clock {
[all …]
/Zephyr-Core-3.5.0/dts/arm/st/l0/
Dstm32l0.dtsi5 * SPDX-License-Identifier: Apache-2.0
8 #include <arm/armv6-m.dtsi>
9 #include <zephyr/dt-bindings/clock/stm32l0_clock.h>
10 #include <zephyr/dt-bindings/i2c/i2c.h>
11 #include <zephyr/dt-bindings/gpio/gpio.h>
12 #include <zephyr/dt-bindings/pwm/pwm.h>
13 #include <zephyr/dt-bindings/adc/adc.h>
14 #include <zephyr/dt-bindings/pwm/stm32_pwm.h>
15 #include <zephyr/dt-bindings/dma/stm32_dma.h>
16 #include <zephyr/dt-bindings/adc/stm32l4_adc.h>
[all …]
/Zephyr-Core-3.5.0/dts/arm/st/f0/
Dstm32f0.dtsi5 * SPDX-License-Identifier: Apache-2.0
8 #include <arm/armv6-m.dtsi>
9 #include <zephyr/dt-bindings/clock/stm32f0_clock.h>
10 #include <zephyr/dt-bindings/i2c/i2c.h>
11 #include <zephyr/dt-bindings/gpio/gpio.h>
12 #include <zephyr/dt-bindings/pwm/pwm.h>
13 #include <zephyr/dt-bindings/pwm/stm32_pwm.h>
14 #include <zephyr/dt-bindings/dma/stm32_dma.h>
15 #include <zephyr/dt-bindings/adc/stm32l4_adc.h>
16 #include <zephyr/dt-bindings/reset/stm32f0_1_3_reset.h>
[all …]
/Zephyr-Core-3.5.0/dts/arm/st/l4/
Dstm32l4.dtsi5 * SPDX-License-Identifier: Apache-2.0
9 #include <arm/armv7-m.dtsi>
10 #include <zephyr/dt-bindings/clock/stm32l4_clock.h>
11 #include <zephyr/dt-bindings/i2c/i2c.h>
12 #include <zephyr/dt-bindings/gpio/gpio.h>
13 #include <zephyr/dt-bindings/pwm/pwm.h>
14 #include <zephyr/dt-bindings/adc/adc.h>
15 #include <zephyr/dt-bindings/pwm/stm32_pwm.h>
16 #include <zephyr/dt-bindings/dma/stm32_dma.h>
17 #include <zephyr/dt-bindings/adc/stm32l4_adc.h>
[all …]
/Zephyr-Core-3.5.0/dts/arm/st/g0/
Dstm32g0.dtsi6 * Copyright (c) 2021 G-Technologies Sdn. Bhd.
8 * SPDX-License-Identifier: Apache-2.0
11 #include <arm/armv6-m.dtsi>
12 #include <zephyr/dt-bindings/clock/stm32g0_clock.h>
13 #include <zephyr/dt-bindings/gpio/gpio.h>
14 #include <zephyr/dt-bindings/i2c/i2c.h>
15 #include <zephyr/dt-bindings/pwm/pwm.h>
16 #include <zephyr/dt-bindings/dma/stm32_dma.h>
17 #include <zephyr/dt-bindings/adc/adc.h>
18 #include <zephyr/dt-bindings/adc/stm32l4_adc.h>
[all …]
/Zephyr-Core-3.5.0/dts/xtensa/espressif/esp32s3/
Desp32s3_common.dtsi4 * SPDX-License-Identifier: Apache-2.0
8 #include <zephyr/dt-bindings/adc/adc.h>
9 #include <zephyr/dt-bindings/gpio/gpio.h>
10 #include <zephyr/dt-bindings/i2c/i2c.h>
11 #include <zephyr/dt-bindings/clock/esp32s3_clock.h>
12 #include <zephyr/dt-bindings/interrupt-controller/esp32s3-xtensa-intmux.h>
13 #include <dt-bindings/pinctrl/esp32s3-pinctrl.h>
19 zephyr,flash-controller = &flash;
23 #address-cells = <1>;
24 #size-cells = <0>;
[all …]
/Zephyr-Core-3.5.0/dts/arm/st/l5/
Dstm32l5.dtsi5 * SPDX-License-Identifier: Apache-2.0
9 #include <arm/armv8-m.dtsi>
10 #include <zephyr/dt-bindings/clock/stm32l4_clock.h>
11 #include <zephyr/dt-bindings/gpio/gpio.h>
12 #include <zephyr/dt-bindings/i2c/i2c.h>
13 #include <zephyr/dt-bindings/pwm/pwm.h>
14 #include <zephyr/dt-bindings/pwm/stm32_pwm.h>
15 #include <zephyr/dt-bindings/dma/stm32_dma.h>
16 #include <zephyr/dt-bindings/adc/stm32l4_adc.h>
17 #include <zephyr/dt-bindings/reset/stm32g4_l4_5_reset.h>
[all …]
/Zephyr-Core-3.5.0/dts/arm/st/h7/
Dstm32h7.dtsi6 * SPDX-License-Identifier: Apache-2.0
9 #include <arm/armv7-m.dtsi>
10 #include <zephyr/dt-bindings/clock/stm32h7_clock.h>
11 #include <zephyr/dt-bindings/gpio/gpio.h>
12 #include <zephyr/dt-bindings/i2c/i2c.h>
13 #include <zephyr/dt-bindings/pwm/pwm.h>
14 #include <zephyr/dt-bindings/pwm/stm32_pwm.h>
15 #include <zephyr/dt-bindings/dma/stm32_dma.h>
16 #include <zephyr/dt-bindings/adc/stm32h7_adc.h>
17 #include <zephyr/dt-bindings/reset/stm32h7_reset.h>
[all …]
/Zephyr-Core-3.5.0/drivers/dma/
Ddma_stm32_bdma.c4 * SPDX-License-Identifier: Apache-2.0
15 #include <zephyr/drivers/dma/dma_stm32.h>
16 #include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
220 void stm32_bdma_dump_channel_irq(BDMA_TypeDef *dma, uint32_t id) in stm32_bdma_dump_channel_irq() argument
223 bdma_stm32_is_te_active(dma, id), in stm32_bdma_dump_channel_irq()
224 bdma_stm32_is_ht_active(dma, id), in stm32_bdma_dump_channel_irq()
225 bdma_stm32_is_tc_active(dma, id), in stm32_bdma_dump_channel_irq()
226 bdma_stm32_is_gi_active(dma, id)); in stm32_bdma_dump_channel_irq()
229 inline bool stm32_bdma_is_tc_irq_active(BDMA_TypeDef *dma, uint32_t id) in stm32_bdma_is_tc_irq_active() argument
231 return LL_BDMA_IsEnabledIT_TC(dma, bdma_stm32_id_to_channel(id)) && in stm32_bdma_is_tc_irq_active()
[all …]
Ddmamux_stm32.c5 * SPDX-License-Identifier: Apache-2.0
18 #include <zephyr/drivers/dma.h>
34 /* pointer to the associated dma instance */
36 /* ref of the associated dma stream for this instance */
129 if (dev_config->base == DT_REG_ADDR(DT_NODELABEL(dmamux1))) { in get_dma_fops()
135 if (dev_config->base == DT_REG_ADDR(DT_NODELABEL(dmamux2))) { in get_dma_fops()
140 __ASSERT(false, "Unknown dma base address %x", dev_config->base); in get_dma_fops()
148 const struct dmamux_stm32_config *dev_config = dev->config; in dmamux_stm32_configure()
155 int request_id = config->dma_slot; in dmamux_stm32_configure()
157 if (request_id > dev_config->req_nb + dev_config->gen_nb) { in dmamux_stm32_configure()
[all …]

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