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/Zephyr-latest/dts/bindings/pwm/
Draspberrypi,pico-pwm.yaml2 # SPDX-License-Identifier: Apache-2.0
6 compatible: "raspberrypi,pico-pwm"
8 include: [pwm-controller.yaml, pinctrl-device.yaml, reset-device.yaml, base.yaml]
17 divider-int-0:
20 The integral part of the divider for pwm slice 0.
22 as the integer part of the divider.
26 divider-frac-0:
29 The fractional part of the divider for pwm slice 0.
30 This number should be in the range 0 - 15.
31 When the "divider-int-0" is set to 0 or is not defined, this property will be
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/Zephyr-latest/samples/basic/blinky_pwm/boards/
Drpi_pico.overlay7 divider-frac-4 = <15>;
8 divider-int-4 = <255>;
Dxiao_rp2040.overlay11 divider-frac-4 = <15>;
12 divider-int-4 = <255>;
/Zephyr-latest/drivers/clock_control/
Dclock_control_litex.c4 * SPDX-License-Identifier: Apache-2.0
66 …* https://github.com/Digilent/Zybo-hdmi-out/blob/b991fff6e964420ae3c00c3dbee52f2ad748b3ba/sdk/disp…
213 return litex_clk_filter_table[glob_mul - 1]; in litex_clk_lookup_filter()
219 return litex_clk_lock_table[glob_mul - 1]; in litex_clk_lookup_lock()
234 int assert = (1 << (drp[reg].size * BITS_PER_BYTE)) - 1; in litex_clk_assert_reg()
251 timeout = ldev->timeout.lock; in litex_clk_wait()
253 timeout = ldev->timeout.drdy; in litex_clk_wait()
257 timeout--; in litex_clk_wait()
262 return -ETIME; in litex_clk_wait()
286 /* Get global divider and multiplier values and update global config */
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Dclock_control_litex.h4 * SPDX-License-Identifier: Apache-2.0
28 #define DRP_DRDY 4
64 lcko = &ldev->clkouts[N]; \
65 lcko->id = CLKOUT_ID(N); \
67 lcko->clkout_div = clkout_div; \
68 lcko->def.freq = CLKOUT_FREQ(N); \
69 lcko->def.phase = CLKOUT_PHASE(N); \
70 lcko->def.duty.num = CLKOUT_DUTY_NUM(N); \
71 lcko->def.duty.den = CLKOUT_DUTY_DEN(N); \
72 lcko->margin.m = CLKOUT_MARGIN(N); \
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