Searched full:cpha (Results 1 – 25 of 48) sorted by relevance
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| /Zephyr-Core-3.7.0/tests/drivers/spi/spi_controller_peripheral/ |
| D | Kconfig | 9 0: CPOL 0 (Active high), CPHA 0 (leading)
10 1: CPOL 0 (Active high), CPHA 1 (trailing)
11 2: CPOL 1 (Active low), CPHA 0 (leading)
12 3: CPOL 1 (Active low), CPHA 1 (trailing)
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| D | README.txt | 3 In each test, both instances get identical configuration (CPOL, CPHA, bitrate, etc.).
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| /Zephyr-Core-3.7.0/boards/shields/x_nucleo_bnrg2a1/ |
| D | x_nucleo_bnrg2a1.overlay | 21 spi-cpha; /* CPHA=1 */
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| /Zephyr-Core-3.7.0/dts/bindings/mtd/ |
| D | nordic,qspi-nor.yaml | 82 cpha:
85 Set to indicate phase starts with asserted half-phase (CPHA=1).
92 For this driver using this property requires also using cpha.
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| /Zephyr-Core-3.7.0/dts/bindings/mspi/ |
| D | mspi-device.yaml | 71 MSPI_CPP_MODE_0: CPOL=0, CPHA=0
72 MSPI_CPP_MODE_1: CPOL=0, CPHA=1
73 MSPI_CPP_MODE_2: CPOL=1, CPHA=0
74 MSPI_CPP_MODE_3: CPOL=1, CPHA=1
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| /Zephyr-Core-3.7.0/dts/bindings/spi/ |
| D | nxp,kinetis-dspi.yaml | 54 This field is valid only when the CPHA bit in the CTAR register is 0.
60 supported for CPHA = 1.
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| D | nordic,nrf-spim.yaml | 37 of SCK (leading or trailing, depending on the CPHA setting used) until
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| D | spi-device.yaml | 48 spi-cpha:
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| /Zephyr-Core-3.7.0/samples/subsys/fs/fs_sample/boards/ |
| D | nucleo_f429zi.overlay | 18 spi-clock-mode-cpha;
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| /Zephyr-Core-3.7.0/drivers/spi/ |
| D | spi_sedi.c | 41 uint32_t word_size, cpol, cpha, loopback; in spi_sedi_configure() local
51 /* CPOL and CPHA */ in spi_sedi_configure()
53 cpha = SPI_MODE_GET(config->operation) & SPI_MODE_CPHA; in spi_sedi_configure()
55 if ((cpol == 0) && (cpha == 0)) { in spi_sedi_configure()
58 } else if ((cpol == 0) && (cpha == 1U)) { in spi_sedi_configure()
61 } else if ((cpol == 1) && (cpha == 0U)) { in spi_sedi_configure()
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| D | spi_bitbang.c | 125 int cpha = 0; in spi_bitbang_transceive() local
132 cpha = 1; in spi_bitbang_transceive()
180 if (!loop && do_read && !cpha) { in spi_bitbang_transceive()
189 if (!loop && do_read && cpha) { in spi_bitbang_transceive()
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| D | spi_numaker.c | 41 * CPOL/CPHA = 0/0 --> SPI_MODE_0
42 * CPOL/CPHA = 0/1 --> SPI_MODE_1
43 * CPOL/CPHA = 1/0 --> SPI_MODE_2
44 * CPOL/CPHA = 1/1 --> SPI_MODE_3
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| D | spi_xmc4xxx.c | 196 bool CPHA = SPI_MODE_GET(settings) & SPI_MODE_CPHA; in spi_xmc4xxx_configure() local
235 if (!CPOL && !CPHA) { in spi_xmc4xxx_configure()
237 } else if (!CPOL && CPHA) { in spi_xmc4xxx_configure()
239 } else if (CPOL && !CPHA) { in spi_xmc4xxx_configure()
241 } else if (CPOL && CPHA) { in spi_xmc4xxx_configure()
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| D | spi_xec_qmspi.c | 92 * SPI signalling mode: CPOL and CPHA
94 * CPHA = 0 Transmitter changes data on trailing of preceding clock cycle.
99 * Mode CPOL CPHA
104 * MEC1501 has three controls, CPOL, CPHA for output and CPHA for input.
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| D | spi_rpi_pico_pio.c | 250 uint32_t cpha = 0; in spi_pico_pio_configure() local
307 cpha = 1; in spi_pico_pio_configure()
316 if ((cpol != 0) || (cpha != 0)) { in spi_pico_pio_configure()
433 if ((cpol == 0) && (cpha == 0)) { in spi_pico_pio_configure()
438 } else if ((cpol == 1) && (cpha == 1)) { in spi_pico_pio_configure()
444 LOG_ERR("Not supported: cpol=%d, cpha=%d\n", cpol, cpha); in spi_pico_pio_configure()
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| D | spi_npcx_spip.c | 106 * Set CPOL and CPHA. in spi_npcx_spip_configure()
107 * The following is how to map npcx spip control register to CPOL and CPHA in spi_npcx_spip_configure()
108 * CPOL CPHA | SCIDL SCM in spi_npcx_spip_configure()
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| /Zephyr-Core-3.7.0/samples/drivers/led_strip/boards/ |
| D | mimxrt1050_evk.overlay | 19 spi-cpha;
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| D | mimxrt1050_evk_qspi.overlay | 19 spi-cpha;
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| D | esp32c3_devkitm.overlay | 22 spi-cpha;
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| D | esp32s2_saola.overlay | 22 spi-cpha;
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| D | esp32s3_devkitm_procpu.overlay | 22 spi-cpha;
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| /Zephyr-Core-3.7.0/dts/bindings/sdhc/ |
| D | zephyr,sdhc-spi-slot.yaml | 22 spi-clock-mode-cpha:
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| /Zephyr-Core-3.7.0/dts/bindings/mipi-dbi/ |
| D | mipi-dbi-spi-device.yaml | 26 mipi-cpha:
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| /Zephyr-Core-3.7.0/boards/st/steval_stwinbx1/ |
| D | steval_stwinbx1.dts | 162 spi-cpha; /* CPHA=1 */
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| /Zephyr-Core-3.7.0/boards/segger/ip_k66f/ |
| D | ip_k66f.dts | 143 spi-cpha;
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