| /Zephyr-Core-3.4.0/drivers/counter/ |
| D | Kconfig | 1 # Counter configuration options
6 menuconfig COUNTER config
7 bool "Counter drivers"
9 Enable support for counter and timer.
11 if COUNTER
14 int "Counter init priority"
17 Counter driver device initialization priority.
19 module = COUNTER
20 module-str = counter
23 source "drivers/counter/Kconfig.gecko"
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| D | counter_mchp_xec.c | 11 * @brief Microchip XEC Counter driver
17 * - Interrupts are triggered (if enabled) when the counter
21 * the counter values are changed so that interrupts are triggered
29 #include <zephyr/drivers/counter.h>
63 struct btmr_regs *counter = COUNTER_XEC_REG_BASE(dev); in counter_xec_start() local
65 if (counter->CTRL & MCHP_BTMR_CTRL_ENABLE) { in counter_xec_start()
69 counter->CTRL |= (MCHP_BTMR_CTRL_ENABLE | MCHP_BTMR_CTRL_START); in counter_xec_start()
71 LOG_DBG("%p Counter started", dev); in counter_xec_start()
78 struct btmr_regs *counter = COUNTER_XEC_REG_BASE(dev); in counter_xec_stop() local
81 if (!(counter->CTRL & MCHP_BTMR_CTRL_ENABLE)) { in counter_xec_stop()
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| D | Kconfig.gecko | 1 # Silicon Labs Gecko Counter driver config
7 bool "Silicon Labs Gecko Counter (RTCC) driver"
13 Enable counter driver based on RTCC module for Silicon Labs Gecko
17 bool "Silicon Labs Gecko Counter Sleep Timer driver"
22 Enable the counter driver for Sleep Timer module for Silicon Labs
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| /Zephyr-Core-3.4.0/tests/drivers/counter/counter_basic_api/boards/ |
| D | stm32f4_disco.overlay | 3 counter {
10 counter {
17 counter {
24 counter {
31 counter {
38 counter {
45 counter {
52 counter {
59 counter {
66 counter {
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| D | stm32h747i_disco_m7.overlay | 3 counter {
10 counter {
17 counter {
24 counter {
31 counter {
38 counter {
45 counter {
52 counter {
59 counter {
66 counter {
[all …]
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| D | nucleo_f207zg.overlay | 3 counter {
10 counter {
17 counter {
24 counter {
31 counter {
38 counter {
45 counter {
52 counter {
59 counter {
67 counter {
[all …]
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| D | nucleo_f746zg.overlay | 3 counter {
10 counter {
17 counter {
24 counter {
31 counter {
38 counter {
45 counter {
52 counter {
59 counter {
66 counter {
[all …]
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| D | nucleo_h743zi.overlay | 3 counter {
10 counter {
17 counter {
24 counter {
31 counter {
38 counter {
45 counter {
52 counter {
59 counter {
66 counter {
[all …]
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| D | stm32h573i_dk.overlay | 3 counter {
10 counter {
17 counter {
24 counter {
31 counter {
38 counter {
45 counter {
52 counter {
59 counter {
|
| D | nucleo_l476rg.overlay | 3 counter {
10 counter {
17 counter {
24 counter {
31 counter {
38 counter {
45 counter {
52 counter {
59 counter {
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| D | stm32f3_disco.overlay | 3 counter {
10 counter {
17 counter {
24 counter {
31 counter {
38 counter {
45 counter {
|
| D | stm32l562e_dk.overlay | 3 counter {
10 counter {
17 counter {
25 counter {
32 counter {
39 counter {
46 counter {
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| D | nucleo_f429zi.overlay | 3 counter {
10 counter {
17 counter {
24 counter {
30 counter {
37 counter {
44 counter {
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| D | nucleo_g071rb.overlay | 3 counter {
10 counter {
17 counter {
24 counter {
31 counter {
38 counter {
45 counter {
|
| D | nucleo_g474re.overlay | 3 counter {
10 counter {
17 counter {
24 counter {
31 counter {
38 counter {
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| D | nucleo_l073rz.overlay | 3 counter {
10 counter {
17 counter {
24 counter {
31 counter {
38 counter {
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| D | nucleo_l152re.overlay | 3 counter {
10 counter {
17 counter {
24 counter {
31 counter {
38 counter {
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| /Zephyr-Core-3.4.0/dts/bindings/sensor/ |
| D | espressif,esp32-pcnt.yaml | 6 Espressif's Pulse Counter Mode (PCNT) controller Node
8 The pulse counter module is designed to count the number of
14 Each pulse counter unit has a 16-bit signed counter register.
17 to either increment or decrement the counter.
23 Each pulse counter unit also features a filter on each of the four inputs,
119 0 (Default) - Inhibit counter (counter value will not change in this condition).
120 1 - Increase counter value.
121 2 - Decrease counter value.
132 0 (Default) - Inhibit counter (counter value will not change in this condition).
133 1 - Increase counter value.
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| /Zephyr-Core-3.4.0/drivers/watchdog/ |
| D | wdt_counter.c | 8 #include <zephyr/drivers/counter.h>
28 const struct device *counter; member
34 const struct device *counter = config->counter; in wdt_counter_setup() local
40 return counter_start(counter); in wdt_counter_setup()
46 const struct device *counter = config->counter; in wdt_counter_disable() local
48 return counter_stop(counter); in wdt_counter_disable()
73 const struct device *counter = config->counter; in timeout_set() local
82 int err = counter_cancel_channel_alarm(counter, chan_id); in timeout_set()
89 return counter_set_channel_alarm(counter, chan_id, &alarm_cfg); in timeout_set()
97 const struct device *counter = config->counter; in wdt_counter_install_timeout() local
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| D | wdt_wwdg_stm32.c | 51 * t_WWDG = 1000 * ((counter & 0x3F) + 1) / f_WWDG (ms)
55 * - counter: a value in [0x40, 0x7F] representing the cycles before timeout.
56 * Giving the counter a value below 0x40, will result in an
57 * immediate system reset. A reset is produced when the counter
69 * - counter = 0x40
72 * - counter = 0x7F
110 * @param counter The counter value.
115 uint32_t counter) in wwdg_stm32_get_timeout() argument
120 return USEC_PER_SEC * (((counter & 0x3F) + 1) / f_wwdg); in wwdg_stm32_get_timeout()
124 * @brief Calculates prescaler & counter values.
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| /Zephyr-Core-3.4.0/tests/drivers/counter/counter_basic_api/ |
| D | testcase.yaml | 2 drivers.counter.basic_api:
5 - counter
6 depends_on: counter
10 drivers.counter.basic_api.nrf_zli:
13 - counter
14 depends_on: counter
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| /Zephyr-Core-3.4.0/include/zephyr/drivers/ |
| D | counter.h | 10 * @brief Public API for counter and timer drivers
17 * @brief Counter Interface
18 * @defgroup counter_interface Counter Interface
35 /**@defgroup COUNTER_FLAGS Counter device capabilities
39 * @brief Counter count up flag.
50 * @brief Flag preventing counter reset when top value is changed.
52 * If flags is set then counter is free running while top value is updated,
53 * otherwise counter is reset (see @ref counter_set_top_value()).
58 * @brief Flag instructing counter to reset itself if changing top value
59 * results in counter going out of new top value bound.
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| /Zephyr-Core-3.4.0/samples/drivers/can/counter/ |
| D | README.rst | 1 .. _can-counter-sample:
3 Controller Area Network (CAN) Counter
13 received counter values to the console.
33 :zephyr-app: samples/drivers/can/counter
44 :zephyr-app: samples/drivers/can/counter
56 Counter filter id: 4
58 uart:~$ Counter received: 0
59 Counter received: 1
60 Counter received: 2
61 Counter received: 3
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| /Zephyr-Core-3.4.0/dts/bindings/timer/ |
| D | andestech,atcpit100.yaml | 30 The prescaler value defines the counter frequency
31 (clock-frequency/prescaler) in atcpit100 counter driver, the prescaler
35 Defaults to 1 to use the PIT clock-frequency as the counter frequency.
38 larger than a counter tick period, reducing the counter frequency to
39 avoid imprecise counter value.
42 clock cycles for counter interface, setting prescaler value to 600 in
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| /Zephyr-Core-3.4.0/tests/kernel/timer/starve/ |
| D | README.txt | 16 Failure will occur when some counter wraps around. This may be a
17 hardware timer counter, a timer driver internal calculation of
20 For example a system that uses a 32768-Hz internal timer counter with
22 difference between the current and last-recorded counter value will fail
23 at 512 s when the updated counter value is observed to be less than the
24 last recorded counter.
26 Systems that use a 32-bit counter of 80 MHz ticks would fail after
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