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/cmsis-dsp-latest/Testing/
DcreateDb.sql1 CREATE TABLE CORE ( table
3 core text, field
6 CREATE INDEX coredef_index ON CORE(coredef);
70 FOREIGN KEY(coreid) REFERENCES CORE(coreid)
93 INSERT INTO CORE VALUES(1,"m0","ARMCM0");
94 INSERT INTO CORE VALUES(2,"m0p","ARMCM0P");
95 INSERT INTO CORE VALUES(3,"m3","ARMCM3");
96 INSERT INTO CORE VALUES(4,"m4","ARMCM4");
97 INSERT INTO CORE VALUES(5,"m4f","ARMCM4_FP");
98 INSERT INTO CORE VALUES(6,"m7d","ARMCM7_DP");
[all …]
Dexamples.sql3 Build the table with the platform, compiler and core names.
10 select NB,CATEGORY.category,NAME,CYCLES,PLATFORM.platform,CORE.core,COMPILERKIND.compiler,COMPILER.…
14 INNER JOIN CORE USING(coreid)
21 select Regression,MAX,MAXREGCOEF,CATEGORY.category,NAME,PLATFORM.platform,CORE.core,COMPILERKIND.co…
25 INNER JOIN CORE USING(coreid)
36 select NAME,max(CYCLES),PLATFORM.platform,CORE.core,COMPILERKIND.compiler,COMPILER.version
40 INNER JOIN CORE USING(coreid)
61 select NB,CATEGORY.category,NAME,CYCLES,PLATFORM.platform,CORE.core,COMPILERKIND.compiler,COMPILER.…
65 INNER JOIN CORE USING(coreid)
DextractDb.py23 runIDDetails="""SELECT distinct core FROM %s
24 INNER JOIN CORE USING(coreid)
61 parser.add_argument('-ratio', action='store_true', help="Compute ratios for regression by core inst…
75 coreidSQL="select distinct coreid from CORE where coredef==?"
81 print("Unrecognized reference core \"%s\"" % corename)
138 REMOVETABLES=['TESTNAME','TESTDATE','RUN','CORE', 'PLATFORM', 'COMPILERKIND', 'COMPILER', 'TYPE', '…
199 coreDesc="""select core from CORE WHERE coreid=?"""
208 # Get existing compiler in a table for a specific core
209 # (In case report is structured by core)
245 INNER JOIN CORE USING(coreid)
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Ddiff.sql4 Select the core to be used as reference. Only last day of measurements is used.
41 If we want to compute ratio between CORE AND PLATFORM then the view above should
42 be using CORE AND PLATFORM to filter and define the references.
51 CORE.core as CORE,
60 INNER JOIN CORE ON CORE.coreid = otherCores.coreid
DaddToDB.py25 MKKEYFIELD=['DATE','NAME','CATEGORY', 'PLATFORM', 'CORE', 'COMPILER','TYPE',"RUN"]
30 'CORE':'coreid',
41 VALKEYFIELD=['DATE','NAME','CATEGORY', 'PLATFORM', 'CORE', 'COMPILER','TYPE']
110 sql += "FOREIGN KEY(coreid) REFERENCES CORE(coreid),"
241 if field == "CORE":
242 val = findInTable(conn,"CORE","coredef",row[field],"coreid")
DaddToRegDB.py26 MKKEYFIELD=['DATE','NAME','CATEGORY', 'PLATFORM', 'CORE', 'COMPILER','TYPE','RUN']
31 'CORE':'coreid',
43 VALKEYFIELD=['DATE','NAME','CATEGORY', 'PLATFORM', 'CORE', 'COMPILER','TYPE']
116 sql += "FOREIGN KEY(coreid) REFERENCES CORE(coreid),"
248 if field == "CORE":
249 val = findInTable(conn,"CORE","coredef",row[field],"coreid")
/cmsis-dsp-latest/
DARM.CMSIS-DSP.pdsc29 <description>Components required for CMSIS Core</description>
30 <require Cclass="CMSIS" Cgroup="CORE"/>
59 <!-- DSP sources (core) -->
108 <component Cclass="CMSIS" Cgroup="CORE"/>
122 <component Cclass="CMSIS" Cgroup="CORE"/>
136 <component Cclass="CMSIS" Cgroup="CORE"/>
150 <component Cclass="CMSIS" Cgroup="CORE"/>
164 <component Cclass="CMSIS" Cgroup="CORE"/>
178 <component Cclass="CMSIS" Cgroup="CORE"/>
192 <component Cclass="CMSIS" Cgroup="CORE"/>
[all …]
/cmsis-dsp-latest/Testing/cmsis_build/
Drunall.py110 # Configuration file for AVH core
155 def runAVH(build,core,compiler): argument
163 if isinstance(configFiles[core],str):
164 config = os.path.join("configs",configFiles[core])
166 config = os.path.join("configs",configFiles[core][compiler])
169 avhAttempt = os.path.join(AVHROOT,avhWindowsExe[core])
173 avhAttempt = os.path.join(AVHROOT,avhUnixExe[core])
177 avh = avhUnixExe[core]
299 for build,core in solutions:
301 print("<h2>Core %s</h2>" % build,file=f)
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/cmsis-dsp-latest/.github/workflows/
Druncpptest.yaml20 core: [M0, M4, M55]
94 … python run_all.py -t -g ${{ matrix.compiler }} -c ${{ matrix.core }} -avh $AVH_FVP_PLUGINS/../bin
99 name: test-cpp-report_${{ matrix.compiler }}_${{ matrix.core }}
100 path: dsppp/${{ matrix.compiler }}_results/errors_${{ matrix.core }}.txt
108 test "$(cat ${{ matrix.compiler }}_results/errors_${{ matrix.core }}.txt | wc -l)" -eq 0
/cmsis-dsp-latest/Testing/TestScripts/doc/
DFormat.py21 # is computing a rstricted ordered core list with only the available cores.
31 for core in CORECATEGORIES[cat]:
32 cores.append(core)
34 print("Error core %s not found" % cat)
535 for core in data:
536 serieelems.append("{name: '%s',values: %s}" % (core,self._getIndex(hist.runids,data[core])))
579 self._output.write("<th class=\"core\">")
618 self._output.write("<td class=\"core\">")
/cmsis-dsp-latest/Source/
DMakefile27 # Path to CMSIS Core includes for Cortex-M
30 # Core Includes (Refer to the CMSIS-DSP README to
32 CMSIS_CORE_INCLUDES := $(CMSIS_5)/CMSIS/Core/Include
/cmsis-dsp-latest/Examples/ARM/arm_bayes_example/RTE/Device/ARMCM0/
Dsystem_ARMCM0.c37 System Core Clock Variable
39 uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */
43 System Core Clock update function
/cmsis-dsp-latest/Examples/ARM/arm_fft_bin_example/RTE/Device/ARMCM0/
Dsystem_ARMCM0.c37 System Core Clock Variable
39 uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */
43 System Core Clock update function
/cmsis-dsp-latest/Examples/ARM/arm_sin_cos_example/RTE/Device/ARMCM0/
Dsystem_ARMCM0.c37 System Core Clock Variable
39 uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */
43 System Core Clock update function
/cmsis-dsp-latest/Examples/ARM/arm_convolution_example/RTE/Device/ARMCM0/
Dsystem_ARMCM0.c37 System Core Clock Variable
39 uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */
43 System Core Clock update function
/cmsis-dsp-latest/Examples/ARM/arm_dotproduct_example/RTE/Device/ARMCM0/
Dsystem_ARMCM0.c37 System Core Clock Variable
39 uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */
43 System Core Clock update function
/cmsis-dsp-latest/Examples/ARM/arm_svm_example/RTE/Device/ARMCM0/
Dsystem_ARMCM0.c37 System Core Clock Variable
39 uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */
43 System Core Clock update function
/cmsis-dsp-latest/Examples/ARM/arm_signal_converge_example/RTE/Device/ARMCM0/
Dsystem_ARMCM0.c37 System Core Clock Variable
39 uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */
43 System Core Clock update function
/cmsis-dsp-latest/Examples/ARM/arm_class_marks_example/RTE/Device/ARMCM0/
Dsystem_ARMCM0.c37 System Core Clock Variable
39 uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */
43 System Core Clock update function
/cmsis-dsp-latest/Examples/ARM/arm_variance_example/RTE/Device/ARMCM0/
Dsystem_ARMCM0.c37 System Core Clock Variable
39 uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */
43 System Core Clock update function
/cmsis-dsp-latest/Examples/ARM/arm_fir_example/RTE/Device/ARMCM0/
Dsystem_ARMCM0.c37 System Core Clock Variable
39 uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */
43 System Core Clock update function
/cmsis-dsp-latest/Examples/ARM/arm_graphic_equalizer_example/RTE/Device/ARMCM0/
Dsystem_ARMCM0.c37 System Core Clock Variable
39 uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */
43 System Core Clock update function
/cmsis-dsp-latest/Examples/ARM/arm_linear_interp_example/RTE/Device/ARMCM0/
Dsystem_ARMCM0.c37 System Core Clock Variable
39 uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */
43 System Core Clock update function
/cmsis-dsp-latest/Examples/ARM/arm_matrix_example/RTE/Device/ARMCM0/
Dsystem_ARMCM0.c37 System Core Clock Variable
39 uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */
43 System Core Clock update function
/cmsis-dsp-latest/Examples/cmsis_build/RTE/Device/SSE-300-MPS3/
Dsystem_SSE300MPS3.h31 extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
40 * \brief Restores system core clock

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