1description: Xilinx AXI Timer IP node 2 3compatible: "xlnx,xps-timer-1.00.a" 4 5include: rtc.yaml 6 7# Property names correspond to those used by Xilinx PetaLinux: 8# https://github.com/Xilinx/meta-xilinx 9 10properties: 11 clock-frequency: 12 required: true 13 14 xlnx,count-width: 15 type: int 16 required: true 17 enum: 18 - 8 19 - 16 20 - 32 21 description: | 22 Individual timer/counter width in bits. 23 24 xlnx,gen0-assert: 25 type: int 26 enum: 27 - 0 28 - 1 29 description: | 30 Active state of the generateout0 signal (0 for active-low, 1 for 31 active-high). 32 33 xlnx,gen1-assert: 34 type: int 35 enum: 36 - 0 37 - 1 38 description: | 39 Active state of the generateout1 signal (0 for active-low, 1 for 40 active-high). 41 42 xlnx,one-timer-only: 43 type: int 44 required: true 45 enum: 46 - 0 47 - 1 48 description: | 49 0 if both Timer 1 and Timer 2 are enabled, 1 if only Timer 1 is enabled. 50 51 xlnx,trig0-assert: 52 type: int 53 enum: 54 - 0 55 - 1 56 description: | 57 Active state of the capturetrig0 signal (0 for active-low, 1 for 58 active-high). 59 60 xlnx,trig1-assert: 61 type: int 62 enum: 63 - 0 64 - 1 65 description: | 66 Active state of the capturetrig1 signal (0 for active-low, 1 for 67 active-high). 68
