Home
last modified time | relevance | path

Searched +full:bias +full:- +full:high +full:- +full:impedance (Results 1 – 11 of 11) sorted by relevance

/Zephyr-Core-3.6.0/boards/arm/qomu/
Dqomu.dts4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
9 #include <zephyr/dt-bindings/pinctrl/quicklogic-eos-s3-pinctrl.h>
10 #include <zephyr/dt-bindings/input/input-event-codes.h>
19 zephyr,shell-uart = &uart1;
20 zephyr,uart-pipe = &uart1;
31 compatible = "gpio-leds";
49 compatible = "gpio-keys";
65 input-enable;
69 output-enable;
[all …]
/Zephyr-Core-3.6.0/dts/bindings/pinctrl/
Dpincfg-node.yaml2 # SPDX-License-Identifier: Apache-2.0
16 https://www.kernel.org/doc/Documentation/devicetree/bindings/pinctrl/pincfg-node.yaml
19 bias-disable:
21 description: disable any pin bias
23 bias-high-impedance:
25 description: high impedance mode ("third-state", "floating")
27 bias-bus-hold:
31 bias-pull-up:
33 description: enable pull-up resistor
35 bias-pull-down:
[all …]
Dinfineon,cat1-pinctrl.yaml4 # SPDX-License-Identifier: Apache-2.0
11 UART0 RX to a particular port/pin and enable the pull-up resistor on that
22 'bias-pull-up' property. Here is a list of the supported standard pin
24 * bias-high-impedance
25 * bias-pull-up
26 * bias-pull-down
27 * drive-open-drain
28 * drive-open-source
29 * drive-push-pull (strong)
30 * input-enable (input-buffer)
[all …]
Dxlnx,pinctrl-zynq.yaml2 # SPDX-License-Identifier: Apache-2.0
5 # https://www.kernel.org/doc/Documentation/devicetree/bindings/pinctrl/xlnx,zynq-pinctrl.txt
6 # https://www.kernel.org/doc/Documentation/devicetree/bindings/pinctrl/xlnx,zynq-pinctrl.yaml
9 Xilinx Zynq-7000 SoC series pinctrl node. This node will define pin multiplexing and
18 #include <zephyr/dt-bindings/pinctrl/pinctrl-zynq.h>
21 pinctrl_uart1_default: uart1-default {
29 slew-rate = <IO_SPEED_SLOW>;
30 power-source = <IO_STANDARD_LVCMOS18>;
33 conf-rx {
35 bias-high-impedance;
[all …]
Dquicklogic,eos-s3-pinctrl.yaml2 # SPDX-License-Identifier: Apache-2.0
13 #include <dt-bindings/pinctrl/quicklogic-eos-s3-pinctrl.h>
18 input-enable;
22 output-enable;
26 compatible: "quicklogic,eos-s3-pinctrl"
34 child-binding:
40 - name: pincfg-node.yaml
41 property-allowlist:
42 - input-enable
43 - output-enable
[all …]
Drenesas,rzt2m-pinctrl.yaml2 # SPDX-License-Identifier: Apache-2.0
19 /* You can put this in places like a board-pinctrl.dtsi file in
23 /* include pre-defined combinations for the SoC variant used by the board */
24 #include <dt-bindings/pinctrl/renesas-rzt2m-pinctrl.h>
33 input-enable;
47 pins, such as the 'input-enable' property in group 2.
49 compatible: "renesas,rzt2m-pinctrl"
53 child-binding:
56 child-binding:
59 - name: pincfg-node.yaml
[all …]
Dite,it8xxx2-pinctrl.yaml2 # SPDX-License-Identifier: Apache-2.0
20 /* You can put this in places like a board-pinctrl.dtsi file in
24 /* include pre-defined pins and functions for the SoC used by the board */
25 #include <dt-bindings/pinctrl/it8xxx2-pinctrl.h>
31 gpio-voltage = "1p8";
35 gpio-voltage = "1v8";
40 bias-pull-up;
51 To link pin configurations with a device, use a pinctrl-N property for some
54 #include "board-pinctrl.dtsi"
57 pinctrl-0 = <&uart1_rx_pb0_default &uart1_tx_pb1_default>;
[all …]
Dambiq,apollo4-pinctrl.yaml2 # SPDX-License-Identifier: Apache-2.0
19 /* You can put this in places like a board-pinctrl.dtsi file in
23 /* include pre-defined combinations for the SoC variant used by the board */
24 #include <dt-bindings/pinctrl/ambiq-apollo4-pinctrl.h>
33 input-enable;
47 pins, such as the 'input-enable' property in group 2.
49 compatible: "ambiq,apollo4-pinctrl"
53 child-binding:
56 child-binding:
59 - name: pincfg-node.yaml
[all …]
/Zephyr-Core-3.6.0/boards/arm/zybo/
Dzybo-pinctrl.dtsi4 * SPDX-License-Identifier: Apache-2.0
7 #include <zephyr/dt-bindings/pinctrl/pinctrl-zynq.h>
10 pinctrl_uart1_default: uart1-default {
18 slew-rate = <IO_SPEED_SLOW>;
19 power-source = <IO_STANDARD_LVCMOS18>;
22 conf-rx {
24 bias-high-impedance;
27 conf-tx {
29 bias-disable;
/Zephyr-Core-3.6.0/drivers/ieee802154/
Dieee802154_cc13xx_cc26xx_subg.c4 * SPDX-License-Identifier: Apache-2.0
45 /* User-defined CMD_PROP_RADIO_DIV_SETUP structures */
54 /* Radio register overrides for CC13x2R (note: CC26x2 does not support sub-GHz radio)
55 * from SmartRF Studio (200kbps, 50kHz deviation, 2-GFSK, 311.8kHz Rx BW),
73 /* Rx: Set RSSI offset to adjust reported RSSI by -1 dB (default: -2),
74 * trimmed for external bias and differential configuration
77 /* Rx: Set anti-aliasing filter bandwidth to 0x8 (in ADI0, set IFAMPCTL3[7:4]=0x8) */
86 /* CC1352P overrides from SmartRF Studio (200kbps, 50kHz deviation, 2-GFSK, 311.8kHz Rx BW) */
92 /* Rx: Set RSSI offset to adjust reported RSSI by -1 dB (default: -2),
93 * trimmed for external bias and differential configuration.
[all …]
/Zephyr-Core-3.6.0/doc/releases/
Drelease-notes-3.3.rst14 * Introduced :ref:`USB-C <usbc_api>` device stack with PD (power delivery)
17 CMSIS-DSP as the default backend.
30 * CVE-2023-0359: Under embargo until 2023-04-20
32 * CVE-2023-0779: Under embargo until 2023-04-22
66 removed in favor of new :dtcompatible:`zephyr,flash-disk` devicetree binding.
71 * Starting from this release ``zephyr-`` prefixed tags won't be created
82 image states). Use of a truncated hash or non-sha256 hash will still work
88 registration function at boot-up. If applications register this then
93 application code, these will now automatically be registered at boot-up (this
129 This may cause out-of-tree scripts or commands to fail if they have relied
[all …]