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/Zephyr-latest/scripts/tests/twister/
Dtest_quarantine.py42 ['platforms', 'architectures']
50 ['scenarios', 'platforms', 'architectures', 'simulations']
56 'scenarios, platforms, architectures, ' \
62 'all platforms and architectures',
69 architectures, argument
79 architectures=architectures,
86 architectures=architectures,
90 for attr in ['scenarios', 'platforms', 'architectures', 'simulations']:
101 'architectures': [],
107 architectures=[],
[all …]
/Zephyr-latest/tests/kernel/usage/thread_runtime_stats/
Dtestcase.yaml4 # The following architectures are excluded as they have boards that
7 # The following architectures are exluded as the necessary
/Zephyr-latest/scripts/pylib/twister/twisterlib/
Dquarantine.py50 architectures: list[str] = field(default_factory=list) variable in QuarantineElement
65 if 'all' in self.architectures:
66 self.architectures = []
72 self.re_architectures = [re.compile(pat) for pat in self.architectures]
78 if not any([self.scenarios, self.platforms, self.architectures, self.simulations]):
129 qelem.architectures
/Zephyr-latest/include/zephyr/dt-bindings/memory-attr/
Dmemory-attr.h14 * Generic memory attributes that should be common to all architectures.
41 * Architectures can define their own memory attributes if needed using the
/Zephyr-latest/scripts/tests/twister/test_data/quarantines/
Dwith_regexp.yaml3 architectures:
/Zephyr-latest/tests/subsys/mgmt/mcumgr/os_mgmt_echo/
Dtestcase.yaml8 # FIXME: Exclude architectures that lack a reboot handler function
/Zephyr-latest/samples/net/sockets/dumb_http_server/src/
Dresponse_big.html.bin27 …em (RTOS) optimized for resource constrained devices, across multiple architectures. The Zephyr Pr…
31 …less gateways. Because the Zephyr OS is modular and supports multiple architectures, developers ar…
/Zephyr-latest/samples/net/sockets/dumb_http_server_mt/src/
Dresponse_big.html.bin27 …em (RTOS) optimized for resource constrained devices, across multiple architectures. The Zephyr Pr…
31 …less gateways. Because the Zephyr OS is modular and supports multiple architectures, developers ar…
/Zephyr-latest/tests/arch/arm/arm_custom_interrupt/
DREADME.txt2 the Cortex-M architectures.
7 Cortex-M architectures using the CONFIG_ARM_CUSTOM_INTERRUPT_CONTROLLER
/Zephyr-latest/doc/services/pm/
Doverview.rst7 architectures.
/Zephyr-latest/tests/lib/heap/
Dtestcase.yaml5 # coverage of the RISC-V architectures via qemu platforms already.
/Zephyr-latest/doc/services/dsp/
Dindex.rst12 optimized. The status of the various architectures can be found below:
35 architectures to use the zDSP APIs. This can be done by setting::
/Zephyr-latest/scripts/schemas/
Darch-schema.yml8 # The archs.yml file is a simple list of key value pairs containing architectures
/Zephyr-latest/doc/introduction/
Dindex.rst11 The Zephyr kernel supports multiple architectures, including:
24 The full list of supported boards based on these architectures can be found :ref:`here <boards>`.
99 architectures and developer tools. Contributions have added support
105 with thread-level memory protection on x86, ARC, and ARM architectures,
/Zephyr-latest/tests/kernel/common/
Dmultilib.txt5 Some architectures support different ISA variants, each backed a different
/Zephyr-latest/include/zephyr/sys/
Dreboot.h29 * Reboot the system in the manner specified by @a type. Not all architectures
/Zephyr-latest/doc/kernel/services/smp/
Dsmp.rst6 On multiprocessor architectures, Zephyr supports the use of multiple
56 architectures to define their own for performance reasons.
146 many architectures the timer is a per-CPU device and needs to be
181 So where possible, Zephyr SMP architectures should implement an
195 Note that not all SMP architectures will have a usable IPI mechanism
333 Similarly, on interrupt exit, switch-based architectures are expected
341 Architectures with a large CPU register file would typically preserve only
345 switching latency. Such architectures must use NULL as the argument to
353 Architectures whose entry in interrupt mode already preserves the entire
/Zephyr-latest/doc/connectivity/bluetooth/
Dfeatures.rst23 * Portable to all architectures supported by Zephyr (including big and
46 * Supports little and big endian architectures, and abstracts the hard
/Zephyr-latest/tests/subsys/llext/
Dtestcase.yaml25 # good shape and ready to be used by additional architectures in the
93 # storage to cover both ARM and Xtensa architectures on the same test.
/Zephyr-latest/scripts/schemas/twister/
Dquarantine-schema.yaml29 "architectures":
/Zephyr-latest/tests/subsys/llext/src/
Dmovwmovt_ext.c8 * This test is designed to test MOV.W and MOV.T instructions on ARM architectures.
/Zephyr-latest/doc/develop/toolchains/
Dzephyr_sdk.rst7 Zephyr's supported architectures. It also includes additional host tools, such
11 certain conditions (for example, running tests in QEMU for some architectures).
13 Supported architectures
16 The Zephyr SDK supports the following target architectures:
/Zephyr-latest/tests/subsys/mgmt/mcumgr/os_mgmt_info/
Dtestcase.yaml10 # FIXME: Exclude architectures that lack a reboot handler function
/Zephyr-latest/doc/services/debugging/
Dsymtab.rst10 …, this is being used to look up the function names during a stack trace in supported architectures.
/Zephyr-latest/arch/x86/core/
Dcpuhalt.c31 * Architectures Software Developer's Manual", regarding the 'sti' in arch_cpu_atomic_idle()

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