1#
2#  Copyright (c) 2023 Andes Technology Corporation.
3#
4#  SPDX-License-Identifier: Apache-2.0
5
6compatible: "andestech,atcdmac300"
7
8include: dma-controller.yaml
9
10properties:
11  reg:
12    required: true
13
14  interrupts:
15    required: true
16
17  chain-transfer:
18    type: int
19
20  "#dma-cells":
21    const: 3
22
23dma-cells:
24  - channel
25  - slot
26  - channel-config
27
28description: |
29  Andes DMA controller
30  channel: a phandle to the DMA controller plus the following four integer cells:
31    1. channel: the dma channel
32    2. slot: DMA peripheral request ID
33    3. channel-config: A 32bit mask specifying the DMA channel configuration
34    which is device dependent:
35        -bit 0-1 : Direction  (see dma.h)
36               0x0: MEM to MEM
37               0x1: MEM to PERIPH
38               0x2: PERIPH to MEM
39               0x3: reserved for PERIPH to PERIPH
40        -bit 2 : Peripheral Increment Address
41               0x0: no address increment between transfers
42               0x1: increment address between transfers
43        -bit 3 : Memory Increment Address
44               0x0: no address increment between transfers
45               0x1: increment address between transfers
46        -bit 4-6 : Peripheral data size
47               0x0: Byte (8 bits)
48               0x1: Half-word (16 bits)
49               0x2: Word (32 bits)
50               0x3: Double word (64 bits)
51               0x4: Quad word (128 bits)
52               0x5: Eight word (256 bits)
53               0x6-0x7: reserved
54        -bit 7-9 : Memory data size
55               0x0: Byte (8 bits)
56               0x1: Half-word (16 bits)
57               0x2: Word (32 bits)
58               0x3: Double word (64 bits)
59               0x4: Quad word (128 bits)
60               0x5: Eight word (256 bits)
61               0x6-0x7: reserved
62        -bit 10 : Priority level
63               0x0: lower priority
64               0x1: higher priority
65
66    examples for andes_v5_ae350 DMA instance
67     dma0: dma0@f0c00000 {
68         compatible = "andestech,atcdmac300";
69         ...
70         dma-channels = <8>;
71         dma-requests = <16>;
72         status = "disabled";
73         label = "DMA_0";
74        };
75
76  For the client part, example for andes_ae350 DMA instance
77    Tx using channel 2, slot 0
78    Rx using channel 3, slot 1
79    spi1: spi@f0f00000 {
80     compatible = "andestech,atcspi200"
81     dmas = <&dma0 2 0 0x0129>,
82            <&dma0 3 1 0x012A>;
83     dma-names = "tx", "rx";
84     };
85