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/Zephyr-latest/doc/introduction/
Dindex.rst7 resource-constrained and embedded systems: from simple embedded environmental
8 sensors and LED wearables to sophisticated embedded controllers, smart
9 watches, and IoT wireless applications.
13 - ARCv2 (EM and HS) and ARCv3 (HS6X)
14 - ARMv6-M, ARMv7-M, and ARMv8-M (Cortex-M)
15 - ARMv7-A and ARMv8-A (Cortex-A, 32- and 64-bit)
16 - ARMv7-R, ARMv8-R (Cortex-R, 32- and 64-bit)
17 - Intel x86 (32- and 64-bit)
20 - RISC-V (32- and 64-bit)
29 file systems, device driver classes, power management, and communication protocols,
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/Zephyr-latest/doc/security/
Dsecurity-overview.rst12 the key ideas of the security process and outlines which documents need
13 to be created. After the process is implemented and all supporting
14 documents are created, this document is a top-level overview and entry
17 Overview and Scope
26 1. **Secure Development:** Defines the system architecture and
28 principles and quality assurance procedures.
30 2. **Secure Design:** Defines security procedures and implement measures
31 to enforce them. A security architecture of the system and
32 relevant sub-modules is created, threats are identified, and
33 countermeasures designed. Their correct implementation and the
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/Zephyr-latest/doc/project/
Dproposals.rst6 For feature tracking we use Github labels to classify new features and
10 Changes to existing features that are not considered a bug and would not
16 that is not part of any release plans yet, that has not been vetted, and needs
17 further discussion and details.
20 A committed and planned unit of functionality with a detailed design and
21 implementation proposal and an owner. Features must go through an RFC process
22 and must be vetted and discussed in the TSC before a target milestone is set.
36 This is the formal way for asking for a new feature in Zephyr and indicating its
37 importance to the project. Often, the requester may have a readiness and
38 willingness to drive implementation of the feature in an upcoming release, and
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Dindex.rst3 Project and Governance
25 **Issues** to track feature, enhancement, and bug reports together with GitHub
26 **Pull Requests** (PRs) for submitting and reviewing changes. Zephyr
27 community members work together to review these Issues and PRs, managing
28 feature enhancements and quality improvements of Zephyr through its regular
32 We can only manage the volume of Issues and PRs, by requiring timely reviews,
33 feedback, and responses from the community and contributors, both for initial
34 submissions and for followup questions and clarifications. Read about the
35 project's :ref:`development processes and tools <dev-environment-and-tools>`
36 and specifics about :ref:`review timelines <review_time>` to learn about the
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Drelease_process.rst8 companies, and individuals from the community.
11 balance of the latest technologies and features and excellent overall quality. A
26 changes such as bug fixes and documentation will be merged unless granted a
29 - Development phase: all changes are considered and merged, subject to
31 - Stabilisation phase: the release manager creates a vN-rc1 tag and the tree
33 - CI sees the tag, builds and runs tests; Test teams analyse the report from the
34 build and test run and give an ACK/NAK to the build
35 - The release owner, with test teams and any other needed input, determines if the
60 sufficiently stable (and which is accepted by the maintainers and the wide community) is
62 (and all of the major changes) will be merged during this time.
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Dtsc.rst7 The TSC role and its responsibilities is defined in the `Zephyr project charter`_.
14 contributors, and stakeholders to ensure the project's success and
17 By fulfilling the rights and responsibilities below, TSC members contribute to
18 the overall success and growth of the Zephyr Project, ensuring that it remains a
19 vibrant and thriving open-source community for years to come.
27 including architectural changes, feature additions, and release planning.
31 including feature proposals, code contributions, and community initiatives.
34 Gain access to relevant project repositories, documentation, and communication
35 channels to stay informed and contribute effectively.
43 interests of contributors, users, and stakeholders.
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/Zephyr-latest/samples/subsys/sip_svc/
DREADME.rst21 Building and Running
31 at address 0x00100000 and ATF BL31 at 0x00001000 from SD Card or QSPI Flash
39 Got response of transaction id 0x00 and voltage is 0.846878v
40 Got response of transaction id 0x01 and voltage is 0.858170v
41 Got response of transaction id 0x02 and voltage is 0.860168v
42 Got response of transaction id 0x03 and voltage is 0.846832v
43 Got response of transaction id 0x04 and voltage is 0.858337v
44 Got response of transaction id 0x05 and voltage is 0.871704v
45 Got response of transaction id 0x06 and voltage is 0.859421v
46 Got response of transaction id 0x07 and voltage is 0.857254v
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/Zephyr-latest/doc/safety/
Dsafety_overview.rst10 and what the Zephyr Project and the Zephyr Safety Working Group / Committee try to achieve.
13 of the Zephyr RTOS and project members who want to contribute to the safety aspects of the
20 is, what standard we aim to achieve and what quality standards and processes need to be implemented
26 This document is a living document and may evolve over time as new requirements, guidelines, or
32 #. The Zephyr Safety Committee will review these changes and provide feedback or acceptance of
41 <https://en.wikipedia.org/wiki/IEC_61508>`__ standard and the Safety Integrity Level (SIL) 3 /
50 *Compliant development. Compliance with the requirements of this standard for the avoidance and
57 electrical, electronic, and programmable electronic safety-related systems. Here's an overview of
60 #. **Hazard and Risk Analysis**: The IEC 61508 standard requires a thorough analysis of potential
61 hazards and risks associated with a system in order to determine the appropriate level of safety
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/Zephyr-latest/tests/lib/cmsis_dsp/transform/
Dtestcase.yaml7 filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_FULL_LIBC_SUPPORTED
12 filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_FULL_LIBC_SUPPORTED
26 filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_CPU_HAS_FPU
27 and CONFIG_FULL_LIBC_SUPPORTED) or CONFIG_ARCH_POSIX
40 filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_FULL_LIBC_SUPPORTED
54 filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_CPU_HAS_FPU
55 and CONFIG_FULL_LIBC_SUPPORTED) or CONFIG_ARCH_POSIX
68 filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_FULL_LIBC_SUPPORTED
82 filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_CPU_HAS_FPU
83 and CONFIG_FULL_LIBC_SUPPORTED) or CONFIG_ARCH_POSIX
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/Zephyr-latest/tests/cmake/sysbuild_snippets/sysbuild/test_module/
DCMakeLists.txt8 …message(FATAL_ERROR "Values match (sysbuild and app): ${SB_CONFIG_TEST_FOO_VAL} and ${CONFIG_TEST_…
10 message(NOTICE "Values diverge (sysbuild and app)")
14 …message(NOTICE "Values match (sysbuild and snippet): ${SB_CONFIG_EXPECTED_SB_TEST_FOO_VAL} and ${S…
16 …message(FATAL_ERROR "Values diverge (sysbuild and snippet): ${SB_CONFIG_EXPECTED_SB_TEST_FOO_VAL} …
20 …message(NOTICE "Values match (app and snippet): ${SB_CONFIG_EXPECTED_APP_TEST_FOO_VAL} and ${CONFI…
22 …message(FATAL_ERROR "Values diverge (app and snippet): ${SB_CONFIG_EXPECTED_APP_TEST_FOO_VAL} and …
/Zephyr-latest/boards/native/doc/
Dbsim_boards_design.rst17 This page covers the design, architecture and rationale, of the
18 nrf5x_bsim boards and other similar bsim boards.
21 These boards use the `native simulator`_ and the :ref:`POSIX architecture<Posix arch>` to build
22 and execute the embedded code natively on Linux.
24 Particular details on the :ref:`nRF52<nrf52_bsim>`, :ref:`nRF5340<nrf5340bsim>` and
34 .. _Architecture of HW models used for FW development and testing:
60 without the need for real HW, and in a deterministic/reproducible fashion.
63 peripherals, and their execution is independent of the host load, or timing.
65 These boards are also designed to be used as prototyping and development environments,
70 Different types of tests and how the bsim boards relate to them
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/Zephyr-latest/modules/hal_nordic/nrfx/
Dnrfx_config_nrf9230_engb_radiocore.h30 * Boolean. Accepted values: 0 and 1.
48 * Boolean. Accepted values: 0 and 1.
57 * Boolean. Accepted values: 0 and 1.
66 * Boolean. Accepted values: 0 and 1.
75 * Boolean. Accepted values: 0 and 1.
84 * Boolean. Accepted values: 0 and 1.
102 * Boolean. Accepted values: 0 and 1.
126 * Boolean. Accepted values: 0 and 1.
135 * Boolean. Accepted values: 0 and 1.
299 * Boolean. Accepted values: 0 and 1.
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Dnrfx_config_nrf54h20_radiocore.h26 * Boolean. Accepted values: 0 and 1.
44 * Boolean. Accepted values: 0 and 1.
53 * Boolean. Accepted values: 0 and 1.
62 * Boolean. Accepted values: 0 and 1.
71 * Boolean. Accepted values: 0 and 1.
80 * Boolean. Accepted values: 0 and 1.
98 * Boolean. Accepted values: 0 and 1.
122 * Boolean. Accepted values: 0 and 1.
131 * Boolean. Accepted values: 0 and 1.
295 * Boolean. Accepted values: 0 and 1.
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Dnrfx_config_nrf9230_engb_application.h27 * Boolean. Accepted values: 0 and 1.
45 * Boolean. Accepted values: 0 and 1.
54 * Boolean. Accepted values: 0 and 1.
63 * Boolean. Accepted values: 0 and 1.
72 * Boolean. Accepted values: 0 and 1.
81 * Boolean. Accepted values: 0 and 1.
99 * Boolean. Accepted values: 0 and 1.
123 * Boolean. Accepted values: 0 and 1.
132 * Boolean. Accepted values: 0 and 1.
268 * Boolean. Accepted values: 0 and 1.
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Dnrfx_config_nrf54h20_flpr.h27 * Boolean. Accepted values: 0 and 1.
45 * Boolean. Accepted values: 0 and 1.
69 * Boolean. Accepted values: 0 and 1.
78 * Boolean. Accepted values: 0 and 1.
87 * Boolean. Accepted values: 0 and 1.
223 * Boolean. Accepted values: 0 and 1.
241 * Boolean. Accepted values: 0 and 1.
250 * Boolean. Accepted values: 0 and 1.
259 * Boolean. Accepted values: 0 and 1.
268 * Boolean. Accepted values: 0 and 1.
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Dnrfx_config_nrf54h20_application.h27 * Boolean. Accepted values: 0 and 1.
45 * Boolean. Accepted values: 0 and 1.
54 * Boolean. Accepted values: 0 and 1.
63 * Boolean. Accepted values: 0 and 1.
72 * Boolean. Accepted values: 0 and 1.
81 * Boolean. Accepted values: 0 and 1.
99 * Boolean. Accepted values: 0 and 1.
123 * Boolean. Accepted values: 0 and 1.
132 * Boolean. Accepted values: 0 and 1.
268 * Boolean. Accepted values: 0 and 1.
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Dnrfx_config_nrf54l05_flpr.h27 * Boolean. Accepted values: 0 and 1.
49 * Boolean. Accepted values: 0 and 1.
58 * Boolean. Accepted values: 0 and 1.
76 * Boolean. Accepted values: 0 and 1.
100 * Boolean. Accepted values: 0 and 1.
118 * Boolean. Accepted values: 0 and 1.
142 * Boolean. Accepted values: 0 and 1.
151 * Boolean. Accepted values: 0 and 1.
160 * Boolean. Accepted values: 0 and 1.
184 * Boolean. Accepted values: 0 and 1.
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Dnrfx_config_nrf54l10_flpr.h27 * Boolean. Accepted values: 0 and 1.
49 * Boolean. Accepted values: 0 and 1.
58 * Boolean. Accepted values: 0 and 1.
76 * Boolean. Accepted values: 0 and 1.
100 * Boolean. Accepted values: 0 and 1.
118 * Boolean. Accepted values: 0 and 1.
142 * Boolean. Accepted values: 0 and 1.
151 * Boolean. Accepted values: 0 and 1.
160 * Boolean. Accepted values: 0 and 1.
184 * Boolean. Accepted values: 0 and 1.
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Dnrfx_config_nrf54l15_flpr.h27 * Boolean. Accepted values: 0 and 1.
49 * Boolean. Accepted values: 0 and 1.
58 * Boolean. Accepted values: 0 and 1.
76 * Boolean. Accepted values: 0 and 1.
100 * Boolean. Accepted values: 0 and 1.
118 * Boolean. Accepted values: 0 and 1.
142 * Boolean. Accepted values: 0 and 1.
151 * Boolean. Accepted values: 0 and 1.
160 * Boolean. Accepted values: 0 and 1.
184 * Boolean. Accepted values: 0 and 1.
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Dnrfx_config_nrf54l05_application.h27 * Boolean. Accepted values: 0 and 1.
49 * Boolean. Accepted values: 0 and 1.
58 * Boolean. Accepted values: 0 and 1.
76 * Boolean. Accepted values: 0 and 1.
100 * Boolean. Accepted values: 0 and 1.
118 * Boolean. Accepted values: 0 and 1.
142 * Boolean. Accepted values: 0 and 1.
151 * Boolean. Accepted values: 0 and 1.
175 * Boolean. Accepted values: 0 and 1.
184 * Boolean. Accepted values: 0 and 1.
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Dnrfx_config_nrf54l10_application.h27 * Boolean. Accepted values: 0 and 1.
49 * Boolean. Accepted values: 0 and 1.
58 * Boolean. Accepted values: 0 and 1.
76 * Boolean. Accepted values: 0 and 1.
100 * Boolean. Accepted values: 0 and 1.
118 * Boolean. Accepted values: 0 and 1.
142 * Boolean. Accepted values: 0 and 1.
151 * Boolean. Accepted values: 0 and 1.
175 * Boolean. Accepted values: 0 and 1.
184 * Boolean. Accepted values: 0 and 1.
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/Zephyr-latest/tests/lib/cmsis_dsp/matrix/
Dtestcase.yaml7 filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_FULL_LIBC_SUPPORTED
12 filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_FULL_LIBC_SUPPORTED
26 filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_CPU_HAS_FPU
27 and CONFIG_FULL_LIBC_SUPPORTED) or CONFIG_ARCH_POSIX
41 filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_FULL_LIBC_SUPPORTED
55 filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_CPU_HAS_FPU
56 and CONFIG_FULL_LIBC_SUPPORTED) or CONFIG_ARCH_POSIX
70 filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_FULL_LIBC_SUPPORTED
84 filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_CPU_HAS_FPU
85 and CONFIG_FULL_LIBC_SUPPORTED) or CONFIG_ARCH_POSIX
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/Zephyr-latest/include/zephyr/platform/
Dhooks.h11 * @brief Soc and Board hooks
14 * zephyr architecture and initialization code and the SoC and board specific logic
15 * that resides under boards/ and soc/
17 * @note These are all standard soc and board interfaces that are exported from
18 * soc and board specific logic to OS internal logic. These should never be accessed
26 * This hook is implemented by the SoC and can be used to perform any
34 * This hook is implemented by the SoC and can be used to perform any
40 * @brief SoC hook executed before the kernel and devices are initialized.
42 * This hook is implemented by the SoC and can be used to perform any
48 * @brief SoC hook executed after the kernel and devices are initialized.
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/Zephyr-latest/
DLICENSE5 TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION
9 "License" shall mean the terms and conditions for use, reproduction,
10 and distribution as defined by Sections 1 through 9 of this document.
15 "Legal Entity" shall mean the union of the acting entity and all
28 source, and configuration files.
33 and conversions to other media types.
41 form, that is based on (or derived from) the Work and for which the
46 the Work and Derivative Works thereof.
49 the original version of the Work and any modifications or additions
57 and issue tracking systems that are managed by, or on behalf of, the
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/Zephyr-latest/doc/connectivity/bluetooth/
Dbluetooth-arch.rst26 * **Host**: This layer sits right below the application, and is comprised of
27 multiple (non real-time) network and transport protocols enabling
28 applications to communicate with peer devices in a standard and interoperable
33 packet reception and transmission, guarantees the delivery of data, and
35 * **Radio Hardware**: Hardware implements the required analog and digital
36 baseband functional blocks that permit the Link Layer firmware to send and
48 can send to a Controller and the events that it can expect in return, and also
49 the format for user and protocol data that needs to go over the air. The HCI
50 ensures that different Host and Controller implementations can communicate
51 in a standard way making it possible to combine Hosts and Controllers from
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