| /Zephyr-Core-3.5.0/dts/bindings/gpio/ |
| D | xlnx,xps-gpio-1.00.a.yaml | 3 compatible: "xlnx,xps-gpio-1.00.a"
5 include: [gpio-controller.yaml, base.yaml]
7 bus: xlnx,xps-gpio-1.00.a
10 # https://github.com/Xilinx/device-tree-xlnx
16 xlnx,all-inputs:
19 1 if all GPIOs are inputs, 0 otherwise
21 xlnx,all-outputs:
24 1 if all GPIOs are outputs, 0 otherwise
26 xlnx,dout-default:
29 Default output value. If n-th bit is 1, GPIO-n default value is 1.
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| /Zephyr-Core-3.5.0/boards/arm/arty/dts/ |
| D | arty_a7_arm_designstart.dtsi | 4 * SPDX-License-Identifier: Apache-2.0
7 #include <zephyr/dt-bindings/gpio/gpio.h>
9 #include <zephyr/dt-bindings/input/input-event-codes.h>
14 zephyr,shell-uart = &uartlite0;
29 spi-flash0 = &flash0;
33 compatible = "gpio-leds";
105 compatible = "gpio-keys";
149 compatible = "arm,daplink-qspi-mux";
151 interrupt-parent = <&nvic>;
153 mux-gpios = <&daplink_gpio0 0 GPIO_ACTIVE_HIGH>;
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| /Zephyr-Core-3.5.0/samples/bluetooth/hci_uart_async/ |
| D | debug.mixin.conf | 13 # This outputs all HCI traffic to a separate RTT channel. Use `btmon
14 # --jlink` to read it out. Add `--priority 7` for debug logs.
|
| /Zephyr-Core-3.5.0/samples/boards/bbc_microbit/display/ |
| D | README.rst | 14 This project outputs various things on the BBC micro:bit display. It can
17 .. zephyr-app-commands::
18 :zephyr-app: samples/boards/bbc_microbit/display
26 The sample app displays a countdown of the characters 9-0, iterates
27 through all pixels one-by-one, displays a smiley face, some animations,
|
| /Zephyr-Core-3.5.0/samples/arch/smp/pi/ |
| D | README.rst | 10 when compute-intensive tasks can be run in parallel, with
11 no cross-dependencies or shared resources.
24 This project outputs Pi values calculated by each thread and in the end total time
25 required for all the calculation to be done. It can be built and executed
28 .. zephyr-app-commands::
29 :zephyr-app: samples/arch/smp/pi
30 :host-os: unix
38 .. code-block:: console
46 All 16 threads executed by 4 cores in 28 msec
|
| /Zephyr-Core-3.5.0/drivers/serial/ |
| D | Kconfig.xen | 3 # Copyright (c) 2021-2023 EPAM Systems
4 # SPDX-License-Identifier: Apache-2.0
28 manages all domain outputs through the consoleio interface.
|
| /Zephyr-Core-3.5.0/samples/modules/tflite-micro/magic_wand/train/ |
| D | train_magic_wand_model.ipynb | 5 "Copyright 2020 The TensorFlow Authors. All Rights Reserved.\n",
11 " http://www.apache.org/licenses/LICENSE-2.0\n",
43 "<table class=\"tfo-notebook-buttons\" align=\"left\">\n",
48 …ic_wand_model.ipynb\"><img src=\"https://www.tensorflow.org/images/GitHub-Mark-32px.png\" />View s…
60 …efore you proceed, ensure you are using a GPU runtime by going to **Runtime -> Change runtime type…
93 "outputs": [],
96 "!git clone --depth 1 -q https://github.com/tensorflow/tensorflow\n",
98 "!cp -r tensorflow/tensorflow/lite/micro/examples/magic_wand/train train"
121 "outputs": [],
126 "!tar xvzf data.tar.gz -C train 1>/dev/null"
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| /Zephyr-Core-3.5.0/samples/subsys/zbus/confirmed_channel/ |
| D | README.rst | 1 .. zephyr:code-sample:: zbus-confirmed-channel
3 :relevant-api: zbus_apis
5 Use confirmed zbus channels to ensure all subscribers consume a message.
10 The confirmed channel can only be published when all the subscribers consume the message.
15 This project outputs to the console. It can be built and executed
18 .. zephyr-app-commands::
19 :zephyr-app: samples/subsys/zbus/confirmed_channel
20 :host-os: unix
27 .. code-block:: console
29 I: From listener -> Confirmed message payload = 0
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| /Zephyr-Core-3.5.0/.github/workflows/ |
| D | clang.yaml | 6 group: ${{ github.workflow }}-${{ github.event_name }}-${{ github.head_ref || github.ref }}
7 cancel-in-progress: true
10 clang-build:
11 if: github.repository_owner == 'zephyrproject-rtos'
12 runs-on: zephyr-runner-linux-x64-4xlarge
14 image: ghcr.io/zephyrproject-rtos/ci:v0.26.5
15 options: '--entrypoint /bin/bash'
17 - /repo-cache/zephyrproject:/github/cache/zephyrproject
19 fail-fast: false
23 ZEPHYR_SDK_INSTALL_DIR: /opt/toolchains/zephyr-sdk-0.16.3
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|
| D | twister.yaml | 6 - main
7 - v*-branch
8 - collab-*
11 - main
12 - v*-branch
13 - collab-*
16 - cron: '0 3 * * 0'
19 group: ${{ github.workflow }}-${{ github.event_name }}-${{ github.head_ref || github.ref }}
20 cancel-in-progress: true
23 twister-build-prep:
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|
| /Zephyr-Core-3.5.0/scripts/pylib/pytest-twister-harness/tests/resources/ |
| D | mock_script.py | 4 # SPDX-License-Identifier: Apache-2.0
16 def main() -> int:
18 parser.add_argument('--sleep', action='store', default=0, type=float)
19 parser.add_argument('--long-sleep', action='store_true')
20 parser.add_argument('--return-code', action='store', default=0, type=int)
21 parser.add_argument('--exception', action='store_true')
42 time.sleep(1) # give a moment for external programs to collect all outputs
|
| D | fifo_mock.py | 3 # SPDX-License-Identifier: Apache-2.0
72 wf.write(f'{line}\n'.encode('utf-8'))
73 time.sleep(1) # give a moment for external programs to collect all outputs
|
| /Zephyr-Core-3.5.0/soc/arm/microchip_mec/mec1501/ |
| D | soc.c | 4 * SPDX-License-Identifier: Apache-2.0
26 ECS_REGS->INTR_CTRL |= MCHP_ECS_ICTRL_DIRECT_EN; in soc_ecia_init()
28 /* gate off all aggregated outputs */ in soc_ecia_init()
29 ECIA_REGS->BLK_EN_CLR = 0xFFFFFFFFul; in soc_ecia_init()
31 ECIA_REGS->BLK_EN_SET = MCHP_ECIA_AGGR_BITMAP; in soc_ecia_init()
33 /* Clear all GIRQn source enables and source status */ in soc_ecia_init()
34 pg = &ECIA_REGS->GIRQ08; in soc_ecia_init()
36 pg->EN_CLR = 0xFFFFFFFFul; in soc_ecia_init()
37 pg->SRC = 0xFFFFFFFFul; in soc_ecia_init()
41 /* Clear all external NVIC enables and pending status */ in soc_ecia_init()
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|
| /Zephyr-Core-3.5.0/doc/services/tfm/ |
| D | build.rst | 3 TF-M Build System
6 When building a valid ``_ns`` board target, TF-M will be built in the
7 background, and linked with the Zephyr non-secure application. No knowledge
8 of TF-M's build system is required in most cases, and the following will
9 build a TF-M and Zephyr image pair, and run it in qemu with no additional
12 .. code-block:: bash
14 $ west build -p auto -b mps2_an521_ns samples/tfm_integration/psa_protected_storage/ -t run
16 The outputs and certain key steps in this build process are described here,
17 however, since you will need to understand and interact with the outputs, and
18 deal with signing the secure and non-secure images before deploying them.
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|
| /Zephyr-Core-3.5.0/drivers/gpio/ |
| D | gpio_pcal64xxa.c | 5 * SPDX-License-Identifier: Apache-2.0
91 typedef int (*pcal64xxa_outputs_write)(const struct i2c_dt_spec *i2c, uint16_t outputs);
114 struct pcal64xxa_drv_data *drv_data = dev->data; in pcal64xxa_pin_configure()
115 const struct pcal64xxa_drv_cfg *drv_cfg = dev->config; in pcal64xxa_pin_configure()
122 /* This device does not support open-source outputs, and open-drain in pcal64xxa_pin_configure()
123 * outputs can be only configured port-wise. in pcal64xxa_pin_configure()
126 return -ENOTSUP; in pcal64xxa_pin_configure()
129 /* Pins in this device can be either inputs or outputs and cannot be in pcal64xxa_pin_configure()
134 return -ENOTSUP; in pcal64xxa_pin_configure()
138 return -EWOULDBLOCK; in pcal64xxa_pin_configure()
[all …]
|
| D | gpio_cc13xx_cc26xx.c | 4 * SPDX-License-Identifier: Apache-2.0
14 #include <zephyr/dt-bindings/gpio/ti-cc13xx-cc26xx-gpio.h>
29 /* bits 16-18 in iocfg registers correspond to interrupt settings */
32 /* the rest are for general (non-interrupt) config */
72 return -ENOTSUP; in gpio_cc13xx_cc26xx_config()
86 * Not all GPIO support 8ma, but setting that bit will use the in gpio_cc13xx_cc26xx_config()
92 return -ENOTSUP; in gpio_cc13xx_cc26xx_config()
106 return -EINVAL; in gpio_cc13xx_cc26xx_config()
187 return -ENOTSUP; in gpio_cc13xx_cc26xx_pin_interrupt_configure()
205 struct gpio_cc13xx_cc26xx_data *data = port->data; in gpio_cc13xx_cc26xx_manage_callback()
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|
| D | gpio_axp192.c | 4 * SPDX-License-Identifier: Apache-2.0
39 const struct gpio_axp192_config *config = dev->config; in gpio_axp192_port_get_raw()
42 return -EWOULDBLOCK; in gpio_axp192_port_get_raw()
45 ret = mfd_axp192_gpio_read_port(config->mfd, &port_val); in gpio_axp192_port_get_raw()
57 const struct gpio_axp192_config *config = dev->config; in gpio_axp192_port_set_masked_raw()
60 return -EWOULDBLOCK; in gpio_axp192_port_set_masked_raw()
63 ret = mfd_axp192_gpio_write_port(config->mfd, value, mask); in gpio_axp192_port_set_masked_raw()
81 const struct gpio_axp192_config *config = dev->config; in gpio_axp192_configure()
85 if (pin >= config->ngpios) { in gpio_axp192_configure()
87 return -EINVAL; in gpio_axp192_configure()
[all …]
|
| D | gpio_litex.c | 2 * Copyright (c) 2019-2021 Antmicro <www.antmicro.com>
5 * SPDX-License-Identifier: Apache-2.0
34 "Cannot handle all of the gpios with the register of given size\n";
58 ((const struct gpio_litex_cfg *)(dev)->config)
67 regv = litex_read(config->reg_addr, config->reg_size); in set_bit()
69 litex_write(config->reg_addr, config->reg_size, new_regv); in set_bit()
74 int regv = litex_read(config->reg_addr, config->reg_size); in get_bit()
81 litex_write(config->reg_addr, config->reg_size, value); in set_port()
86 int regv = litex_read(config->reg_addr, config->reg_size); in get_port()
88 return (regv & BIT_MASK(config->nr_gpios)); in get_port()
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|
| D | gpio_sifive.c | 2 * Copyright (c) 2017 Jean-Paul Etienne <fractalclone@gmail.com>
4 * SPDX-License-Identifier: Apache-2.0
25 /* sifive GPIO register-set structure */
50 /* multi-level encoded interrupt corresponding to pin 0 */
64 ((const struct gpio_sifive_config * const)(dev)->config)
66 ((volatile struct gpio_sifive_t *)(DEV_GPIO_CFG(dev))->gpio_base_addr)
68 ((struct gpio_sifive_data *)(dev)->data)
97 return (plic_irq - base_irq); in gpio_sifive_plic_to_pin()
107 uint8_t pin = 1 + (riscv_plic_get_irq() - in gpio_sifive_irq_handler()
108 (uint8_t)(cfg->gpio_irq_base >> CONFIG_1ST_LEVEL_INTERRUPT_BITS)); in gpio_sifive_irq_handler()
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|
| D | gpio_mmio32.c | 4 * SPDX-License-Identifier: Apache-2.0
9 * @brief Driver to provide the GPIO API for a simple 32-bit i/o register
11 * This is a driver for accessing a simple, fixed purpose, 32-bit
12 * memory-mapped i/o register using the same APIs as GPIO drivers. This is
16 * chip-select line for an SPI device.
18 * The implementation expects that all bits of the hardware register are both
19 * readable and writable, and that for any bits that act as outputs, the value
21 * stems from the use of a read-modify-write method for all changes.
36 struct gpio_mmio32_context *context = dev->data; in gpio_mmio32_config()
37 const struct gpio_mmio32_config *config = context->config; in gpio_mmio32_config()
[all …]
|
| /Zephyr-Core-3.5.0/samples/boards/nrf/nrfx_prs/ |
| D | README.rst | 21 - by pressing Button 1 user can request a transfer to be performed using the
23 - by pressing Button 2 user can switch between the two peripherals
28 The sample outputs on the standard console the hex codes of all sent and
33 all zeros are received by SPIMs. Refer to the overlay files provided in the
50 .. zephyr-app-commands::
51 :zephyr-app: samples/boards/nrf/nrfx_prs
|
| /Zephyr-Core-3.5.0/samples/boards/sensortile_box/ |
| D | README.rst | 11 This sample enables all sensors of SensorTile.box board, and then
15 - HTS221: ambient temperature and relative humidity
16 - LPS22HH: ambient temperature and atmospheric pressure
17 - LIS2DW12: 3-Axis acceleration
18 - LSM6DSOX: 6-Axis acceleration and angular velocity
19 - STTS751: temperature sensor
30 - :ref:`sensortile_box`
37 .. zephyr-app-commands::
38 :zephyr-app: samples/boards/sensortile_box
48 .. code-block:: console
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|
| /Zephyr-Core-3.5.0/include/zephyr/mgmt/mcumgr/grp/os_mgmt/ |
| D | os_mgmt.h | 2 * Copyright (c) 2018-2021 mcumgr authors
6 * SPDX-License-Identifier: Apache-2.0
47 * 32-bits, allowing 32 flags, custom user-level implementations should start at
69 /* Bitmask of values specifying which outputs should be present */
86 /* Will be true if the all 'a' specifier was provided */
|
| /Zephyr-Core-3.5.0/samples/arch/smp/pktqueue/ |
| D | README.rst | 22 +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
23 | 0 - 3 | 4 - 7 | 8 - 15 | 16 - 31 |
24 +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
26 +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
28 +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
30 +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
32 +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
34 +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
36 +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
42 Then in each queue-related thread several(defined in THREADS_NUM) threads are created. Each
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|
| /Zephyr-Core-3.5.0/tests/crypto/tinycrypt_hmac_prng/ |
| D | README.txt | 7 --------------------------------------------------------------------------------
10 This project outputs to the console. It can be built and executed
15 --------------------------------------------------------------------------------
19 Problems caused by out-dated project information can be addressed by
26 # and restore pre-defined configuration info
28 --------------------------------------------------------------------------------
31 tc_start() - Performing HMAC-PRNG tests:
32 HMAC-PRNG test#1 (init, reseed, generate):
33 HMAC-PRNG test#1 (init):
35 PASS - main.
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|
