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/Zephyr-Core-3.5.0/dts/bindings/gpio/
Dxlnx,xps-gpio-1.00.a.yaml3 compatible: "xlnx,xps-gpio-1.00.a"
5 include: [gpio-controller.yaml, base.yaml]
7 bus: xlnx,xps-gpio-1.00.a
10 # https://github.com/Xilinx/device-tree-xlnx
16 xlnx,all-inputs:
19 1 if all GPIOs are inputs, 0 otherwise
21 xlnx,all-outputs:
24 1 if all GPIOs are outputs, 0 otherwise
26 xlnx,dout-default:
29 Default output value. If n-th bit is 1, GPIO-n default value is 1.
[all …]
Dite,it8xxx2-gpio-v2.yaml1 # Copyright (c) 2023 ITE Corporation. All Rights Reserved.
2 # SPDX-License-Identifier: Apache-2.0
6 compatible: "ite,it8xxx2-gpio-v2"
8 include: [gpio-controller.yaml, base.yaml]
14 has-volt-sel:
19 wuc-base:
23 The WUC groups internal and external inputs, and asserts
24 a wake-up signal to the INTC, allowing the CPU to exit
27 wuc-mask:
30 gpio-cells:
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/Zephyr-Core-3.5.0/doc/connectivity/bluetooth/api/mesh/
Dblob_cli.rst18 .. code-block:: C
37 Inputs structure must at least be initialized with a list of targets, an application key and a time
40 .. code-block:: c
47 static struct bt_mesh_blob_cli_inputs inputs = {
52 sys_slist_init(&inputs.targets);
53 sys_slist_append(&inputs.targets, &targets[0].n);
54 sys_slist_append(&inputs.targets, &targets[1].n);
55 sys_slist_append(&inputs.targets, &targets[2].n);
57 Note that all BLOB Transfer Servers in the transfer must be bound to the chosen application key.
61 -------------
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/Zephyr-Core-3.5.0/include/zephyr/bluetooth/mesh/
Dblob_cli.h4 * SPDX-License-Identifier: Apache-2.0
103 /** BLOB Transfer Client transfer inputs. */
122 /** Additional response time for the Target nodes, in 10-second increments.
188 * All handlers are optional.
195 * for the given list of Target nodes. All compatible Target nodes have
209 * the Client until all Target nodes have been lost.
221 * Called when the transfer is suspended due to response timeout from all Target nodes.
255 * Called when all Target nodes have responded or the procedure timed-out.
268 /** If @ref blob_cli_broadcast_ctx::acked is true, called after all Target nodes
279 /** If true, non-responsive Target nodes won't be dropped after transfer has timed out. */
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Ddfu_cli.h4 * SPDX-License-Identifier: Apache-2.0
49 BT_MESH_MODEL_BLOB_CLI(&(_cli)->blob), \
92 /** Additional response time for the Target nodes, in 10-second increments.
133 * Called when the BLOB transfer is suspended due to response timeout from all Target nodes.
141 * Called when the DFU transfer ends, either because all Target nodes were
150 /** @brief DFU transfer applied on all active Target nodes.
159 /** @brief DFU transfer confirmed on all active Target nodes.
242 * @note The BLOB Transfer Client transfer inputs @c targets list must point to a list of @ref
246 * @param inputs BLOB Transfer Client transfer inputs.
253 const struct bt_mesh_blob_cli_inputs *inputs,
/Zephyr-Core-3.5.0/boards/arm/arty/dts/
Darty_a7_arm_designstart.dtsi4 * SPDX-License-Identifier: Apache-2.0
7 #include <zephyr/dt-bindings/gpio/gpio.h>
9 #include <zephyr/dt-bindings/input/input-event-codes.h>
14 zephyr,shell-uart = &uartlite0;
29 spi-flash0 = &flash0;
33 compatible = "gpio-leds";
105 compatible = "gpio-keys";
149 compatible = "arm,daplink-qspi-mux";
151 interrupt-parent = <&nvic>;
153 mux-gpios = <&daplink_gpio0 0 GPIO_ACTIVE_HIGH>;
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/Zephyr-Core-3.5.0/tests/bsim/bluetooth/mesh/src/
Dtest_blob.c4 * SPDX-License-Identifier: Apache-2.0
39 .option = "use-pull-mode", in test_args_parse()
46 .option = "msg-fail-type", in test_args_parse()
52 .name = "{inactive, start, wait-block, wait-chunk, complete, suspended}", in test_args_parse()
53 .option = "expected-phase", in test_args_parse()
79 partial_block += chunk->size; in blob_chunk_wr()
80 ASSERT_TRUE_MSG(partial_block <= block->size, "Received block is too large\n"); in blob_chunk_wr()
83 if (partial_block == block->size) { in blob_chunk_wr()
85 ASSERT_FALSE_MSG(atomic_test_and_set_bit(block_bitfield, block->number), in blob_chunk_wr()
105 memset(chunk->data, 0, chunk->size); in blob_chunk_rd()
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Dtest_dfu.c4 * SPDX-License-Identifier: Apache-2.0
74 .option = "fail-confirm", in test_args_parse()
80 .name = "{none, start, verify, verify-ok, verify-fail, apply}", in test_args_parse()
81 .option = "expected-phase", in test_args_parse()
109 memset(chunk->data, 0, chunk->size); in dummy_blob_chunk_rd()
182 return dfu_metadata_fail ? 0 : -1; in target_metadata_check()
197 return -EALREADY; in target_dfu_start()
619 /* All but first slot are committed */ in test_dist_dfu_slot_create()
647 ASSERT_EQUAL(size, slot->size); in check_slot()
650 ASSERT_EQUAL(fwid_len, slot->fwid_len); in check_slot()
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/Zephyr-Core-3.5.0/subsys/bluetooth/mesh/
Dblob_cli.c4 * SPDX-License-Identifier: Apache-2.0
19 SYS_SLIST_FOR_EACH_CONTAINER((sys_slist_t *)&(cli)->inputs->targets, \
24 /* The Maximum BLOB Poll Interval - T_MBPI */
27 #define CLIENT_TIMEOUT_MSEC(cli) (10 * MSEC_PER_SEC * (cli->inputs->timeout_base + 2) + \
28 100 * cli->inputs->ttl)
32 #define SENDING_CHUNKS_IN_PULL_MODE(cli) ((cli)->state == BT_MESH_BLOB_CLI_STATE_BLOCK_SEND && \
33 (cli)->xfer->mode == BT_MESH_BLOB_XFER_MODE_PULL)
34 #define UNICAST_MODE(cli) ((cli)->inputs->group == BT_MESH_ADDR_UNASSIGNED || \
35 (cli)->tx.ctx.force_unicast)
67 int64_t next_timeout_ms = cli->tx.cli_timestamp; in start_retry_timer()
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Ddfu_cli.c4 * SPDX-License-Identifier: Apache-2.0
22 (sys_slist_t *)&((cli)->blob.inputs)->targets, target, blob.n)
26 .app_idx = (cli)->blob.inputs->app_idx, .addr = dst, \
27 .send_ttl = (cli)->blob.inputs->ttl, \
77 if (addr == target->blob.addr) { in target_get()
89 target->status = status; in target_failed()
91 LOG_ERR("Target 0x%04x failed: %u", target->blob.addr, status); in target_failed()
96 if (target->blob.status == BT_MESH_BLOB_SUCCESS) { in target_failed()
97 target->blob.status = BT_MESH_BLOB_ERR_INTERNAL; in target_failed()
100 if (cli->cb && cli->cb->lost_target) { in target_failed()
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/Zephyr-Core-3.5.0/dts/bindings/regulator/
Dnxp,pca9420.yaml2 # SPDX -License-Identifier: Apache-2.0
7 The PMIC has two buck converters and two LDOs. All need to be defined as
15 /* all properties for BUCK1 */
18 /* all properties for BUCK2 */
21 /* all properties for LDO1 */
24 /* all properties for LDO2 */
34 nxp,enable-modesel-pins:
38 the MODESEL0/1 inputs.
40 nxp,vin-ilim-microamp:
44 - 85000
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/Zephyr-Core-3.5.0/dts/bindings/clock/
Datmel,sam-pmc.yaml2 # SPDX-License-Identifier: Apache-2.0
8 controlling all system and user peripheral clocks. The PMC enables/disables
9 the clock inputs to many of the peripherals and the processor.
16 clocks = <&pmc PMC_TYPE_PERIPHERAL p-id>;
20 In this example the clock-type was defined as PMC_TYPE_PERIPHERAL and the
21 peripheral-id was defined as p-id. The p-id number should be consulted on
27 The clock-type constants are:
34 compatible: "atmel,sam-pmc"
36 include: [clock-controller.yaml, base.yaml]
42 "#clock-cells":
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/Zephyr-Core-3.5.0/soc/arm/microchip_mec/mec1501/
Dsoc.c4 * SPDX-License-Identifier: Apache-2.0
17 * inputs.
26 ECS_REGS->INTR_CTRL |= MCHP_ECS_ICTRL_DIRECT_EN; in soc_ecia_init()
28 /* gate off all aggregated outputs */ in soc_ecia_init()
29 ECIA_REGS->BLK_EN_CLR = 0xFFFFFFFFul; in soc_ecia_init()
31 ECIA_REGS->BLK_EN_SET = MCHP_ECIA_AGGR_BITMAP; in soc_ecia_init()
33 /* Clear all GIRQn source enables and source status */ in soc_ecia_init()
34 pg = &ECIA_REGS->GIRQ08; in soc_ecia_init()
36 pg->EN_CLR = 0xFFFFFFFFul; in soc_ecia_init()
37 pg->SRC = 0xFFFFFFFFul; in soc_ecia_init()
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/Zephyr-Core-3.5.0/dts/bindings/sensor/
Dti,ina230.yaml5 # SPDX-License-Identifier: Apache-2.0
10 The <zephyr/dt-bindings/sensor/ina230.h> file should be included in the
16 include: ti,ina23x-common.yaml
28 alert-config:
30 description: Diag alert register, default matches the power-on reset value
32 adc-mode:
36 Default is the power-on reset value.
39 - "Shutdown single shot"
40 - "Shunt Voltage single shot"
41 - "Bus Voltage single shot"
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Dti,ina237.yaml4 # SPDX-License-Identifier: Apache-2.0
9 The <zephyr/dt-bindings/sensor/ina237.h> file should be included in the
15 include: ti,ina23x-common.yaml
31 adc-config:
41 alert-config:
43 description: Diag alert register, default matches the power-on reset value
45 adc-mode:
49 Default is the power-on reset value.
52 - "Shutdown single shot"
53 - "Bus Voltage single shot"
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/Zephyr-Core-3.5.0/subsys/bluetooth/mesh/shell/
Dblob.c4 * SPDX-License-Identifier: Apache-2.0
42 for (i = 0; i < chunk->size; ++i) { in blob_chunk_wr()
43 blob_rx_sum += chunk->data[i]; in blob_chunk_wr()
44 if (chunk->data[i] != in blob_chunk_wr()
45 blob_data[(i + chunk->offset) % sizeof(blob_data)]) { in blob_chunk_wr()
58 for (int i = 0; i < chunk->size; ++i) { in blob_chunk_rd()
59 chunk->data[i] = in blob_chunk_rd()
60 blob_data[(i + chunk->offset) % sizeof(blob_data)]; in blob_chunk_rd()
77 struct bt_mesh_blob_cli_inputs inputs; member
89 target->addr, reason); in blob_cli_lost_target()
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Ddfd.c4 * SPDX-License-Identifier: Apache-2.0
22 shell_print(sh, "{\"status\": %d, \"target_cnt\": %d}", status, srv->target_cnt); in print_receivers_status()
29 srv->phase); in print_dfd_status()
31 if (srv->phase != BT_MESH_DFD_PHASE_IDLE && srv->dfu.xfer.slot) { in print_dfd_status()
34 "\"apply\": %d, \"slot_idx\": %d", srv->inputs.group, in print_dfd_status()
35 srv->inputs.app_idx, srv->inputs.ttl, srv->inputs.timeout_base, in print_dfd_status()
36 srv->dfu.xfer.blob.mode, srv->apply, srv->slot_idx); in print_dfd_status()
62 *total += slot->size; in slot_space_cb()
70 return -ENODEV; in cmd_dfd_receivers_add()
73 struct bt_mesh_dfd_srv *dfd_srv = mod->user_data; in cmd_dfd_receivers_add()
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/Zephyr-Core-3.5.0/drivers/adc/
DKconfig4 # SPDX-License-Identifier: Apache-2.0
10 bool "Analog-to-Digital Converter (ADC) drivers"
11 # All platforms that implement the ADC driver are now required to
26 # required to explicitly specify analog inputs when configuring channels or
50 module-str = ADC
/Zephyr-Core-3.5.0/drivers/gpio/
Dgpio_xlnx_ps_bank.c6 * SPDX-License-Identifier: Apache-2.0
31 * - Pull up
32 * - Pull down
33 * - Open drain
34 * - Open source.
42 * -EINVAL if the specified pin index is out of range,
43 * -ENOTSUP if the pin configuration data contains a flag
50 const struct gpio_xlnx_ps_bank_dev_cfg *dev_conf = dev->config; in gpio_xlnx_ps_pin_configure()
60 return -ENOTSUP; in gpio_xlnx_ps_pin_configure()
84 * -> Write the initial output value into the data register. in gpio_xlnx_ps_pin_configure()
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Dgpio_cc13xx_cc26xx.c4 * SPDX-License-Identifier: Apache-2.0
14 #include <zephyr/dt-bindings/gpio/ti-cc13xx-cc26xx-gpio.h>
29 /* bits 16-18 in iocfg registers correspond to interrupt settings */
32 /* the rest are for general (non-interrupt) config */
72 return -ENOTSUP; in gpio_cc13xx_cc26xx_config()
86 * Not all GPIO support 8ma, but setting that bit will use the in gpio_cc13xx_cc26xx_config()
92 return -ENOTSUP; in gpio_cc13xx_cc26xx_config()
106 return -EINVAL; in gpio_cc13xx_cc26xx_config()
187 return -ENOTSUP; in gpio_cc13xx_cc26xx_pin_interrupt_configure()
205 struct gpio_cc13xx_cc26xx_data *data = port->data; in gpio_cc13xx_cc26xx_manage_callback()
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Dgpio_axp192.c4 * SPDX-License-Identifier: Apache-2.0
39 const struct gpio_axp192_config *config = dev->config; in gpio_axp192_port_get_raw()
42 return -EWOULDBLOCK; in gpio_axp192_port_get_raw()
45 ret = mfd_axp192_gpio_read_port(config->mfd, &port_val); in gpio_axp192_port_get_raw()
57 const struct gpio_axp192_config *config = dev->config; in gpio_axp192_port_set_masked_raw()
60 return -EWOULDBLOCK; in gpio_axp192_port_set_masked_raw()
63 ret = mfd_axp192_gpio_write_port(config->mfd, value, mask); in gpio_axp192_port_set_masked_raw()
81 const struct gpio_axp192_config *config = dev->config; in gpio_axp192_configure()
85 if (pin >= config->ngpios) { in gpio_axp192_configure()
87 return -EINVAL; in gpio_axp192_configure()
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Dgpio_litex.c2 * Copyright (c) 2019-2021 Antmicro <www.antmicro.com>
5 * SPDX-License-Identifier: Apache-2.0
34 "Cannot handle all of the gpios with the register of given size\n";
58 ((const struct gpio_litex_cfg *)(dev)->config)
67 regv = litex_read(config->reg_addr, config->reg_size); in set_bit()
69 litex_write(config->reg_addr, config->reg_size, new_regv); in set_bit()
74 int regv = litex_read(config->reg_addr, config->reg_size); in get_bit()
81 litex_write(config->reg_addr, config->reg_size, value); in set_port()
86 int regv = litex_read(config->reg_addr, config->reg_size); in get_port()
88 return (regv & BIT_MASK(config->nr_gpios)); in get_port()
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Dgpio_sifive.c2 * Copyright (c) 2017 Jean-Paul Etienne <fractalclone@gmail.com>
4 * SPDX-License-Identifier: Apache-2.0
25 /* sifive GPIO register-set structure */
50 /* multi-level encoded interrupt corresponding to pin 0 */
64 ((const struct gpio_sifive_config * const)(dev)->config)
66 ((volatile struct gpio_sifive_t *)(DEV_GPIO_CFG(dev))->gpio_base_addr)
68 ((struct gpio_sifive_data *)(dev)->data)
97 return (plic_irq - base_irq); in gpio_sifive_plic_to_pin()
107 uint8_t pin = 1 + (riscv_plic_get_irq() - in gpio_sifive_irq_handler()
108 (uint8_t)(cfg->gpio_irq_base >> CONFIG_1ST_LEVEL_INTERRUPT_BITS)); in gpio_sifive_irq_handler()
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/Zephyr-Core-3.5.0/drivers/mm/
Dmm_drv_intel_adsp_tlb.c4 * SPDX-License-Identifier: Apache-2.0
12 * physical and virtual memory. This is global to all cores
14 * all cores.
16 * Note that all passed in addresses should be in cached range
51 #define TLB_PADDR_MASK ((1 << TLB_PADDR_SIZE) - 1)
59 * @param vaddr Page-aligned virtual address.
64 return (POINTER_TO_UINT(vaddr) - CONFIG_KERNEL_VM_BASE) / in get_tlb_entry_idx()
88 /* Make sure inputs are page-aligned */ in sys_mm_drv_map_page()
91 ret = -EINVAL; in sys_mm_drv_map_page()
98 ret = -EINVAL; in sys_mm_drv_map_page()
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/Zephyr-Core-3.5.0/drivers/interrupt_controller/
DKconfig.multilevel5 # SPDX-License-Identifier: Apache-2.0
8 bool "Multi-level interrupt support"
14 all interrupts routed to it into one IRQ line in the first level
35 The maximum number of interrupt inputs to any aggregator in the
39 bool "Second-level interrupt support"
72 prev-level-num = 1
73 cur-level-num = 2
74 cur-level = 2ND
93 bool "Third-level interrupt support"
126 prev-level-num = 2
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