| /Zephyr-Core-3.5.0/drivers/mm/ |
| D | mm_drv_common.h | 24 * is assumed to be page aligned.
26 * @param virt Page-aligned virtual address
36 * @brief Test if address is page-aligned
40 * @retval true if page-aligned
41 * @retval false if not page-aligned
49 * @brief Test if address is page-aligned
53 * @retval true if page-aligned
54 * @retval false if not page-aligned
62 * @brief Test if size is page-aligned
66 * @retval true if page-aligned
[all …]
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| /Zephyr-Core-3.5.0/tests/arch/arm64/arm64_gicv3_its/boards/ |
| D | fvp_base_revc_2xaemv8a.conf | 2 # - LPI prop table: global 1x64K aligned on 64K
3 # - LPI pend table: for each redistributor/cpu 1x64K aligned on 64K
4 # - Devices table: 128x4K aligned on 4K
5 # - Interrupt Collections table: 1x4K aligned on 4K
12 # 256bytes aligned tables, for reference a 32 ITEs table needs 256bytes.
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| /Zephyr-Core-3.5.0/boards/arm64/fvp_base_revc_2xaemv8a/ |
| D | Kconfig | 5 # - LPI prop table: global 1x64K aligned on 64K
6 # - LPI pend table: for each redistributor/cpu 1x64K aligned on 64K
7 # - Devices table: 128x4K aligned on 4K
8 # - Interrupt Collections table: 1x4K aligned on 4K
15 # 256bytes aligned tables, for reference a 32 ITEs table needs 256bytes.
|
| /Zephyr-Core-3.5.0/include/zephyr/drivers/mm/ |
| D | system_mm.h | 68 * is assumed to be page aligned.
75 * @param virt Page-aligned destination virtual address to map
76 * @param phys Page-aligned source physical address to map
90 * are assumed to be page aligned.
97 * @param virt Page-aligned destination virtual address to map
98 * @param phys Page-aligned source physical address to map
99 * @param size Page-aligned size of the mapped memory region in bytes
114 * are assumed to be page aligned.
121 * @param virt Page-aligned destination virtual address to map
122 * @param phys Array of pge-aligned source physical address to map
[all …]
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| /Zephyr-Core-3.5.0/dts/bindings/pwm/ |
| D | nordic,nrf-pwm.yaml | 14 center-aligned:
16 description: Set this to use center-aligned (up and down) counter mode.
|
| /Zephyr-Core-3.5.0/include/zephyr/sys/ |
| D | mem_manage.h | 332 * The returned virtual memory pointer will be page-aligned. The size
334 * aligned.
343 * @param size Size of the memory mapping. This must be page-aligned.
354 * This removes a memory mapping for the provided page-aligned region.
361 * @param addr Page-aligned memory region base virtual address
362 * @param size Page-aligned memory region size
367 * Given an arbitrary region, provide a aligned region that covers it
369 * The returned region will have both its base address and size aligned
372 * @param aligned_addr [out] Aligned address
373 * @param aligned_size [out] Aligned region size
[all …]
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| D | spsc_pbuf.h | 130 * created. When cache is used it must be aligned to
132 * be 32 bit word aligned.
171 * Packet buffer ensures that allocated buffers are 32 bit word aligned.
224 * The returned buffer is 32 bit word aligned and points to the continuous memory.
231 * It is 32 bit word aligned and points to the continuous memory.
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| /Zephyr-Core-3.5.0/include/zephyr/arch/arm64/ |
| D | mm.h | 12 * When mmu enabled, some section addresses need to be aligned with
19 * When mpu enabled, some section addresses need to be aligned with
|
| /Zephyr-Core-3.5.0/arch/arm/core/ |
| D | vector_table.ld | 17 * of the vector table is 64-word aligned.
22 * of the vector table is 32-word aligned.
44 * should be aligned in such a way so that it satisfies the requirements of
|
| /Zephyr-Core-3.5.0/tests/lib/heap_align/src/ |
| D | main.c | 32 zassert_true(q != NULL, "first aligned allocation failed"); in check_heap_align()
33 zassert_true((((uintptr_t)q) & (align - 1)) == 0, "block not aligned"); in check_heap_align()
36 zassert_true(r != NULL, "second aligned allocation failed"); in check_heap_align()
37 zassert_true((((uintptr_t)r) & (align - 1)) == 0, "block not aligned"); in check_heap_align()
|
| /Zephyr-Core-3.5.0/subsys/logging/backends/ |
| D | Kconfig.adsp_hda | 47 HDA requires transfers be 128 byte aligned such that a partial message may
49 aligned address. This may or may not work depending on the log format
|
| /Zephyr-Core-3.5.0/drivers/flash/ |
| D | Kconfig.simulator | 21 If selected, the reading operation does not check if access is aligned.
23 a specific FLASH interface that requires aligned read access.
|
| D | flash_gd32_v1.c | 21 /* Some GD32 FMC v1 series require offset and len to word aligned. */
73 /* Check offset and len is flash_prg_t aligned. */ in flash_gd32_valid_range()
80 /* Check offset and len is word aligned. */ in flash_gd32_valid_range()
|
| /Zephyr-Core-3.5.0/arch/x86/zefi/ |
| D | efi.ld | 20 * need to be page-aligned and can be immediately after text/rodata */
23 /* Must be page-aligned or EFI balks */
|
| /Zephyr-Core-3.5.0/lib/libc/newlib/ |
| D | Kconfig | 35 int "Newlib aligned heap size"
41 regions be sized to a power of two and aligned to their size,
|
| /Zephyr-Core-3.5.0/tests/kernel/mem_heap/mheap_api_concept/src/ |
| D | test_mheap_api.c | 157 zassert_not_equal(NULL, r, "aligned alloc of 1 byte failed"); in ZTEST()
158 /* r is suitably aligned */ in ZTEST()
160 "%p not %u-byte-aligned", in ZTEST()
167 zassert_not_equal(NULL, r, "16-byte-aligned alloc failed"); in ZTEST()
168 /* r is suitably aligned */ in ZTEST()
170 "%p not 16-byte-aligned", r); in ZTEST()
|
| /Zephyr-Core-3.5.0/include/zephyr/drivers/ |
| D | cache.h | 86 * could be triggered by hardware at any time, so having an aligned
107 * data loss and/or corruption. When @p addr is not aligned to the cache
130 * time, so having an aligned @p addr or a padded @p size is not strictly
220 * could be triggered by hardware at any time, so having an aligned
241 * data loss and/or corruption. When @p addr is not aligned to the cache
264 * time, so having an aligned @p addr or a padded @p size is not strictly
|
| /Zephyr-Core-3.5.0/include/zephyr/sd/ |
| D | sdmmc.h | 27 * should be aligned to CONFIG_SDHC_BUFFER_ALIGNMENT
44 * should be aligned to CONFIG_SDHC_BUFFER_ALIGNMENT
|
| D | mmc.h | 27 * should be aligned to CONFIG_SDHC_BUFFER_ALIGNMENT
44 * should be aligned to CONFIG_SDHC_BUFFER_ALIGNMENT
|
| /Zephyr-Core-3.5.0/tests/arch/arm/arm_sw_vector_relay/src/ |
| D | arm_sw_vector_relay.c | 49 "vector table not properly aligned: 0x%x\n", in ZTEST()
52 "vector relay table not properly aligned: 0x%x\n", in ZTEST()
|
| /Zephyr-Core-3.5.0/include/zephyr/arch/ |
| D | cache.h | 96 * could be triggered by hardware at any time, so having an aligned
119 * data loss and/or corruption. When @p addr is not aligned to the cache
144 * time, so having an aligned @p addr or a padded @p size is not strictly
251 * could be triggered by hardware at any time, so having an aligned
274 * data loss and/or corruption. When @p addr is not aligned to the cache
299 * time, so having an aligned @p addr or a padded @p size is not strictly
|
| /Zephyr-Core-3.5.0/soc/riscv/riscv-privileged/common/ |
| D | vector.S | 35 * mtvec.base must be aligned to 64 bytes (this is done using
68 * NOTE: _irq_vector_table is 256-byte aligned. Incorrect alignment
|
| /Zephyr-Core-3.5.0/kernel/include/ |
| D | kernel_arch_interface.h | 61 * The provided stack pointer is guaranteed to be properly aligned with respect
70 * @param stack_ptr Aligned initial stack pointer
253 * are assumed to be aligned to CONFIG_MMU_PAGE_SIZE.
279 * @param virt Page-aligned Destination virtual address to map
280 * @param phys Page-aligned Source physical address to map
281 * @param size Page-aligned size of the mapped memory region in bytes
296 * are assumed to be aligned to CONFIG_MMU_PAGE_SIZE.
309 * @param addr Page-aligned base virtual address to un-map
310 * @param size Page-aligned region size
328 * @param virt Page-aligned virtual address
[all …]
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| /Zephyr-Core-3.5.0/drivers/sdhc/ |
| D | Kconfig.mcux_sdif | 24 # SDIF DMA needs 32 bit aligned buffers
|
| /Zephyr-Core-3.5.0/doc/kernel/usermode/ |
| D | mpu_stack_objects.rst | 46 Some MPUs require that each region be aligned to a power of two. These SoCs
48 This means that a 1500 byte stack should be aligned to a 2kB boundary and the
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