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/nrf_hw_models-3.6.0/docs/
DREADME_HW_models.md9 The purpose of these models is to provide a good enoug HW model for BLE
24 Overall these models have a time granularity of 1us.
30 using a very nimble engine provided by the native simulator, the "hw scheduler".
34 In reality any action performed by a HW peripheral will take some amount of
38 Such processes will just be implemented as a C function (or a set of them),
41 Other processes do take a considerable amount of time, like for example sending
42 a radio packet, or generating a random number.<br>
43 Such processes will be modelled in a bit more complex way:
46 * When needed these timers will be set at a point in the future where some
48 * Whenever that time is reached, the HW scheduler will call a function in that
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DUART.md3 A model of the UART and UART-E peripherals is included with these models.
9 * A peripheral model, which emulates both the nRF UART and UART-E.
10 * A backend which can send and receive the data somewhere.
19 Each UART can be configured to log to a file the Tx and/or Rx bytes.
22 The first column is a timestamp, in microseconds, when the frame *ended*;
27 The UART also has a test API which allows embedded code to register callbacks to be
28 called whenever a byte is transmitted or received. This callback can replace the byte before
51 Therefore you cannot connect this backend to a console, or real devices.
60 The backend will also realize about a possible abrupt disconnect from the other side.
62 In case of a graceful disconnect from the other side, the backend will, by default, also
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DGPIO.md3 A model of the GPIO peripherals (both P0 and P1 ports) is included with these models.
10 * Do not allow outputs drivers to be in a tristate mode (an output can be disconnected, but not
15 That is, inputs just sample the input pin, and outputs just deliver a logical level: high or low.
24 * By shortcuiting the input and output, either set from a configuration file
30 It is possible to have the GPIOs output activity dumped into a file.
37 This is a comma separated file (.csv), with 4 columns: time,port,pin,level. Where:
38 * Time is a 64 bit unsigned value, representing time in microseconds since boot.
39 * Port is the GPIO port number starting from 0 (for a nrf52833: 0 or 1).
40 * Pin is the pin number in that port (for a nrf52833: 0..31 for port 0, and 0..9 for port 1)
74 Each pair separated by a dot. The first value of each pair being the port number,
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DLICENSE38 transformation or translation of a Source form, including but
43 Object form, made available under the License, as indicated by a
50 represent, as a whole, an original work of authorship. For the purposes
67 designated in writing by the copyright owner as "Not a Contribution."
70 on behalf of whom a Contribution has been received by Licensor and
74 this License, each Contributor hereby grants to You a perpetual,
81 this License, each Contributor hereby grants to You a perpetual,
89 institute patent litigation against any entity (including a
90 cross-claim or counterclaim in a lawsuit) alleging that the Work
91 or a Contribution incorporated within the Work constitutes direct
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DREADME_impl_status.md3 Currently peripherals of a nRF52833 and nrf5340 SOCs are modelled at varying degrees:
20 | **CACHE** | Instruction/data cache | N/A | &#x10102; | |
24 | **DPPI** | Distributed programmable peripheral interconnect | N/A | &#x2705; | |
31 | **IPC** | Interprocessor communication | N/A | &#x2714; | See [NHW_IPC.c](../src/HW_models/NHW_IP…
34 | **MUTEX** | Mutual exclusive peripheral | N/A | &#x2705; | |
35 | **MWU** | Memory watch unit | &#x10102; | N/A | |
38 | **OSCILLATORS** | Oscillator control | N/A | &#x10102; | |
41 | **PPI** | Programmable peripheral interconnect | &#x2705; | N/A | Complete but some peripheral co…
45 | **REGULATORS** | Regulator control | N/A | &#x10102; | |
46 | **RESET** | Reset control | N/A | &#x2610; | Only register stubs |
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/nrf_hw_models-3.6.0/src/HW_models/
Dbs_compat.c10 * Note: This is a replica of
17 * If missing, attempt to create all folders in a file path
19 * The path is assumed to be a path to either a folder or a file,
20 * but if to a folder, it must end with a '/'.
22 * (assuming it is a file name)
DNRF_GPIO.c12 * * Note a.1:
13 * PIN_CNF.PULL is ignored. If a pin input is disconnected and not driven externally it will
15 * * Note a.2:
17 * It is not possible to connect two outputs together building a logical AND or OR
18 * * Note a.3:
20 * * Note a.4: There is no modeling of system idle/off, and as such a DETECT raising edge from the
25 * If a DIR bit is cleared for a pin which was being driven as a high output,
32 * * In real HW, after a write to LATCH, the DETECT event output to the GPIOTE is kept low for
33 * a few clocks, before being raised again (if it needs to), in the model the new pulse/raise
60 static uint32_t INPUT_mask[NRF_GPIOS]; /* As a 32bit mask, PIN_CNF[*].INPUT (0: enabled; 1: disable…
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DNHW_RADIO.c2 * Copyright (c) 2017 Oticon A/S
43 …* * In CCA Mode2 & 3, this model (due to the Phy) does not search for a SFD, or for a corr…
44 …* instead it searches for a compatible modulation of sufficient power (which is in line …
59 * a) It is not generated at the exact correct time:
65 * In any case this seems to be a debug signal, and a quite imprecise one,
67 …* b) it is only generated when there is a full address match. While in real HW this is not…
75 * Note20: The LQI value is based on a single measurement at the end of the SFD.
94 * A diagram of the main state machine can be found in docs/RADIO_states.svg
95 …* That main state machine is driven by a timer (Timer_RADIO) which results in calls to nhw_radio…
96 * and the tasks which cause transitions and/or the timer to be set to a new value.
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DNRF_HWLowL.c2 * Copyright (c) 2017 Oticon A/S
14 * This is a minor debug switch to allow running the device without needing
16 * during boot, or if running a test without any radio activity.
18 * device will crash with a "not connected" error
27 * Return the equivalent phy time from a device time
42 * Return the equivalent device time from a phy time
58 * (if we are advancing it a lot relative to the phy time while idling in the radio)
59 * we can use this function to cause a wait
83 * Wait until the Phy reaches a given *Phy* simulated time
Dirq_ctrl.c2 * Copyright (c) 2017 Oticon A/S
10 * Note: In principle this should have been a model of the ARM NVIC
13 * But so far it is just a general INT controller that provides
14 * a reasonable emulation of the NVIC functionality used in Zephyr
17 * This file provides the implementation of a generic interrupt controller,
24 * Each interrupt has a configurable priority (256 levels).
80 bool awaking_CPU; /* Is this instance raising an interrupt to the CPU in a delta cycle */
120 * Get the currently pending highest priority interrupt which has a priority
121 * higher than a possibly currently running interrupt
157 * The interrupt lock is a flag that provisionally disables all interrupts
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DNHW_RADIO_priv.h2 * Copyright (c) 2017 Oticon A/S
20 …RAD_DISABLED = 0, //No operations are going on inside the radio and the power consumption is at a
29 RAD_TX, //The radio is transmitting a packet
32 RAD_CCA_ED, //We are in either a CCA or ED procedure
33 …//Not a real HW state. In real HW the RADIO is in RXIDLE or some other RX state. Seems the CCA and…
66 bool CCA_notED; //Is it a CCA procedure (1), or ED procedure (0)
DNHW_DPPI.c12 * * Unlike in real HW, if a set of SUBSCRIBE_CHG[n].EN and SUBSCRIBE_CHG[n].DIS
29 * Future impl note: A list of pended callbacks could be created,
37 * Each DPPI has a configurable number of channels and of channel groups.
38 * Each DPPI is also connected to a DPPI (for task subscription) as per the configuration.
46 * Instead, when a peripheral subscribe register is written, if the subscription is
48 * This is done by keeping a list of subscribed callbacks in nhw_dppi_st.registry[channel]
51 * When a peripheral publishes an event to a channel, the DPPI will go thru
90 /* DPPI interface as a "normal peripheral" to a DPPI: */
128 * to a given channel, the registry will be allocated in nhw_dppi_init()
227 * Subscribe a peripheral to a DPPI channel
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Dfake_timer.c2 * Copyright (c) 2017 Oticon A/S
9 * This is a model of a fake HW device which is used by the k_busy_wait() function
10 * replacement. It is a timer which will awake the embedded CPU even if interrupts are
64 * If there was a previous request for an earlier time, the old one will prevail
Dbstest_ticker.c2 * Copyright (c) 2017 Oticon A/S
9 * This is a fake HW device timer (one instance per embedded CPU)
10 * which aids in the execution of a test application which
24 bs_time_t ticker_timer; /* Next time to awake either by the timer or a awake_cpu_asap() call */
80 * Set the FW_test ticker to trigger periodically, with a period of <tick_period>
140 * Awake the MCU as soon as possible (in this same microsecond, in a following delta)
DNHW_RADIO_bitcounter.c2 * Copyright (c) 2017 Oticon A/S
8 * We treat it as a sub-peripheral
32 …//Note that we leave the bit counter running, so a new BCC can be programmed to make it trigger la… in nrf_radio_bitcounter_timer_triggered()
72 bs_trace_warning_line_time("NRF_RADIO: Reprogrammed bitcounter with a BCC which has already" in nhw_RADIO_regw_sideeffects_BCC()
DNHW_UART.c27 * * After a StartTx, the UART is ready to Tx right away
36 * * (UART) In UART mode, in real HW, a TASK_STOPTX would break a currently ongoing Tx frame
37 * mid way, while in this model, the Tx is allowed to finish (just like for a TASK_SUSPEND
38 * or a TASK_STOPTX in UART-E mode).
39 * Due to this, in the model, a (UART) TASK_SUSPEND is equivalent to a combination of
42 …* * (UART) In real HW, it is unclear what happens when a STOPTX (in UART mode) is triggered, whi…
43 …* a byte is queued for transmission (TXD was written), but where the transmission hasn't start…
46 * * (UARTE) In real HW, when a STOPTX task is triggered (in UARTE mode),
47 * while a byte is queued for transmission, but where the transmission hasn't started yet
52 * * (UART & UARTE) It seems in real HW the Rx FIFO status is kept after a STOPRX & a new STARTRX.
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DNRF_GPIO_backend.c10 * * Outputs changes can be recorded in a file
11 * * Inputs can be driver from a file
12 * * Outputs can be short-circuited to inputs thru a configuration file
101 .descript="Optional path to a file containing GPIOs inputs activity", in nrf_gpio_register_cmd_args()
108 .descript="Optional path to a file where GPIOs output activity will be saved", in nrf_gpio_register_cmd_args()
115 .descript="Optional path to a file where the GPIOs configuration will be found.", in nrf_gpio_register_cmd_args()
166 * Read a line from a file into a buffer (s), while
210 * Normally this is automatically called when a gpio configuration file
211 * defines a short-circuit, but it can also be called from test code.
392 if (strncmp(line_buf,"time",4) == 0) { /* Let's skip a possible csv header line */ in nrf_gpio_init_input_file()
DBLECrypt_if.c2 * Copyright (c) 2018 Oticon A/S
9 * You may obtain a copy of the License at
165 * Generate quickly a "nonce" as a concatenation of the tx_packet_counter and IV in BLECrypt_if_encrypt_packet()
183 …const uint8_t* encrypted_packet_payload, //as received from the air (including a MIC if has_m… in BLECrypt_if_decrypt_packet()
189 uint8_t *mic_error /*was there a mic error in the packet (only if has_mic==1)*/ in BLECrypt_if_decrypt_packet()
198 //if the receiver thinks we have a packet with MIC but the transmitter did in BLECrypt_if_decrypt_packet()
200 //real AES block should mark as a mic_error. in BLECrypt_if_decrypt_packet()
DNHW_RADIO_signals.c2 * Copyright (c) 2017 Oticon A/S
10 * For signals, when a signal is generated:
136 * triggered when a HW counter/timer triggers a bit later in nhw_RADIO_signal_EVENTS_DISABLED()
139 /* This is a fake task meant to start a HW timer for the TIFS in nhw_RADIO_signal_EVENTS_DISABLED()
141 * In that case, the TXEN or RXEN will be triggered in a small in nhw_RADIO_signal_EVENTS_DISABLED()
DBLECrypt_if.h2 * Copyright (c) 2018 Oticon A/S
8 * You may obtain a copy of the License at
39 …const uint8_t* encrypted_packet_payload, //as received from the air (including a MIC if has_m…
45 uint8_t *mic_error /*was there a mic error in the packet (only if has_mic==1)*/
DNHW_RTC.c2 * Copyright (c) 2017 Oticon A/S
27 * * Triggering a task (Thru the PPI or register write) starts the operation
30 * takes for the peripheral to clock a falling edge and a rising edge of the LFCLK.")
34 * * A STOP task stops the counter immediately.
36 * * As the CLEAR task does not have delay, a SHORT of COMPARE<n>_CLEAR will cause the
51 * clock must be ready before the RTC can be used, yet that a TRIGOVRFLW task
58 * * Note this model does not yet automatically request the LFCLK (for a nRF5340)
67 * In a naive (but very simple) implementation the RTC model could be called
71 * trigger and sets a timer for its callback.
72 * There is one common timer exposed to the HW scheduler, and a set of internal timers
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DNHW_RADIO_utils.c2 * Copyright (c) 2017 Oticon A/S
157 * A few checks to ensure the model is only used with the currently supported packet format
206 * Prepare a Phy Rxv2 request structure
242 …pre_trunc = 0; //The modem can lose a lot of preamble and sync (~7us), we leave it as 0 by now to … in nhwra_prep_rx_request()
250 …pre_trunc = 0; //The modem can lose a lot of preamble and sync (~7us), we leave it as 0 by now to … in nhwra_prep_rx_request()
292 * Prepare a Phy Tx request structure
344 * Prepare a Phy CCA request structure
480 * Assemble a packet to be transmitted out thru the air into tx_buf[]
535 …bs_trace_error_time_line("NRF_RADIO: Transmitting a packet longer than the configured MAXLEN (%i>%… in nhwra_tx_copy_payload()
536 "This would truncate it and a corrupted packet will be transmitted. " in nhwra_tx_copy_payload()
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/nrf_hw_models-3.6.0/src/nrfx/hal/
Dnrf_hack.c38 …* Given a peripheral task/event (task_event) value (A value of a nrf_<peri>_task_t or nrf_<peri>_e…
39 * return true if it is a task, or false if it is an event
57 * Given a pointer to a task or event register in an unknown peripheral
59 * **p_reg: A pointer to the register base address
97 bs_trace_error_time_line("Tried to look for a task register not known to these HW models\n");
142 bs_trace_error_time_line("Tried to look for a task register not known to these HW models\n");
151 * Given a *<subscribe>* register (NOT a task register),
177 * Given a *<subscribe>* register (NOT a task register),
/nrf_hw_models-3.6.0/src/nrfx/nrfx_replacements/
Dnrfx_glue_bsim.h7 /* Provides a minimalistic nrfx_glue to be used with Nordic nrfx and bsim.
18 * @brief Macro for placing a runtime assertion.
26 /** @brief Macro for entering into a critical section. */
31 /** @brief Macro for exiting from a critical section. */
/nrf_hw_models-3.6.0/src/nrfx_config/
DREADME.md2 This folder includes a sample of nrfx configuration files.
3 These are not to be used when building a zephyr application.

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