XCLK (full) in projects: Zephyr-latest - OpenGrok search results

/Zephyr-latest/dts/bindings/gpio/
D	nxp,cam-44pins-connector.yaml	`25 34 XCLK D2 33`
/Zephyr-latest/soc/intel/intel_adsp/cavs/include/cavs25/
D	dmic_regs.h	`312 /* Nnumber of data entries supported in the PCM XCLK FIFO per FIR output. */`
/Zephyr-latest/soc/intel/intel_adsp/ace/include/
D	dmic_regs.h	`330 /* Nnumber of data entries supported in the PCM XCLK FIFO per FIR output. */`
/Zephyr-latest/boards/shields/nxp_btb44_ov5640/doc/
D	index.rst	`87 \| 34 \| XCLK \|`
/Zephyr-latest/drivers/video/
D	ov7670.c	`204 * Note that this table assumes the camera is fed a 6MHz XCLK signal`
/Zephyr-latest/boards/espressif/esp_wrover_kit/doc/
D	index.rst	`337 \| 8 \| GPIO21 \| XCLK / System Clock \|`