Home
last modified time | relevance | path

Searched full:vbat (Results 1 – 25 of 137) sorted by relevance

123456

/Zephyr-latest/dts/bindings/sensor/
Dst,stm32-vbat.yaml4 description: STM32 family VBAT node
8 compatible: "st,stm32-vbat"
13 description: ADC channel for Vbat sensor
18 description: fraction of VBat to be connected to the ADC input
Dnordic,npm2100-vbat.yaml9 compatible: "nordic,npm2100-vbat"
21 vbat-min-microvolt:
/Zephyr-latest/dts/bindings/regulator/
Drenesas,da1469x-regulator.yaml26 Enables clamp that can supply V30 from VBAT.
31 renesas,regulator-v30-vbat:
34 Allow V30 to be powered from VBAT.
35 renesas,regulator-dcdc-vbat-high:
39 renesas,regulator-dcdc-vbat-low:
/Zephyr-latest/samples/boards/st/backup_sram/
DREADME.rst10 NVM when VBAT pin is supplied with a voltage source, e.g. a coin button cell.
14 VBAT is preserved, the incremented value will be shown on the next power-cycle.
18 On most boards VBAT is typically connected to VDD thanks to a jumper.
19 To exercise this sample with an independent VBAT source, you will need to
41 Keep VBAT power source and reset the board now!
/Zephyr-latest/soc/microchip/mec/mec172x/reg/
Dmec172x_vbat.h13 /* VBAT Registers Registers */
64 /* 32K silicon OSC when chip powered by VBAT or VTR */
66 /* 32K external crystal when chip powered by VBAT or VTR */
68 /* 32K input pin on VTR. Switch to Silicon OSC on VBAT */
70 /* 32K input pin on VTR. Switch to crystal on VBAT */
72 /* Disable internal 32K VBAT clock source when VTR is off */
92 /** @brief VBAT Register Bank (VBATR) */
/Zephyr-latest/dts/arm/st/f0/
Dstm32f031.dtsi55 /* All STM32F0 series have ADC VBAT channel, except STM32F0x0 value line */
56 vbat: vbat { label
57 compatible = "st,stm32-vbat";
/Zephyr-latest/drivers/sensor/st/stm32_vbat/
DKconfig7 bool "STM32 Vbat Sensor"
14 Enable driver for STM32 Vbat sensor and then also ADC
/Zephyr-latest/dts/bindings/memory-controllers/
Dst,stm32-backup-sram.yaml7 With a battery connected to the VBAT pin, the backup SRAM can be used to
8 retain data during low-power mode (Standby and VBAT mode).
Dst,stm32-bbram.yaml9 powered-on by VBAT when the VDD power is switched off. They are not reset
/Zephyr-latest/include/zephyr/drivers/sensor/
Dnpm2100_vbat.h11 /* NPM2100 vbat specific channels */
20 /* NPM2100 vbat specific attributes */
/Zephyr-latest/samples/drivers/clock_control_xec/src/
Dmain.c45 LOG_INF("MEC152x VBAT Clock registers"); in vbat_clock_regs()
73 LOG_INF("MEC152x VBAT Power-Fail-Reset-Status = 0x%x", pfrs); in vbat_power_fail()
76 LOG_INF("WARNING: VBAT POR. Clock control register settings lost during" in vbat_power_fail()
103 LOG_INF("Periph 32K clock source is InternalOSC(VTR) and InternalOSC(VBAT)"); in print_periph_clock_src()
105 LOG_INF("Periph 32K clock source is XTAL(VTR) and XTAL(VBAT)"); in print_periph_clock_src()
107 LOG_INF("Periph 32K clock source is 32KHZ_PIN(VTR) and InternalOSC(VBAT)"); in print_periph_clock_src()
172 LOG_INF("MEC172x VBAT Power-Fail-Reset-Status = 0x%x", pfrs); in vbat_power_fail()
175 LOG_INF("WARNING: VBAT POR. Clock control register settings" in vbat_power_fail()
179 /* clear VBAT powered status */ in vbat_power_fail()
/Zephyr-latest/samples/drivers/led/xec/
DREADME.rst53 to the VBAT rail via a 100K pull-up. Requires VBAT power rail is connected
62 to the VBAT rail via a 100K pull-up. Requires VBAT power rail is connected
/Zephyr-latest/dts/bindings/rtc/
Dnxp,pcf8523.yaml53 - standard: The power failure condition happens when VDD < VBAT and VDD < Vth(sw)bat
54 - direct: The power failure condition happens when VDD < VBAT
/Zephyr-latest/dts/bindings/power/
Dtelink,b91-power.yaml22 vbat-type:
/Zephyr-latest/dts/arm/renesas/smartbond/
Dda1469x.dtsi109 renesas,regulator-dcdc-vbat-high;
110 renesas,regulator-dcdc-vbat-low;
124 renesas,regulator-dcdc-vbat-high;
125 renesas,regulator-dcdc-vbat-low;
130 renesas,regulator-dcdc-vbat-high;
136 renesas,regulator-dcdc-vbat-high;
143 renesas,regulator-v30-vbat;
/Zephyr-latest/drivers/bbram/
DKconfig.stm3215 powered-on by VBAT when the VDD power is switched off. They are not reset
/Zephyr-latest/boards/st/nucleo_f031k6/
Dnucleo_f031k6.dts41 volt-sensor1 = &vbat;
121 &vbat {
/Zephyr-latest/boards/st/nucleo_f042k6/
Dnucleo_f042k6.dts41 volt-sensor1 = &vbat;
117 &vbat {
/Zephyr-latest/boards/st/nucleo_f303k8/
Dnucleo_f303k8.dts41 volt-sensor1 = &vbat;
118 &vbat {
/Zephyr-latest/boards/st/nucleo_l552ze_q/
Dnucleo_l552ze_q-common.dtsi41 volt-sensor1 = &vbat;
119 &vbat {
/Zephyr-latest/dts/bindings/adc/
Dst,stm32wb0-adc.yaml26 I/O Booster block is always disabled. This property MUST be set if VBAT voltage
/Zephyr-latest/dts/bindings/gpio/
Dnordic-thingy53-edge-connector.yaml7 P2 VBat
/Zephyr-latest/include/zephyr/dt-bindings/clock/
Dmchp_xec_pcr.h15 /* Peripheral 32KHz clock source for VTR rail ON and off(VBAT operation) */
/Zephyr-latest/drivers/charger/
Dcharger_bq25180.c105 uint8_t *vbat) in bq25180_mv_to_vbatreg() argument
114 *vbat = (voltage_mv - BQ25180_VOLTAGE_MIN_MV) / BQ25180_FACTOR_VBAT_TO_MV; in bq25180_mv_to_vbatreg()
119 static uint32_t bq25180_vbatreg_to_mv(uint8_t vbat) in bq25180_vbatreg_to_mv() argument
121 vbat &= BQ25180_VBAT_MSK; in bq25180_vbatreg_to_mv()
123 return (vbat * BQ25180_FACTOR_VBAT_TO_MV) + BQ25180_VOLTAGE_MIN_MV; in bq25180_vbatreg_to_mv()
/Zephyr-latest/boards/st/nucleo_f302r8/
Dnucleo_f302r8.dts46 volt-sensor1 = &vbat;
136 &vbat {

123456