| /Zephyr-Core-2.7.6/drivers/serial/ |
| D | uart_sam.c | 10 * @brief UART driver for Atmel SAM MCU family.
22 #include <drivers/uart.h>
26 Uart *regs;
52 static int baudrate_set(Uart *const uart, uint32_t baudrate,
61 Uart *const uart = cfg->regs; in uart_sam_init() local
63 /* Enable UART clock in PMC */ in uart_sam_init()
70 /* Reset and disable UART */ in uart_sam_init()
71 uart->UART_CR = UART_CR_RSTRX | UART_CR_RSTTX in uart_sam_init()
75 uart->UART_IDR = 0xFFFFFFFF; in uart_sam_init()
78 * driven by the peripheral clock, UART does not filter the receive line in uart_sam_init()
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| D | uart_imx.c | 10 * @brief Driver for UART on NXP IMX family processor.
21 #include <drivers/uart.h>
46 * @brief Initialize UART channel
49 * It is assumed that this function is called only once per UART.
51 * @param dev UART device struct
57 UART_Type *uart = UART_STRUCT(dev); in uart_imx_init() local
64 /* Setup UART init structure */ in uart_imx_init()
74 initConfig.clockRate = get_uart_clock_freq(uart); in uart_imx_init()
76 UART_Init(uart, &initConfig); in uart_imx_init()
78 /* Set UART build-in hardware FIFO Watermark. */ in uart_imx_init()
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| D | uart_stellaris.c | 1 /* stellarisUartDrv.c - Stellaris UART driver */
12 * @brief Driver for Stellaris UART
14 * Driver for Stellaris UART found namely on TI LM3S6965 board. It is similar to
16 * It is also register-compatible with the UART found on TI CC2650 SoC,
28 #include <drivers/uart.h>
33 /* Stellaris UART module */
119 /* muxed UART registers */
154 * This routine set the given baud rate for the UART.
156 * @param dev UART device struct
165 volatile struct _uart *uart = UART_STRUCT(dev); in baudrate_set() local
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| D | uart_sifive.c | 8 * @brief UART driver for the SiFive Freedom Processor
15 #include <drivers/uart.h>
80 * @param dev UART device struct
86 volatile struct uart_sifive_regs_t *uart = DEV_UART(dev); in uart_sifive_poll_out() local
89 while (uart->tx & TXDATA_FULL) { in uart_sifive_poll_out()
92 uart->tx = (int)c; in uart_sifive_poll_out()
98 * @param dev UART device struct
105 volatile struct uart_sifive_regs_t *uart = DEV_UART(dev); in uart_sifive_poll_in() local
106 uint32_t val = uart->rx; in uart_sifive_poll_in()
122 * @param dev UART device struct
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| D | uart_b91.c | 11 #include <drivers/uart.h>
19 /* Get UART instance */
23 /* Get UART configuration */
29 /* UART TX buffer count max value */
43 /* B91 UART registers structure */
58 /* B91 UART data structure */
69 /* B91 UART config structure */
109 static inline uint8_t uart_b91_get_tx_bufcnt(volatile struct uart_b91_t *uart) in uart_b91_get_tx_bufcnt() argument
111 return (uart->bufcnt & FLD_UART_TX_BUF_CNT) >> FLD_UART_TX_BUF_CNT_OFFSET; in uart_b91_get_tx_bufcnt()
115 static inline uint8_t uart_b91_get_rx_bufcnt(volatile struct uart_b91_t *uart) in uart_b91_get_rx_bufcnt() argument
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| D | Kconfig.native_posix | 4 bool "UART driver for native_posix"
8 This enables a UART driver for the POSIX ARCH with up to 2 UARTs.
9 For the first UART port, the driver can be configured
11 one dedicated pseudoterminal for that UART.
16 prompt "Native UART Port 0 connection"
20 bool "Connect the UART to its own pseudo terminal"
22 Connect this UART to its own pseudoterminal. This is the preferred
28 bool "Connect the UART to the invoking shell stdin/stdout"
30 Connect this UART to the stdin & stdout of the calling shell/terminal
33 Note that other, non UART messages, will also be printed to the
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| D | Kconfig.rv32m1_lpuart | 17 bool "UART 0"
19 Enable UART 0.
22 bool "UART 1"
25 Enable UART 1.
28 bool "UART 2"
31 Enable UART 2.
34 bool "UART 3"
37 Enable UART 3.
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| D | Kconfig.pl011 | 5 bool "ARM PL011 UART Driver"
9 This option enables the UART driver for the PL011
14 bool "Enable driver for UART 0"
16 Build the driver to utilize UART controller Port 0.
19 bool "Enable driver for UART 1"
21 Build the driver to utilize UART controller Port 1.
24 bool "Enable SBSA UART"
28 among other things defines simplified UART interface
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| D | Kconfig.rtt | 1 # Virtual UART RTT driver option
7 bool "Enable UART RTT driver"
11 This option enables access RTT channel as UART device.
16 DT_COMPAT_SEGGER_RTT_UART := segger,rtt-uart
25 …Enable UART on (default) RTT channel 0. Default channel has to be configured in non-blocking skip …
33 Enable UART on RTT channel 1
41 Enable UART on RTT channel 2
49 Enable UART on RTT channel 3
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| D | uart_miv.c | 11 #include <drivers/uart.h>
14 /* UART REGISTERS DEFINITIONS */
159 volatile struct uart_miv_regs_t *uart = DEV_UART(dev); in uart_miv_poll_out() local
161 while (!(uart->status & STATUS_TXRDY_MASK)) { in uart_miv_poll_out()
164 uart->tx = c; in uart_miv_poll_out()
169 volatile struct uart_miv_regs_t *uart = DEV_UART(dev); in uart_miv_poll_in() local
171 if (uart->status & STATUS_RXFULL_MASK) { in uart_miv_poll_in()
172 *c = (unsigned char)(uart->rx & RXDATA_MASK); in uart_miv_poll_in()
181 volatile struct uart_miv_regs_t *uart = DEV_UART(dev); in uart_miv_err_check() local
182 uint32_t flags = uart->status; in uart_miv_err_check()
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| D | Kconfig.xlnx | 1 # Xilinx UART configuration
12 This option enables the UART driver for Xilinx MPSoC platforms.
15 bool "Xilinx UART Lite"
19 This option enables the UART driver for Xilinx UART Lite IP.
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| D | Kconfig.nrfx | 1 # nrfx UART configuration
7 bool "nRF UART nrfx drivers"
14 Enable support for nrfx UART drivers for nRF MCU series.
21 DT_COMPAT_NORDIC_NRF_UART := nordic,nrf-uart
29 Enable nRF UART without EasyDMA on port 0.
35 Enable nRF UART with EasyDMA on port 0.
52 This option enables UART interrupt support on port 0.
59 This option enables UART Asynchronous API support on port 0.
104 If enabled, the driver will configure the GPIOs used by the uart to
106 will be configured back to correct state when UART is powered up.
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| D | uart_cmsdk_apb.c | 10 * @brief Driver for UART on ARM CMSDK APB UART.
12 * UART has two wires for RX and TX, and does not provide CTS or RTS.
20 #include <drivers/uart.h>
23 /* UART registers struct */
41 /* UART Bits */
70 /* UART Clock control in Active State */
72 /* UART Clock control in Sleep State */
74 /* UART Clock control in Deep Sleep State */
94 * This routine set the given baud rate for the UART.
96 * @param dev UART device struct
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| /Zephyr-Core-2.7.6/drivers/wifi/eswifi/ |
| D | eswifi_bus_uart.c | 20 #include <drivers/uart.h>
48 static void eswifi_iface_uart_flush(struct eswifi_uart_data *uart) in eswifi_iface_uart_flush() argument
52 while (uart_fifo_read(uart->dev, &c, 1) > 0) { in eswifi_iface_uart_flush()
60 struct eswifi_uart_data *uart = &eswifi_uart0; /* Static instance */ in eswifi_iface_uart_isr() local
68 while (uart_irq_update(uart->dev) && in eswifi_iface_uart_isr()
69 uart_irq_rx_ready(uart->dev)) { in eswifi_iface_uart_isr()
71 partial_size = ring_buf_put_claim(&uart->rx_rb, &dst, in eswifi_iface_uart_isr()
76 eswifi_iface_uart_flush(uart); in eswifi_iface_uart_isr()
80 rx = uart_fifo_read(uart->dev, dst, partial_size); in eswifi_iface_uart_isr()
90 ring_buf_put_finish(&uart->rx_rb, total_size); in eswifi_iface_uart_isr()
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| /Zephyr-Core-2.7.6/include/drivers/console/ |
| D | uart_mux.h | 9 * @brief Public APIs for UART MUX drivers
16 * @brief UART Mux Interface
17 * @defgroup uart_mux_interface UART Mux Interface
23 #include <drivers/uart.h>
35 * the UART mux is attached properly.
37 * @param mux UART mux device
46 /** @brief UART mux driver API structure. */
50 * struct so that we are compatible with uart API. Note that currently
51 * not all of the UART API functions are implemented.
56 * Attach the mux to this UART. The API will call the callback after
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| /Zephyr-Core-2.7.6/samples/modules/tflite-micro/magic_wand/renode/ |
| D | litex-vexriscv-tflite.robot | 14 Wait For Line On Uart RING:
24 Wait For Line On Uart ${SPACE*10}*
25 Wait For Line On Uart ${SPACE*7}*${SPACE*5}*
26 Wait For Line On Uart ${SPACE*5}*${SPACE*9}*
27 Wait For Line On Uart ${SPACE*4}*${SPACE*11}*
28 Wait For Line On Uart ${SPACE*5}*${SPACE*9}*
29 Wait For Line On Uart ${SPACE*7}*${SPACE*5}*
30 Wait For Line On Uart ${SPACE*10}*
33 Wait For Line On Uart SLOPE:
44 Wait For Line On Uart ${SPACE*8}*
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| /Zephyr-Core-2.7.6/drivers/console/ |
| D | Kconfig | 36 bool "Use UART for console"
40 Enable this option to use one UART for console.
49 Console has to be initialized after the UART driver
63 bool "Enable UART console mcumgr passthrough"
66 Enables the UART console to receive mcumgr frames for image upgrade
67 and device management. When enabled, the UART console does not
72 bool "Enable support for UART console input expired mechanism"
77 the module for UART console is in use now. If the interval of console
80 allowed to enter sleep/deep sleep state and turn off the clock of UART
85 int "Fixed amount of time to keep the UART console in use flag true"
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| D | uart_mux.c | 15 #include <drivers/uart.h>
38 /* The UART mux contains information about the real UART. It will synchronize
39 * the access to the real UART and pass data between it and GSM muxing API.
41 * one UART connected to modem device.
44 /* The real UART device that is shared between muxed UARTs */
45 const struct device *uart; member
47 /* GSM mux related to this UART */
56 /* Mutex for accessing the real UART */
79 /* UART Mux Driver Status Codes */
82 UART_MUX_CONFIGURED, /* UART mux configuration done */
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| D | uart_mux_internal.h | 15 * @brief Send data to real UART (the data should be muxed already)
17 * @param uart Muxed uart
23 int uart_mux_send(const struct device *uart, const uint8_t *buf, size_t size);
28 * @param mux UART mux device structure.
29 * @param uart Real UART device structure.
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| D | uart_pipe.c | 2 * @brief Pipe UART driver
4 * A pipe UART driver allowing application to handle all aspects of received
19 #include <drivers/uart.h>
80 static void uart_pipe_setup(const struct device *uart) in uart_pipe_setup() argument
84 uart_irq_rx_disable(uart); in uart_pipe_setup()
85 uart_irq_tx_disable(uart); in uart_pipe_setup()
88 while (uart_fifo_read(uart, &c, 1)) { in uart_pipe_setup()
92 uart_irq_callback_set(uart, uart_pipe_isr); in uart_pipe_setup()
94 uart_irq_rx_enable(uart); in uart_pipe_setup()
|
| /Zephyr-Core-2.7.6/doc/reference/usb/ |
| D | uds_cdc_acm.rst | 11 But there are two important differences in behavior to a real UART controller:
18 The devicetree compatible property for CDC ACM UART is
19 :dtcompatible:`zephyr,cdc-acm-uart`.
23 About four CDC ACM UART instances can be defined and used,
26 CDC ACM UART node is supposed to be child of a USB device controller node.
30 node label. Often, CDC ACM UART is described in a devicetree overlay file
37 compatible = "zephyr,cdc-acm-uart";
44 devicetree to describe CDC ACM UART. The motivation behind using devicetree
45 is the easy interchangeability of a real UART controller and CDC ACM UART
48 Console over CDC ACM UART
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| /Zephyr-Core-2.7.6/dts/bindings/serial/ |
| D | nuvoton,npcx-uart.yaml | 4 description: Nuvoton, NPCX-UART node
6 compatible: "nuvoton,npcx-uart"
8 include: uart-controller.yaml
19 uart-rx:
23 Mapping table between Wake-Up Input (WUI) and uart rx START signal.
26 uart-rx = <&wui_cr_sin1>;
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| /Zephyr-Core-2.7.6/tests/drivers/uart/uart_mix_fifo_poll/ |
| D | testcase.yaml | 6 drivers.uart.uart_mix_poll:
14 drivers.uart.uart_mix_poll_fifo:
22 drivers.uart.uart_mix_poll_async_api:
34 drivers.uart.uart_mix_poll_async_api_low_power:
48 drivers.uart.uart_mix_poll_with_ppi:
56 drivers.uart.uart_mix_poll_fifo_with_ppi:
64 drivers.uart.uart_mix_poll_async_api_with_ppi:
76 drivers.uart.uart_mix_poll_async_api_with_ppi_low_power:
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| /Zephyr-Core-2.7.6/tests/drivers/uart/uart_basic_api/src/ |
| D | test_uart_fifo.c | 11 * @brief TestPurpose: verify UART works well in fifo mode
15 * -# Set UART IRQ callback using uart_irq_callback_set().
16 * -# Enable UART TX IRQ using uart_irq_tx_enable().
18 * -# Disable UART TX IRQ using uart_irq_tx_disable().
22 * -# Set UART IRQ callback using uart_irq_callback_set().
23 * -# Enable UART RX IRQ using uart_irq_rx_enable().
24 * -# Wait for data sent to UART console and trigger RX IRQ.
25 * -# Read data from UART console using uart_fifo_read().
26 * -# Disable UART TX IRQ using uart_irq_rx_disable().
28 * -# When test UART FIFO output, the number of characters actually
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| /Zephyr-Core-2.7.6/boards/arm/qemu_cortex_m3/ |
| D | qemu_cortex_m3.dts | 12 uart-0 = &uart0;
13 uart-1 = &uart1;
14 uart-2 = &uart2;
21 zephyr,shell-uart = &uart0;
22 zephyr,bt-uart = &uart2;
23 zephyr,uart-pipe = &uart1;
24 zephyr,bt-mon-uart = &uart2;
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