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/Zephyr-Core-3.7.0/doc/hardware/porting/
Dsoc_porting.rst3 SoC Porting Guide
6 This page describes how to add support for a new :term:`SoC` in Zephyr, be it in
9 SoC Definitions
16 For SoC porting, the most important terms are:
18 - SoC: the exact system on a chip the board's CPU is part of.
19 - SoC series: a group of tightly related SoCs.
20 - SoC family: a wider group of SoCs with similar characteristics.
31 Create your SoC directory
34 Each SoC must have a unique name. Use the official name given by the SoC vendor
36 contributed a SoC with identical name. If the SoC name is already in use, then
[all …]
/Zephyr-Core-3.7.0/modules/
DKconfig.mcux24 Set if the 12B1MSPS SAR ADC module is present in the SoC.
29 Set if the 12-bit ADC (ADC12) module is present in the SoC.
34 Set if the 16-bit ADC (ADC16) module is present in the SoC.
39 Set if the LPADC module is present in the SoC.
44 Set if the L1 or L2 cache is present in the SoC.
49 Set if the clock control module (CCM) module is present in the SoC.
54 Set if the revision 2 of clock control module (CCM) module is present in the SoC.
55 This is present in SoC's such as RT1170
60 Set if the syscon module is present in the SoC.
66 present in the SoC.
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DKconfig.vega11 Set if the low power uart (LPUART) module is present in the SoC.
16 Set if the low power i2c (LPI2C) module is present in the SoC.
21 Set if the low power spi (LPSPI) module is present in the SoC.
26 Set if the Timer/PWM (TPM) module is present in the SoC.
32 the SoC.
/Zephyr-Core-3.7.0/soc/
DKconfig.v15 config SOC config
8 SoC name. The value of this setting must be defined by the selected
9 SoC for hw model v2.
14 SoC series. The value of this setting must be defined by the selected
15 SoC if the SoC belongs to a common series.
20 SoC family. The value of this setting must be defined by the selected
21 SoC if the SoC belongs to a SoC family. Usually a SoC family also
22 indicates the vendor of the SoC.
24 # This loads custom SoC root Kconfig (only available if custom SoC root are defined)
25 osource "$(KCONFIG_BINARY_DIR)/soc/Kconfig.soc.arch"
DKconfig.v26 # SoCs that has transitioned to SoC scheme v2 are promptless, and thus
9 # SoC that are still using scheme v1 are still having a prompt but is loaded as
12 config SOC config
15 SoC name. The value of this setting must be defined by the selected
16 SoC for hw model v2.
21 SoC series. The value of this setting must be defined by the selected
22 SoC if the SoC belongs to a common series.
27 SoC family. The value of this setting must be defined by the selected
28 SoC if the SoC belongs to a SoC family. Usually a SoC family also
29 indicates the vendor of the SoC.
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DKconfig3 # Only v1 model has choice for SoC selection, therefore the optional source
4 # Sourced here and not in Kconfig.v1 to keep current SoC/CPU selection menu
12 # Source Zephyr Kconfig specifics from SoC roots.
13 osource "$(KCONFIG_BINARY_DIR)/soc/Kconfig"
16 osource "soc/common/Kconfig"
18 module = SOC
19 module-str = SOC
57 This hidden option is set in the SoC configuration and indicates
58 the Zephyr release that the SoC configuration will be removed.
59 When set, any build for that SoC will generate a clearly visible
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DCMakeLists.txt5 # Limit warning of shadow variables to in-tree SoC files for now.
26 add_subdirectory(${SOC_DIR}/${ARCH} soc/${ARCH})
28 add_subdirectory(${SOC_DIR}/${ARCH}/${SOC_PATH} soc/${ARCH}/${SOC_PATH})
31 # Below is inclusion of HWMv2 SoC CMake lists.
37 add_subdirectory(${${soc_setting_dir}} soc/${SOC_NAME})
39 add_subdirectory(${${series_setting_dir}} soc/${SOC_SERIES})
41 add_subdirectory(${${family_setting_dir}} soc/${SOC_FAMILY})
43 message(FATAL_ERROR "No CMakeLists.txt file found for SoC: ${SOC_NAME}, "
47 # Include all SoC roots except Zephyr, as we are already in the Zephyr SoC root.
52 # A SoC root for HWMv1 may not contain a CMakeLists.txt file on this so
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DKconfig.v1.choice6 prompt "SoC/CPU/Configuration Selection"
8 # This loads custom SoC root Kconfig (only available if custom SoC root are defined)
9 osource "$(KCONFIG_BINARY_DIR)/soc/Kconfig.soc.choice"
/Zephyr-Core-3.7.0/cmake/modules/
Dsoc_v1.cmake5 # Configure SoC settings based on Kconfig settings and SoC root.
8 # on Kconfig settings and selected SoC.
10 # If no implementation is available for the selected SoC an error will be raised.
15 # - SOC_NAME: Name of the SoC in use, identical to CONFIG_SOC
16 # - SOC_SERIES: Name of the SoC series in use, identical to CONFIG_SOC_SERIES
17 # - SOC_FAMILY: Name of the SoC family, identical to CONFIG_SOC_FAMILY
19 # - SOC_DIR: Directory containing the SoC implementation
23 # - SOC_ROOT: CMake list of SoC roots containing SoC implementations
34 # found. It always includes ${ZEPHYR_BASE}/soc at the lowest priority.
48 # Use SOC to search for a 'CMakeLists.txt' file.
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Dhwm_v2.cmake6 # all archs and SoC implementations defined in the Zephyr build system.
11 # The following files are generated in '<kconfig-binary-dir>/soc'
12 # - Kconfig.defconfig: Contains references to SoC defconfig files for Zephyr integration.
13 # - Kconfig: Contains references to regular SoC Kconfig files for Zephyr integration.
14 # - Kconfig.soc: Contains references to generic SoC Kconfig files.
15 # - Kconfig.sysbuild: Contains references to SoC sysbuild Kconfig files.
37 # implementations may be found. It always includes ${ZEPHYR_BASE}/[arch|soc]
43 list(TRANSFORM SOC_ROOT PREPEND "--soc-root=" OUTPUT_VARIABLE soc_root_args)
73 elseif(HWM_TYPE MATCHES "^soc|^series|^family")
78 if(HWM_TYPE STREQUAL "soc")
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Dsoc_v2.cmake5 # Configure SoC settings based on Kconfig settings.
8 # on Kconfig settings for the selected SoC.
13 # - SOC_NAME: Name of the SoC in use, identical to CONFIG_SOC
14 # - SOC_SERIES: Name of the SoC series in use, identical to CONFIG_SOC_SERIES
15 # - SOC_FAMILY: Name of the SoC family, identical to CONFIG_SOC_FAMILY
30 set(SOC_FULL_DIR ${SOC_V2_DIR} CACHE PATH "Path to the SoC directory." FORCE)
31 set_property(DIRECTORY APPEND PROPERTY CMAKE_CONFIGURE_DEPENDS ${SOC_V2_DIR}/soc.yml)
/Zephyr-Core-3.7.0/scripts/
Dlist_hardware.py21 SOC_SCHEMA_PATH = str(Path(__file__).parent / 'schemas' / 'soc-schema.yml')
29 SOC_YML = 'soc.yml'
53 socs = [(Soc(soc['name'],
54 [c['name'] for c in soc.get('cpuclusters', [])],
56 for soc in s.get('socs', [])]
62 socs = [(Soc(soc['name'],
63 [c['name'] for c in soc.get('cpuclusters', [])],
65 for soc in f.get('socs', [])]
71 socs = [(Soc(soc['name'],
72 [c['name'] for c in soc.get('cpuclusters', [])],
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/Zephyr-Core-3.7.0/boards/native/native_sim/
Dboard_soc.h8 * @file Extra definitions provided by the board to soc.h
11 * The POSIX ARCH/SOC/board layering is different than in normal archs
12 * The "SOC" does not provide almost any of the typical SOC functionality
14 * Device code may rely on the soc.h defining some things (like the interrupts
16 * Therefore this file is included from the inf_clock soc.h to allow a board
17 * to define that kind of SOC related snippets
/Zephyr-Core-3.7.0/soc/espressif/esp32c3/
Dsoc_irq.c7 #include <soc/rtc_cntl_reg.h>
8 #include <soc/timer_group_reg.h>
9 #include <soc/ext_mem_defs.h>
10 #include <soc/gpio_reg.h>
11 #include <soc/syscon_reg.h>
12 #include <soc/system_reg.h>
14 #include <soc/interrupt_reg.h>
15 #include <soc/periph_defs.h>
21 #include <soc.h>
/Zephyr-Core-3.7.0/soc/nxp/imx/imx8m/
DKconfig.defconfig.mimx8ml8_m71 # MIMX8ML8 SoC defconfig
9 config SOC config
27 default $(dt_node_reg_size_int,/soc/itcm@0,0,K)
30 default $(dt_node_reg_addr_hex,/soc/itcm@0)
37 default $(dt_node_reg_size_int,/soc/code@80000000,0,K)
40 default $(dt_node_reg_addr_hex,/soc/code@80000000)
/Zephyr-Core-3.7.0/boards/native/native_posix/
Dboard_soc.h7 * @file Extra definitions provided by the board to soc.h
10 * The POSIX ARCH/SOC/board layering is different than in normal archs
11 * The "SOC" does not provide almost any of the typical SOC functionality
13 * Device code may rely on the soc.h defining some things (like the interrupts
15 * Therefore this file is included from the inf_clock soc.h to allow a board
16 * to define that kind of SOC related snippets
/Zephyr-Core-3.7.0/boards/native/nrf_bsim/
Dboard_soc.h7 * @file Extra definitions provided by the board to soc.h
10 * The POSIX ARCH/SOC/board layering is different than in normal archs
11 * The "SOC" does not provide almost any of the typical SOC functionality
13 * Device code may rely on the soc.h defining some things (like the interrupts
15 * Therefore this file is included from the inf_clock soc.h to allow a board
16 * to define that kind of SOC related snippets
/Zephyr-Core-3.7.0/boards/atmel/sam0/samc21n_xpro/
Dpre_dt_board.cmake5 # - /soc/pinmux@41004400 & /soc/gpio@41004400
6 # - /soc/pinmux@41004480 & /soc/gpio@41004480
/Zephyr-Core-3.7.0/boards/microchip/ev11l78a/
Dpre_dt_board.cmake5 # - /soc/pinmux@41004400 & /soc/gpio@41004400
6 # - /soc/pinmux@41004480 & /soc/gpio@41004480
/Zephyr-Core-3.7.0/boards/atmel/sam0/same54_xpro/
Dpre_dt_board.cmake5 # - /soc/pinmux@41004400 & /soc/gpio@41004400
6 # - /soc/pinmux@41004480 & /soc/gpio@41004480
/Zephyr-Core-3.7.0/boards/seeed/seeeduino_xiao/
Dpre_dt_board.cmake5 # - /soc/pinmux@41004400 & /soc/gpio@41004400
6 # - /soc/pinmux@41004480 & /soc/gpio@41004480
/Zephyr-Core-3.7.0/boards/arduino/zero/
Dpre_dt_board.cmake5 # - /soc/pinmux@41004400 & /soc/gpio@41004400
6 # - /soc/pinmux@41004480 & /soc/gpio@41004480
/Zephyr-Core-3.7.0/boards/atmel/sam0/samd20_xpro/
Dpre_dt_board.cmake5 # - /soc/pinmux@41004400 & /soc/gpio@41004400
6 # - /soc/pinmux@41004480 & /soc/gpio@41004480
/Zephyr-Core-3.7.0/boards/adafruit/itsybitsy_m4_express/
Dpre_dt_board.cmake5 # - /soc/pinmux@41004400 & /soc/gpio@41004400
6 # - /soc/pinmux@41004480 & /soc/gpio@41004480
/Zephyr-Core-3.7.0/boards/adafruit/feather_m0_lora/
Dpre_dt_board.cmake5 # - /soc/pinmux@41004400 & /soc/gpio@41004400
6 # - /soc/pinmux@41004480 & /soc/gpio@41004480

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