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1 # ARM SiP service configuration options7 bool "ARM SiP SVC Service"11 implementing the platform-specifics via SIP SVC driver.20 int "ARM SiP service init function priority"24 int "ARM SiP service thread stack size"27 Stack size of the ARM SiP service.32 int "ARM SiP service thread priority"35 Priority of the ARM SiP service.40 int "ARM SiP service request message queue depth"70 bool "ARM SiP SVC service shell"[all …]
7 bool "ARM SIP SVC driver"25 This is an option to be enabled by individual sip svc driver26 to signal that there is a sip svc driver. This is used by other27 modules which depends on sip svc driver.
7 # SiP (System-in-Package) consisting of the nRF9230 SoC and12 # Like it's done for the nRF91 family, let the nRF9280 SiP37 # The SiP selects the actual SoC complete with engineer revision and appropriate CPU44 nRF9280 SiP46 # The CPU select the "SoC" (SiP)
12 * @brief Public API for ARM SiP services14 * ARM SiP service provides the capability to send the52 /** @brief ARM sip service callback function prototype for response after completion62 * @brief Register a client on ARM SiP service70 * SiP services.80 * @brief Unregister a client on ARM SiP service85 * @param ctrl Pointer to controller instance which provides ARM SiP services.98 * @brief Client requests to open a channel on ARM SiP service.106 * @param ctrl Pointer to controller instance which provides ARM SiP services.122 * @brief Client requests to close the channel on ARM SiP services.[all …]
19 * @brief Length of SVC conduit name in sip svc subsystem.33 * @brief Arm SiP Service client data.53 * @brief Arm SiP Services controller data.
1 :name: Myra SiP Baseboard2 :description: This script is prepared to run Zephyr on the Myra SiP Baseboard.4 $name?="Myra SiP Baseboard"
4 # The OSD32MP15X is technically a SiP (System-in-Package) that consists of7 # the build target, but since the OSD32MP15x SiP is what a user can actually16 Octavo Systems OSD32MP15X SiP
4 # The Myra is technically a SiP (System-in-Package) that consists of6 # Antmicro Myra SiP Baseboard the STM32G491XX SoC is to be indicated as7 # the build target, but since the Myra SiP is what a user can actually
2 :name: Arm SiP Services on Intel Agilex SoC FPGA4 Use the SiP SVC subsystem to interact with the Secure Device Manager on Intel Agilex SoC FPGA.9 This sample demonstrates the usage of SiP SVC subsystem.This sample16 * SiP SVC subsystem relies on the firmware running in EL3 layer to be in compatible17 with protocol defined inside the SiP SVC subsystem used by the project.
4 # SiP SVC Service
2 name: SIP SVC sample
12 * @brief Arm SiP services communication protocol58 /** @brief Arm SiP services command code in request header95 * - Unsupported Arm SiP services command code105 /** @brief SiP Service communication protocol109 * - bits [15: 0] Arm SiP services command code112 * - bits [31:30] Arm SiP services communication protocol version148 /** @brief SiP Services service communication protocol155 * - bits [31:30] Arm SiP services communication protocol version
14 * Arm SiP Services SMC protocol and sent to/from SDM via Arm15 * SiP Services.
14 #SiP SVC Service19 #SiP SVC Service Shell
20 #SiP SVC Service25 #SiP SVC Service Shell
1 # Private config options for sip svc stress test app6 mainmenu "Intel Agilex SiP SVC stress test"
7 # SiP SVC Service
5 description: SiP SVC driver instance on Intel Agilex SOC FPGA for SMC call7 compatible: "intel,socfpga-agilex-sip-smc"
20 /* SiP SVC controller */22 /* SiP SVC client token id */29 * @brief Open SiP SVC client session80 /* Fill the SiP SVC buffer with CANCEL request */ in svc_client_close()128 LOG_DBG("SiP SVC callback"); in smc_callback()167 * the command data memory space had been freed by SiP SVC service. in smc_callback()178 * @brief Send the data to SiP SVC service layer240 /* Fill SiP SVC request buffer */ in smc_send()250 /* Send SiP SVC request */ in smc_send()255 LOG_ERR("SiP SVC send request fail"); in smc_send()[all …]
3 full_name: Myra SiP Baseboard
2 name: Myra SiP Baseboard
7 System-in-Package (SiP), which contains a multicore STM32MP157F microprocessor.12 - OSD32MP15x SiP:44 The OSD32MP15x SiP in integration with the STM32MP17 SoC provides the following hardware capabiliti…60 - 512 MB DDR3L memory (on SiP)67 - Integrated 4 KB EEPROM (on SiP)83 - MEMS oscillator (on SiP)149 - `OSD32MP15x SiP documentation`_283 .. _OSD32MP15x SiP documentation:
9 #include "../psoc6_01/psoc6_01.124-bga-sip.dtsi"
